diff options
-rw-r--r-- | arch/arm64/boot/dts/freescale/Makefile | 3 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-ak5558.dts | 40 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-rpmsg.dts | 125 |
3 files changed, 167 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 6f4b837f3455..d7949b5156c3 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -60,7 +60,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-ab2.dtb imx8mm-ab2-m4.dtb imx8mm-ddr4-ab2.dtb i imx8mm-ddr4-ab2-revb.dtb imx8mm-ddr4-ab2-m4-revb.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb imx8mn-evk-rm67191.dtb imx8mn-ddr4-evk.dtb imx8mn-ddr4-evk-ak5558.dtb \ imx8mn-ddr4-evk-rm67191.dtb imx8mn-ddr4-evk-rpmsg.dtb imx8mn-ddr4-evk-usd-wifi.dtb \ - imx8mn-evk-ak5558.dtb imx8mn-evk-rpmsg.dtb imx8mn-evk-8mic-revE.dtb imx8mn-ddr3l-evk.dtb + imx8mn-evk-ak5558.dtb imx8mn-evk-rpmsg.dtb imx8mn-evk-8mic-revE.dtb imx8mn-ddr3l-evk.dtb \ + imx8mn-ddr3l-evk-ak5558.dtb imx8mn-ddr3l-evk-rpmsg.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk-root.dtb imx8mn-ddr4-evk-inmate.dtb imx8mn-evk-root.dtb imx8mn-evk-inmate.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-ab2.dtb imx8mn-ddr4-ab2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb imx8mp-evk-root.dtb imx8mp-evk-inmate.dtb imx8mp-evk-rpmsg.dtb \ diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-ak5558.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-ak5558.dts new file mode 100644 index 000000000000..0bac38fff084 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-ak5558.dts @@ -0,0 +1,40 @@ +/* + * Copyright 2020 NXP + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "imx8mn-ddr3l-evk.dts" + +/ { + sound-wm8524 { + asrc-controller = <0>; + }; + sound-ak5558 { + asrc-controller = <&easrc>; + status = "okay"; + }; + sound-micfil { + status = "disabled"; + }; +}; + +&micfil { + status = "disabled"; +}; + +&sai5 { + status = "okay"; +}; + +&ak5558 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-rpmsg.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-rpmsg.dts new file mode 100644 index 000000000000..b3c1af0c76e4 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-rpmsg.dts @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2020 NXP + */ + +#include "imx8mn-ddr3l-evk.dts" + +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + m_core_reserved: m_core@0x80000000 { + no-map; + reg = <0 0x80000000 0 0x1000000>; + }; + + vdev0vring0: vdev0vring0@b8000000 { + compatible = "shared-dma-pool"; + reg = <0 0xb8000000 0 0x8000>; + no-map; + }; + + vdev0vring1: vdev0vring1@b8008000 { + compatible = "shared-dma-pool"; + reg = <0 0xb8008000 0 0x8000>; + no-map; + }; + vdevbuffer: vdevbuffer@b8400000 { + compatible = "shared-dma-pool"; + reg = <0 0xb8400000 0 0x100000>; + no-map; + }; + }; + + sound-wm8524 { + status = "disabled"; + }; + + wm8524: wm8524{ + status = "disabled"; + }; + + rpmsg_i2s: rpmsg-i2s { + compatible = "fsl,imx8mn-rpmsg-i2s"; + /* the audio device index in m4 domain */ + fsl,audioindex = <0> ; + fsl,dma-buffer-size = <0x6000000>; + fsl,enable-lpa; + status = "okay"; + }; + + sound-rpmsg { + compatible = "fsl,imx-audio-rpmsg"; + model = "wm8524-audio"; + cpu-dai = <&rpmsg_i2s>; + rpmsg-out; + }; + + imx8mn-cm7 { + compatible = "fsl,imx8mn-cm7"; + rsc-da = <0xb8000000>; + mbox-names = "tx", "rx", "rxdb"; + mboxes = <&mu 0 1 + &mu 1 1 + &mu 3 1>; + memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdevbuffer>; + status = "okay"; + }; +}; + +&clk { + init-on-array = < + IMX8MN_CLK_UART4_ROOT + >; +}; + +/* + * ATTENTION: M core may use IPs like below + * ECSPI2, GPIO1/GPIO5, GPT1, I2C3, I2S3, UART4, PWM3, SDMA1/3 and PDM + */ + +&ecspi2 { + status = "disabled"; +}; + +&flexspi { + status = "disabled"; +}; + +&i2c3 { + status = "disabled"; +}; + +&pwm3 { + status = "disabled"; +}; + +&rpmsg{ + /* + * 64K for one rpmsg instance: + * --0xb8000000~0xb800ffff: pingpong + */ + vdev-nums = <1>; + reg = <0x0 0xb8000000 0x0 0x10000>; + memory-region = <&vdevbuffer>; + status = "disabled"; +}; + +&sai3 { + status = "disabled"; +}; + +&uart4 { + status = "disabled"; +}; + +&sdma1{ + status = "disabled"; +}; + +&sdma3 { + status = "disabled"; +}; |