diff options
| -rwxr-xr-x[-rw-r--r--] | arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi | 8 | ||||
| -rwxr-xr-x[-rw-r--r--] | arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 58 | ||||
| -rwxr-xr-x[-rw-r--r--] | arch/arm64/boot/dts/freescale/imx8qm.dtsi | 3 |
3 files changed, 68 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi index f289e15f15ea..74e2bf95b992 100644..100755 --- a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi @@ -55,4 +55,12 @@ vpu_subsys: bus@2c000000 { fsl,vpu_ap_mu_id = <17>; status = "okay"; }; + + mu2_m0: mu2_m0@2d040000 { + compatible = "fsl,imx8-mu2-vpu-m0"; + reg = <0x2d040000 0x20000>; + interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; + fsl,vpu_ap_mu_id = <18>; + status = "disabled"; + }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index 5060621b5685..d515381f824a 100644..100755 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -1198,3 +1198,61 @@ }; }; }; + +&mu_m0{ + interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>; +}; + +&mu1_m0{ + interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>; +}; + +&mu2_m0{ + interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; +}; + +&vpu_decoder { + compatible = "nxp,imx8qm-b0-vpudec"; + boot-region = <&decoder_boot>; + rpc-region = <&decoder_rpc>; + reg-csr = <0x2d080000>; + core_type = <2>; + status = "okay"; +}; + +&vpu_encoder { + compatible = "nxp,imx8qm-b0-vpuenc"; + boot-region = <&encoder_boot>; + rpc-region = <&encoder_rpc>; + reserved-region = <&encoder_reserved>; + reg-rpc-system = <0x40000000>; + resolution-max = <1920 1080>; + fps-max = <120>; + power-domains = <&pd IMX_SC_R_VPU_ENC_0>, + <&pd IMX_SC_R_VPU>, <&pd IMX_SC_R_VPU_MU_1>, <&pd IMX_SC_R_VPU_MU_2>; + power-domain-names = "vpuenc", "vpu", "vpumu1", "vpumu2"; + status = "okay"; + + core0@1020000 { + compatible = "fsl,imx8-mu1-vpu-m0"; + reg = <0x1020000 0x20000>; + reg-csr = <0x1090000 0x10000>; + interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>; + fsl,vpu_ap_mu_id = <17>; + fw-buf-size = <0x200000>; + rpc-buf-size = <0x80000>; + print-buf-size = <0x80000>; + }; + + core1@1040000 { + compatible = "fsl,imx8-mu2-vpu-m0"; + reg = <0x1040000 0x20000>; + reg-csr = <0x10A0000 0x10000>; + interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; + fsl,vpu_ap_mu_id = <18>; + fw-buf-size = <0x200000>; + rpc-buf-size = <0x80000>; + print-buf-size = <0x80000>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index 55cc76c48ee4..fc8de579e274 100644..100755 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -447,6 +447,7 @@ #include "imx8-ss-img.dtsi" #include "imx8-ss-dc0.dtsi" #include "imx8-ss-dc1.dtsi" + #include "imx8-ss-vpu.dtsi" }; #include "imx8qm-ss-audio.dtsi" @@ -458,4 +459,4 @@ #include "imx8qm-ss-dc.dtsi" #include "imx8qm-ss-lvds.dtsi" #include "imx8qm-ss-hdmi.dtsi" -#include "imx8qm-ss-img.dtsi" +#include "imx8qm-ss-img.dtsi"
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