diff options
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val.dts | 61 | ||||
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val.dts | 61 |
2 files changed, 122 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val.dts b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val.dts index fb366f5276c4..b401dbb8f9b9 100755 --- a/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val.dts @@ -84,6 +84,25 @@ }; + reg_can_en: regulator-can-en { + compatible = "regulator-fixed"; + regulator-name = "can-en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pca9557_b 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_can_stby: regulator-can-stby { + compatible = "regulator-fixed"; + regulator-name = "can-stby"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pca9557_b 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_can_en>; + }; + reg_usdhc2_vmmc: usdhc2-vmmc { compatible = "regulator-fixed"; regulator-name = "SD1_SPWR"; @@ -422,6 +441,27 @@ }; }; +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&flexcan3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan3>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; @@ -485,6 +525,27 @@ >; }; + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX 0x21 + IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX 0x21 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX 0x21 + IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX 0x21 + >; + }; + + pinctrl_flexcan3: flexcan3grp { + fsl,pins = < + IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX 0x21 + IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX 0x21 + >; + }; + pinctrl_lpi2c0: lpi2c0grp { fsl,pins = < IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0xc600004c diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val.dts b/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val.dts index ad0daa6d40c2..2556f23d2570 100755 --- a/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val.dts @@ -77,6 +77,25 @@ }; }; + reg_can_en: regulator-can-en { + compatible = "regulator-fixed"; + regulator-name = "can-en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pca9557_b 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_can_stby: regulator-can-stby { + compatible = "regulator-fixed"; + regulator-name = "can-stby"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pca9557_b 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_can_en>; + }; + reg_usdhc2_vmmc: usdhc2-vmmc { compatible = "regulator-fixed"; regulator-name = "SD1_SPWR"; @@ -196,6 +215,27 @@ }; }; +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&flexcan3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan3>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + &mlb { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mlb>; @@ -376,6 +416,27 @@ >; }; + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 + IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 + IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 + >; + }; + + pinctrl_flexcan3: flexcan3grp { + fsl,pins = < + IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21 + IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21 + >; + }; + pinctrl_flexspi0: flexspi0grp { fsl,pins = < IMX8QXP_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 0x06000021 |