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-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts58
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts62
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts62
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi68
4 files changed, 248 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
index f90c040fd5e8..4f18c150fa63 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
@@ -13,6 +13,11 @@
model = "LS1012A Freedom Board";
compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+
sys_mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -74,6 +79,44 @@
};
};
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
&sai2 {
status = "okay";
};
@@ -81,3 +124,18 @@
&sata {
status = "okay";
};
+
+&qspi {
+ status = "okay";
+ qflash0: s25fs512s@0 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ m25p,fast-read;
+ reg = <0>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <2>;
+ };
+
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
index 2fb1cb1f7d8f..6e431491efe9 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
@@ -13,6 +13,11 @@
model = "LS1012A QDS Board";
compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+
sys_mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -57,6 +62,10 @@
};
};
+&pcie {
+ status = "okay";
+};
+
&dspi {
bus-num = <0>;
status = "okay";
@@ -128,6 +137,44 @@
};
};
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x2>;
+ phy-mode = "sgmii-2500";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x3>;
+ phy-mode = "sgmii-2500";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
&sai2 {
status = "okay";
};
@@ -135,3 +182,18 @@
&sata {
status = "okay";
};
+
+&qspi {
+ status = "okay";
+ qflash0: s25fs512s@0 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ m25p,fast-read;
+ reg = <0>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <2>;
+ };
+
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
index 5edb1e137a52..2d320cb435d0 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
@@ -12,6 +12,15 @@
/ {
model = "LS1012A RDB Board";
compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
+
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+};
+
+&pcie {
+ status = "okay";
};
&duart0 {
@@ -38,3 +47,56 @@
&sata {
status = "okay";
};
+
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */
+ fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "rgmii-txid";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
+&qspi {
+ status = "okay";
+ qflash0: s25fs512s@0 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ m25p,fast-read;
+ reg = <0>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <2>;
+ };
+
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 337919366dc8..df34f8d07dc7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -260,7 +260,7 @@
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1012a-dcfg",
"syscon";
- reg = <0x0 0x1ee0000 0x0 0x10000>;
+ reg = <0x0 0x1ee0000 0x0 0x1000>;
big-endian;
};
@@ -317,13 +317,23 @@
#thermal-sensor-cells = <1>;
};
+ ftm0: ftm0@29d0000 {
+ compatible = "fsl,ftm-alarm";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x1ee2140 0x0 0x4>;
+ reg-names = "ftm", "FlexTimer1";
+ interrupts = <0 86 0x4>;
+ big-endian;
+ };
+
i2c0: i2c@2180000 {
- compatible = "fsl,vf610-i2c";
+ compatible = "fsl,vf610-i2c", "fsl,ls1012a-vf610-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x2180000 0x0 0x10000>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
+ scl-gpios = <&gpio0 13 0>;
status = "disabled";
};
@@ -395,6 +405,20 @@
big-endian;
};
+ qspi: spi@1550000 {
+ compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x1550000 0x0 0x10000>,
+ <0x0 0x40000000 0x0 0x10000000>;
+ reg-names = "QuadSPI", "QuadSPI-memory";
+ interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "qspi_en", "qspi";
+ clocks = <&clockgen 4 0>, <&clockgen 4 0>;
+ big-endian;
+ status = "disabled";
+ };
+
sai1: sai@2b50000 {
#sound-dai-cells = <0>;
compatible = "fsl,vf610-sai";
@@ -499,6 +523,46 @@
<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
+
+ rcpm: rcpm@1ee2000 {
+ compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
+ reg = <0x0 0x1ee2000 0x0 0x1000>;
+ fsl,#rcpm-wakeup-cells = <1>;
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ pfe_reserved: packetbuffer@83400000 {
+ reg = <0 0x83400000 0 0xc00000>;
+ };
+ };
+
+ pfe: pfe@04000000 {
+ compatible = "fsl,pfe";
+ reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
+ <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
+ reg-names = "pfe", "pfe-ddr";
+ fsl,pfe-num-interfaces = <0x2>;
+ interrupts = <0 172 0x4>, /* HIF interrupt */
+ <0 173 0x4>, /*HIF_NOCPY interrupt */
+ <0 174 0x4>; /* WoL interrupt */
+ interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
+ memory-region = <&pfe_reserved>;
+ fsl,pfe-scfg = <&scfg 0>;
+ fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "pfe";
+
+ status = "okay";
+ pfe_mac0: ethernet@0 {
+ };
+
+ pfe_mac1: ethernet@1 {
+ };
};
firmware {
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-07 15:37:07 +0000