diff options
| -rw-r--r-- | arch/arm/Kconfig | 7 | ||||
| -rw-r--r-- | arch/arm/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/mach-aaec2000/Kconfig | 11 | ||||
| -rw-r--r-- | arch/arm/mach-aaec2000/Makefile | 9 | ||||
| -rw-r--r-- | arch/arm/mach-aaec2000/aaed2000.c | 48 | ||||
| -rw-r--r-- | arch/arm/mach-aaec2000/core.c | 157 | ||||
| -rw-r--r-- | arch/arm/mach-aaec2000/core.h | 16 | ||||
| -rw-r--r-- | arch/arm/mm/Kconfig | 2 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/aaec2000.h | 151 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/debug-macro.S | 36 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/dma.h | 17 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/entry-macro.S | 33 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/hardware.h | 49 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/io.h | 19 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/irqs.h | 46 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/memory.h | 73 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/param.h | 15 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/system.h | 24 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/timex.h | 18 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/uncompress.h | 47 | ||||
| -rw-r--r-- | include/asm-arm/arch-aaec2000/vmalloc.h | 16 |
21 files changed, 794 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1a1773f81393..efdb12d73566 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -198,6 +198,11 @@ config ARCH_H720X help This enables support for systems based on the Hynix HMS720x +config ARCH_AAEC2000 + bool "Agilent AAEC-2000 based" + help + This enables support for systems based on the Agilent AAEC-2000 + endchoice source "arch/arm/mach-clps711x/Kconfig" @@ -230,6 +235,8 @@ source "arch/arm/mach-h720x/Kconfig" source "arch/arm/mach-versatile/Kconfig" +source "arch/arm/mach-aaec2000/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 2277e3d179cc..8330495e2448 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -97,6 +97,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000 machine-$(CONFIG_ARCH_VERSATILE) := versatile machine-$(CONFIG_ARCH_IMX) := imx machine-$(CONFIG_ARCH_H720X) := h720x + machine-$(CONFIG_ARCH_AAEC2000) := aaec2000 ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. diff --git a/arch/arm/mach-aaec2000/Kconfig b/arch/arm/mach-aaec2000/Kconfig new file mode 100644 index 000000000000..5e4bef93754c --- /dev/null +++ b/arch/arm/mach-aaec2000/Kconfig @@ -0,0 +1,11 @@ +if ARCH_AAEC2000 + +menu "Agilent AAEC-2000 Implementations" + +config MACH_AAED2000 + bool "Agilent AAED-2000 Development Platform" + select CPU_ARM920T + +endmenu + +endif diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile new file mode 100644 index 000000000000..20ec83896c37 --- /dev/null +++ b/arch/arm/mach-aaec2000/Makefile @@ -0,0 +1,9 @@ +# +# Makefile for the linux kernel. +# + +# Common support (must be linked before board specific support) +obj-y += core.o + +# Specific board support +obj-$(CONFIG_MACH_AAED2000) += aaed2000.o diff --git a/arch/arm/mach-aaec2000/aaed2000.c b/arch/arm/mach-aaec2000/aaed2000.c new file mode 100644 index 000000000000..5417ca3f4621 --- /dev/null +++ b/arch/arm/mach-aaec2000/aaed2000.c @@ -0,0 +1,48 @@ +/* + * linux/arch/arm/mach-aaec2000/aaed2000.c + * + * Support for the Agilent AAED-2000 Development Platform. + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/major.h> +#include <linux/interrupt.h> + +#include <asm/setup.h> +#include <asm/memory.h> +#include <asm/mach-types.h> +#include <asm/hardware.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include "core.h" + +static void __init aaed2000_init_irq(void) +{ + aaec2000_init_irq(); +} + +static void __init aaed2000_map_io(void) +{ + aaec2000_map_io(); +} + +MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform") + MAINTAINER("Nicolas Bellido Y Ortega") + BOOT_MEM(0xf0000000, PIO_BASE, VIO_BASE) + MAPIO(aaed2000_map_io) + INITIRQ(aaed2000_init_irq) + .timer = &aaec2000_timer, +MACHINE_END diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c new file mode 100644 index 000000000000..fc145b3768fa --- /dev/null +++ b/arch/arm/mach-aaec2000/core.c @@ -0,0 +1,157 @@ +/* + * linux/arch/arm/mach-aaec2000/core.c + * + * Code common to all AAEC-2000 machines + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/config.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/interrupt.h> +#include <linux/timex.h> +#include <linux/signal.h> + +#include <asm/hardware.h> +#include <asm/irq.h> + +#include <asm/mach/irq.h> +#include <asm/mach/time.h> +#include <asm/mach/map.h> + +/* + * Common I/O mapping: + * + * Static virtual address mappings are as follow: + * + * 0xf8000000-0xf8001ffff: Devices connected to APB bus + * 0xf8002000-0xf8003ffff: Devices connected to AHB bus + * + * Below 0xe8000000 is reserved for vm allocation. + * + * The machine specific code must provide the extra mapping beside the + * default mapping provided here. + */ +static struct map_desc standard_io_desc[] __initdata = { + /* virtual physical length type */ + { VIO_APB_BASE, PIO_APB_BASE, IO_APB_LENGTH, MT_DEVICE }, + { VIO_AHB_BASE, PIO_AHB_BASE, IO_AHB_LENGTH, MT_DEVICE } +}; + +void __init aaec2000_map_io(void) +{ + iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); +} + +/* + * Interrupt handling routines + */ +static void aaec2000_int_ack(unsigned int irq) +{ + IRQ_INTSR = 1 << irq; +} + +static void aaec2000_int_mask(unsigned int irq) +{ + IRQ_INTENC |= (1 << irq); +} + +static void aaec2000_int_unmask(unsigned int irq) +{ + IRQ_INTENS |= (1 << irq); +} + +static struct irqchip aaec2000_irq_chip = { + .ack = aaec2000_int_ack, + .mask = aaec2000_int_mask, + .unmask = aaec2000_int_unmask, +}; + +void __init aaec2000_init_irq(void) +{ + unsigned int i; + + for (i = 0; i < NR_IRQS; i++) { + set_irq_handler(i, do_level_IRQ); + set_irq_chip(i, &aaec2000_irq_chip); + set_irq_flags(i, IRQF_VALID); + } + + /* Disable all interrupts */ + IRQ_INTENC = 0xffffffff; + + /* Clear any pending interrupts */ + IRQ_INTSR = IRQ_INTSR; +} + +/* + * Time keeping + */ +/* IRQs are disabled before entering here from do_gettimeofday() */ +static unsigned long aaec2000_gettimeoffset(void) +{ + unsigned long ticks_to_match, elapsed, usec; + + /* Get ticks before next timer match */ + ticks_to_match = TIMER1_LOAD - TIMER1_VAL; + + /* We need elapsed ticks since last match */ + elapsed = LATCH - ticks_to_match; + + /* Now, convert them to usec */ + usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; + + return usec; +} + +/* We enter here with IRQs enabled */ +static irqreturn_t +aaec2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + /* TODO: Check timer accuracy */ + write_seqlock(&xtime_lock); + + timer_tick(regs); + TIMER1_CLEAR = 1; + + write_sequnlock(&xtime_lock); + + return IRQ_HANDLED; +} + +static struct irqaction aaec2000_timer_irq = { + .name = "AAEC-2000 Timer Tick", + .flags = SA_INTERRUPT, + .handler = aaec2000_timer_interrupt +}; + +static void __init aaec2000_timer_init(void) +{ + /* Disable timer 1 */ + TIMER1_CTRL = 0; + + /* We have somehow to generate a 100Hz clock. + * We then use the 508KHz timer in periodic mode. + */ + TIMER1_LOAD = LATCH; + TIMER1_CLEAR = 1; /* Clear interrupt */ + + setup_irq(INT_TMR1_OFL, &aaec2000_timer_irq); + + TIMER1_CTRL = TIMER_CTRL_ENABLE | + TIMER_CTRL_PERIODIC | + TIMER_CTRL_CLKSEL_508K; +} + +struct sys_timer aaec2000_timer = { + .init = aaec2000_timer_init, + .offset = aaec2000_gettimeoffset, +}; + diff --git a/arch/arm/mach-aaec2000/core.h b/arch/arm/mach-aaec2000/core.h new file mode 100644 index 000000000000..91893d848c16 --- /dev/null +++ b/arch/arm/mach-aaec2000/core.h @@ -0,0 +1,16 @@ +/* + * linux/arch/arm/mach-aaec2000/core.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +struct sys_timer; + +extern struct sys_timer aaec2000_timer; +extern void __init aaec2000_map_io(void); +extern void __init aaec2000_init_irq(void); diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 3fefb43c67f7..95606b4a3ba6 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -62,7 +62,7 @@ config CPU_ARM720T # ARM920T config CPU_ARM920T bool "Support ARM920T processor" if !ARCH_S3C2410 - depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX + depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000 default y if ARCH_S3C2410 select CPU_32v4 select CPU_ABRT_EV4T diff --git a/include/asm-arm/arch-aaec2000/aaec2000.h b/include/asm-arm/arch-aaec2000/aaec2000.h new file mode 100644 index 000000000000..0e9b7e18af05 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/aaec2000.h @@ -0,0 +1,151 @@ +/* + * linux/include/asm-arm/arch-aaec2000/aaec2000.h + * + * AAEC-2000 registers definition + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_AAEC2000_H +#define __ASM_ARCH_AAEC2000_H + +#ifndef __ASM_ARCH_HARDWARE_H +#error You must include hardware.h not this file +#endif /* __ASM_ARCH_HARDWARE_H */ + +/* Interrupt controller */ +#define IRQ_BASE __REG(0x80000500) +#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */ +#define IRQ_INTRSR __REG(0x80000504) /* Int Raw (unmasked) Status */ +#define IRQ_INTENS __REG(0x80000508) /* Int Enable Set */ +#define IRQ_INTENC __REG(0x8000050c) /* Int Enable Clear */ + +/* UART 1 */ +#define UART1_BASE __REG(0x80000600) +#define UART1_DR __REG(0x80000600) /* Data/FIFO Register */ +#define UART1_LCR __REG(0x80000604) /* Link Control Register */ +#define UART1_BRCR __REG(0x80000608) /* Baud Rate Control Register */ +#define UART1_CR __REG(0x8000060c) /* Control Register */ +#define UART1_SR __REG(0x80000610) /* Status Register */ +#define UART1_INT __REG(0x80000614) /* Interrupt Status Register */ +#define UART1_INTM __REG(0x80000618) /* Interrupt Mask Register */ +#define UART1_INTRES __REG(0x8000061c) /* Int Result (masked status) Register */ + +/* UART 2 */ +#define UART2_BASE __REG(0x80000700) +#define UART2_DR __REG(0x80000700) /* Data/FIFO Register */ +#define UART2_LCR __REG(0x80000704) /* Link Control Register */ +#define UART2_BRCR __REG(0x80000708) /* Baud Rate Control Register */ +#define UART2_CR __REG(0x8000070c) /* Control Register */ +#define UART2_SR __REG(0x80000710) /* Status Register */ +#define UART2_INT __REG(0x80000714) /* Interrupt Status Register */ +#define UART2_INTM __REG(0x80000718) /* Interrupt Mask Register */ +#define UART2_INTRES __REG(0x8000071c) /* Int Result (masked status) Register */ + +/* UART 3 */ +#define UART3_BASE __REG(0x80000800) +#define UART3_DR __REG(0x80000800) /* Data/FIFO Register */ +#define UART3_LCR __REG(0x80000804) /* Link Control Register */ +#define UART3_BRCR __REG(0x80000808) /* Baud Rate Control Register */ +#define UART3_CR __REG(0x8000080c) /* Control Register */ +#define UART3_SR __REG(0x80000810) /* Status Register */ +#define UART3_INT __REG(0x80000814) /* Interrupt Status Register */ +#define UART3_INTM __REG(0x80000818) /* Interrupt Mask Register */ +#define UART3_INTRES __REG(0x8000081c) /* Int Result (masked status) Register */ + +/* These are used in some places */ +#define _UART1_BASE __PREG(UART1_BASE) +#define _UART2_BASE __PREG(UART2_BASE) +#define _UART3_BASE __PREG(UART3_BASE) + +/* UART Registers Offsets */ +#define UART_DR 0x00 +#define UART_LCR 0x04 +#define UART_BRCR 0x08 +#define UART_CR 0x0c +#define UART_SR 0x10 +#define UART_INT 0x14 +#define UART_INTM 0x18 +#define UART_INTRES 0x1c + +/* UART_LCR Bitmask */ +#define UART_LCR_BRK (1 << 0) /* Send Break */ +#define UART_LCR_PEN (1 << 1) /* Parity Enable */ +#define UART_LCR_EP (1 << 2) /* Even/Odd Parity */ +#define UART_LCR_S2 (1 << 3) /* One/Two Stop bits */ +#define UART_LCR_FIFO (1 << 4) /* FIFO Enable */ +#define UART_LCR_WL5 (0 << 5) /* Word Length - 5 bits */ +#define UART_LCR_WL6 (1 << 5) /* Word Length - 6 bits */ +#define UART_LCR_WL7 (1 << 6) /* Word Length - 7 bits */ +#define UART_LCR_WL8 (1 << 7) /* Word Length - 8 bits */ + +/* UART_CR Bitmask */ +#define UART_CR_EN (1 << 0) /* UART Enable */ +#define UART_CR_SIR (1 << 1) /* IrDA SIR Enable */ +#define UART_CR_SIRLP (1 << 2) /* Low Power IrDA Enable */ +#define UART_CR_RXP (1 << 3) /* Receive Pin Polarity */ +#define UART_CR_TXP (1 << 4) /* Transmit Pin Polarity */ +#define UART_CR_MXP (1 << 5) /* Modem Pin Polarity */ +#define UART_CR_LOOP (1 << 6) /* Loopback Mode */ + +/* UART_SR Bitmask */ +#define UART_SR_CTS (1 << 0) /* Clear To Send Status */ +#define UART_SR_DSR (1 << 1) /* Data Set Ready Status */ +#define UART_SR_DCD (1 << 2) /* Data Carrier Detect Status */ +#define UART_SR_TxBSY (1 << 3) /* Transmitter Busy Status */ +#define UART_SR_RxFE (1 << 4) /* Receive FIFO Empty Status */ +#define UART_SR_TxFF (1 << 5) /* Transmit FIFO Full Status */ +#define UART_SR_RxFF (1 << 6) /* Receive FIFO Full Status */ +#define UART_SR_TxFE (1 << 7) /* Transmit FIFO Empty Status */ + +/* UART_INT Bitmask */ +#define UART_INT_RIS (1 << 0) /* Rx Interrupt */ +#define UART_INT_TIS (1 << 1) /* Tx Interrupt */ +#define UART_INT_MIS (1 << 2) /* Modem Interrupt */ +#define UART_INT_RTIS (1 << 3) /* Receive Timeout Interrupt */ + +/* Timer 1 */ +#define TIMER1_BASE __REG(0x80000c00) +#define TIMER1_LOAD __REG(0x80000c00) /* Timer 1 Load Register */ +#define TIMER1_VAL __REG(0x80000c04) /* Timer 1 Value Register */ +#define TIMER1_CTRL __REG(0x80000c08) /* Timer 1 Control Register */ +#define TIMER1_CLEAR __REG(0x80000c0c) /* Timer 1 Clear Register */ + +/* Timer 2 */ +#define TIMER2_BASE __REG(0x80000d00) +#define TIMER2_LOAD __REG(0x80000d00) /* Timer 2 Load Register */ +#define TIMER2_VAL __REG(0x80000d04) /* Timer 2 Value Register */ +#define TIMER2_CTRL __REG(0x80000d08) /* Timer 2 Control Register */ +#define TIMER2_CLEAR __REG(0x80000d0c) /* Timer 2 Clear Register */ + +/* Timer 3 */ +#define TIMER3_BASE __REG(0x80000e00) +#define TIMER3_LOAD __REG(0x80000e00) /* Timer 3 Load Register */ +#define TIMER3_VAL __REG(0x80000e04) /* Timer 3 Value Register */ +#define TIMER3_CTRL __REG(0x80000e08) /* Timer 3 Control Register */ +#define TIMER3_CLEAR __REG(0x80000e0c) /* Timer 3 Clear Register */ + +/* Timer Control register bits */ +#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start° Timer */ +#define TIMER_CTRL_PERIODIC (1 << 6) /* Periodic Running Mode */ +#define TIMER_CTRL_FREE_RUNNING (0 << 6) /* Normal Running Mode */ +#define TIMER_CTRL_CLKSEL_508K (1 << 3) /* 508KHz Clock select (Timer 1, 2) */ +#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2)*/ + +/* Power and State Control */ +#define POWER_BASE __REG(0x80000400) +#define POWER_PWRSR __REG(0x80000400) /* Power Status Register */ +#define POWER_PWRCNT __REG(0x80000404) /* Power/Clock control */ +#define POWER_HALT __REG(0x80000408) /* Power Idle Mode */ +#define POWER_STDBY __REG(0x8000040c) /* Power Standby Mode */ +#define POWER_BLEOI __REG(0x80000410) /* Battery Low End of Interrupt */ +#define POWER_MCEOI __REG(0x80000414) /* Media Changed EoI */ +#define POWER_TEOI __REG(0x80000418) /* Tick EoI */ +#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */ +#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */ + +#endif /* __ARM_ARCH_AAEC2000_H */ diff --git a/include/asm-arm/arch-aaec2000/debug-macro.S b/include/asm-arm/arch-aaec2000/debug-macro.S new file mode 100644 index 000000000000..e4f1fa539a74 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/debug-macro.S @@ -0,0 +1,36 @@ +/* linux/include/asm-arm/arch-aaec2000/debug-macro.S + * + * Debugging macro include header + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x80000000 @ physical + movne \rx, #io_p2v(0x80000000) @ virtual + orr \rx, \rx, #0x00000800 + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #0] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #0x10] + tst \rd, #(1 << 7) + beq 1002b + .endm + + .macro waituart,rd,rx +#if 0 +1001: ldr \rd, [\rx, #0x10] + tst \rd, #(1 << 5) + beq 1001b +#endif + .endm diff --git a/include/asm-arm/arch-aaec2000/dma.h b/include/asm-arm/arch-aaec2000/dma.h new file mode 100644 index 000000000000..28c890b4a1d3 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/dma.h @@ -0,0 +1,17 @@ +/* + * linux/include/asm-arm/arch-aaec2000/dma.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_ADDRESS 0xffffffff +#define MAX_DMA_CHANNELS 0 + +#endif diff --git a/include/asm-arm/arch-aaec2000/entry-macro.S b/include/asm-arm/arch-aaec2000/entry-macro.S new file mode 100644 index 000000000000..df31313ab07e --- /dev/null +++ b/include/asm-arm/arch-aaec2000/entry-macro.S @@ -0,0 +1,33 @@ +/* + * linux/include/asm-arm/arch-aaec2000/entry-macro.S + * + * Low-level IRQ helper for aaec-2000 based platforms + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + + .macro disable_fiq + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + mov r4, #0xf8000000 + add r4, r4, #0x00000500 + mov \base, r4 + ldr \irqstat, [\base, #0] + cmp \irqstat, #0 + bne 1001f + ldr \irqnr, =NR_IRQS+1 + b 1003f +1001: mov \irqnr, #0 +1002: ands \tmp, \irqstat, #1 + mov \irqstat, \irqstat, LSR #1 + add \irqnr, \irqnr, #1 + beq 1002b + sub \irqnr, \irqnr, #1 +1003: + .endm diff --git a/include/asm-arm/arch-aaec2000/hardware.h b/include/asm-arm/arch-aaec2000/hardware.h new file mode 100644 index 000000000000..4c37219e030e --- /dev/null +++ b/include/asm-arm/arch-aaec2000/hardware.h @@ -0,0 +1,49 @@ +/* + * linux/include/asm-arm/arch-aaec2000/hardware.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <linux/config.h> + +/* The kernel is loaded at physical address 0xf8000000. + * We map the IO space a bit after + */ +#define PIO_APB_BASE 0x80000000 +#define VIO_APB_BASE 0xf8000000 +#define IO_APB_LENGTH 0x2000 +#define PIO_AHB_BASE 0x80002000 +#define VIO_AHB_BASE 0xf8002000 +#define IO_AHB_LENGTH 0x2000 + +#define VIO_BASE VIO_APB_BASE +#define PIO_BASE PIO_APB_BASE + +#define io_p2v(x) ( (x) - PIO_BASE + VIO_BASE ) +#define io_v2p(x) ( (x) + PIO_BASE - VIO_BASE ) + +#ifndef __ASSEMBLY__ + +#include <asm/types.h> + +/* FIXME: Is it needed to optimize this a la pxa ?? */ +#define __REG(x) (*((volatile u32 *)io_p2v(x))) +#define __PREG(x) (io_v2p((u32)&(x))) + +#else /* __ASSEMBLY__ */ + +#define __REG(x) io_p2v(x) +#define __PREG(x) io_v2p(x) + +#endif + +#include "aaec2000.h" + +#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h new file mode 100644 index 000000000000..c58a8d10425a --- /dev/null +++ b/include/asm-arm/arch-aaec2000/io.h @@ -0,0 +1,19 @@ +/* + * linux/include/asm-arm/arch-aaec2000/io.h + * + * Copied from asm/arch/sa1100/io.h + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * We don't actually have real ISA nor PCI buses, but there is so many + * drivers out there that might just work if we fake them... + */ +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) +#define __mem_isa(a) (a) + +#endif diff --git a/include/asm-arm/arch-aaec2000/irqs.h b/include/asm-arm/arch-aaec2000/irqs.h new file mode 100644 index 000000000000..de252220e806 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/irqs.h @@ -0,0 +1,46 @@ +/* + * linux/include/asm-arm/arch-aaec2000/irqs.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + + +#define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */ +#define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */ +#define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */ +#define INT_MV_FIQ 3 /* Media Changed Interrupt */ +#define INT_SC 4 /* Sound Codec Interrupt */ +#define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */ +#define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */ +#define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */ +#define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */ +#define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */ +#define INT_RTC_CM 10 /* RTC Compare Match Interrupt */ +#define INT_TICK 11 /* 64Hz Tick Interrupt */ +#define INT_UART1 12 /* UART1 Interrupt */ +#define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */ +#define INT_LCD 14 /* LCD Interrupt */ +#define INT_SSI 15 /* SSI End of Transfer Interrupt */ +#define INT_UART3 16 /* UART3 Interrupt */ +#define INT_SCI 17 /* SCI Interrupt */ +#define INT_AAC 18 /* Advanced Audio Codec Interrupt */ +#define INT_MMC 19 /* MMC Interrupt */ +#define INT_USB 20 /* USB Interrupt */ +#define INT_DMA 21 /* DMA Interrupt */ +#define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */ +#define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */ +#define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */ +#define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */ +#define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */ +#define INT_BMI 27 /* BMI Interrupt */ + +#define NR_IRQS (INT_BMI + 1) + +#endif /* __ASM_ARCH_IRQS_H */ diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h new file mode 100644 index 000000000000..681b6a6171a1 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/memory.h @@ -0,0 +1,73 @@ +/* + * linux/include/asm-arm/arch-aaec2000/memory.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#include <linux/config.h> + +#define PHYS_OFFSET (0xf0000000UL) + +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + +#ifdef CONFIG_DISCONTIGMEM + +/* + * The nodes are the followings: + * + * node 0: 0xf000.0000 - 0xf3ff.ffff + * node 1: 0xf400.0000 - 0xf7ff.ffff + * node 2: 0xf800.0000 - 0xfbff.ffff + * node 3: 0xfc00.0000 - 0xffff.ffff + */ + +/* + * Given a kernel address, find the home node of the underlying memory. + */ +#define KVADDR_TO_NID(addr) \ + (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT) + +/* + * Given a page frame number, convert it to a node id. + */ +#define PFN_TO_NID(pfn) \ + (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT)) + +/* + * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory + * and return the mem_map of that node. + */ +#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr)) + +/* + * Given a page frame number, find the owning node of the memory + * and return the mem_map of that node. + */ +#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) + +/* + * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory + * and returns the index corresponding to the appropriate page in the + * node's mem_map. + */ +#define LOCAL_MAP_NR(addr) \ + (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT) + +#define NODE_MAX_MEM_SHIFT 26 +#define NODE_MAX_MEM_SIZE (1 << NODE_MAX_MEM_SHIFT) + +#else + +#define PFN_TO_NID(addr) (0) + +#endif /* CONFIG_DISCONTIGMEM */ + +#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/include/asm-arm/arch-aaec2000/param.h b/include/asm-arm/arch-aaec2000/param.h new file mode 100644 index 000000000000..139936c2faf2 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/param.h @@ -0,0 +1,15 @@ +/* + * linux/include/asm-arm/arch-aaec2000/param.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_PARAM_H +#define __ASM_ARCH_PARAM_H + +#endif /* __ASM_ARCH_PARAM_H */ + diff --git a/include/asm-arm/arch-aaec2000/system.h b/include/asm-arm/arch-aaec2000/system.h new file mode 100644 index 000000000000..08de97b407a8 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/system.h @@ -0,0 +1,24 @@ +/* + * linux/include/asm-arm/arch-aaed2000/system.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode) +{ + cpu_reset(0); +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/include/asm-arm/arch-aaec2000/timex.h b/include/asm-arm/arch-aaec2000/timex.h new file mode 100644 index 000000000000..f5708b38fb7f --- /dev/null +++ b/include/asm-arm/arch-aaec2000/timex.h @@ -0,0 +1,18 @@ +/* + * linux/include/asm-arm/arch-aaec2000/timex.h + * + * AAEC-2000 Architecture timex specification + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H + +#define CLOCK_TICK_RATE 508000 + +#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/include/asm-arm/arch-aaec2000/uncompress.h b/include/asm-arm/arch-aaec2000/uncompress.h new file mode 100644 index 000000000000..fff0c94b75c4 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/uncompress.h @@ -0,0 +1,47 @@ +/* + * linux/include/asm-arm/arch-aaec2000/uncompress.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include "hardware.h" + +#define UART(x) (*(volatile unsigned long *)(serial_port + (x))) + +static void putstr( const char *s ) +{ + unsigned long serial_port; + do { + serial_port = _UART3_BASE; + if (UART(UART_CR) & UART_CR_EN) break; + serial_port = _UART1_BASE; + if (UART(UART_CR) & UART_CR_EN) break; + serial_port = _UART2_BASE; + if (UART(UART_CR) & UART_CR_EN) break; + return; + } while (0); + + for (; *s; s++) { + /* wait for space in the UART's transmitter */ + while ((UART(UART_SR) & UART_SR_TxFF)); + /* send the character out. */ + UART(UART_DR) = *s; + /* if a LF, also do CR... */ + if (*s == 10) { + while ((UART(UART_SR) & UART_SR_TxFF)); + UART(UART_DR) = 13; + } + } +} + +#define arch_decomp_setup() +#define arch_decomp_wdog() + +#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/include/asm-arm/arch-aaec2000/vmalloc.h b/include/asm-arm/arch-aaec2000/vmalloc.h new file mode 100644 index 000000000000..ecb991e2e4ff --- /dev/null +++ b/include/asm-arm/arch-aaec2000/vmalloc.h @@ -0,0 +1,16 @@ +/* + * linux/include/asm-arm/arch-aaec2000/vmalloc.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H + +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) + +#endif /* __ASM_ARCH_VMALLOC_H */ |