diff options
| -rw-r--r-- | tools/arch/ia64/include/asm/barrier.h | 48 | ||||
| -rw-r--r-- | tools/include/asm/barrier.h | 2 | ||||
| -rw-r--r-- | tools/perf/MANIFEST | 1 | ||||
| -rw-r--r-- | tools/perf/perf-sys.h | 3 |
4 files changed, 51 insertions, 3 deletions
diff --git a/tools/arch/ia64/include/asm/barrier.h b/tools/arch/ia64/include/asm/barrier.h new file mode 100644 index 000000000000..e4422b4b634e --- /dev/null +++ b/tools/arch/ia64/include/asm/barrier.h @@ -0,0 +1,48 @@ +/* + * Copied from the kernel sources to tools/: + * + * Memory barrier definitions. This is based on information published + * in the Processor Abstraction Layer and the System Abstraction Layer + * manual. + * + * Copyright (C) 1998-2003 Hewlett-Packard Co + * David Mosberger-Tang <davidm@hpl.hp.com> + * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com> + * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> + */ +#ifndef _TOOLS_LINUX_ASM_IA64_BARRIER_H +#define _TOOLS_LINUX_ASM_IA64_BARRIER_H + +#include <linux/compiler.h> + +/* + * Macros to force memory ordering. In these descriptions, "previous" + * and "subsequent" refer to program order; "visible" means that all + * architecturally visible effects of a memory access have occurred + * (at a minimum, this means the memory has been read or written). + * + * wmb(): Guarantees that all preceding stores to memory- + * like regions are visible before any subsequent + * stores and that all following stores will be + * visible only after all previous stores. + * rmb(): Like wmb(), but for reads. + * mb(): wmb()/rmb() combo, i.e., all previous memory + * accesses are visible before all subsequent + * accesses and vice versa. This is also known as + * a "fence." + * + * Note: "mb()" and its variants cannot be used as a fence to order + * accesses to memory mapped I/O registers. For that, mf.a needs to + * be used. However, we don't want to always use mf.a because (a) + * it's (presumably) much slower than mf and (b) mf.a is supported for + * sequential memory pages only. + */ + +/* XXX From arch/ia64/include/uapi/asm/gcc_intrin.h */ +#define ia64_mf() asm volatile ("mf" ::: "memory") + +#define mb() ia64_mf() +#define rmb() mb() +#define wmb() mb() + +#endif /* _TOOLS_LINUX_ASM_IA64_BARRIER_H */ diff --git a/tools/include/asm/barrier.h b/tools/include/asm/barrier.h index a579a2e85711..659aa604ee8a 100644 --- a/tools/include/asm/barrier.h +++ b/tools/include/asm/barrier.h @@ -10,4 +10,6 @@ #include "../../arch/sparc/include/asm/barrier.h" #elif defined(__alpha__) #include "../../arch/alpha/include/asm/barrier.h" +#elif defined(__ia64__) +#include "../../arch/ia64/include/asm/barrier.h" #endif diff --git a/tools/perf/MANIFEST b/tools/perf/MANIFEST index 9919ee3eae52..74981a63fbd6 100644 --- a/tools/perf/MANIFEST +++ b/tools/perf/MANIFEST @@ -1,5 +1,6 @@ tools/perf tools/arch/alpha/include/asm/barrier.h +tools/arch/ia64/include/asm/barrier.h tools/arch/powerpc/include/asm/barrier.h tools/arch/s390/include/asm/barrier.h tools/arch/sh/include/asm/barrier.h diff --git a/tools/perf/perf-sys.h b/tools/perf/perf-sys.h index 4710f057150d..79052fd1a695 100644 --- a/tools/perf/perf-sys.h +++ b/tools/perf/perf-sys.h @@ -65,9 +65,6 @@ #endif #ifdef __ia64__ -#define mb() asm volatile ("mf" ::: "memory") -#define wmb() asm volatile ("mf" ::: "memory") -#define rmb() asm volatile ("mf" ::: "memory") #define cpu_relax() asm volatile ("hint @pause" ::: "memory") #define CPUINFO_PROC {"model name"} #endif |