diff options
| -rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 16 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 7 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 7 |
4 files changed, 30 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index a67da2a03d91..66bf5b0efa12 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -39,9 +39,12 @@ <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, <&clks IMX6QDL_CLK_STEP>, <&clks IMX6QDL_CLK_PLL1_SW>, - <&clks IMX6QDL_CLK_PLL1_SYS>; + <&clks IMX6QDL_CLK_PLL1_SYS>, + <&clks IMX6QDL_PLL1_BYPASS>, + <&clks IMX6QDL_CLK_PLL1>, + <&clks IMX6QDL_PLL1_BYPASS_SRC> ; clock-names = "arm", "pll2_pfd2_396m", "step", - "pll1_sw", "pll1_sys"; + "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src"; arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; @@ -58,8 +61,13 @@ soc { busfreq { compatible = "fsl,imx6_busfreq"; - clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>, - <&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>, <&clks 230>, <&clks 22> , <&clks 8>; + clocks = <&clks IMX6QDL_CLK_PLL2_BUS>, <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, + <&clks IMX6QDL_CLK_PLL2_198M>, <&clks IMX6QDL_CLK_ARM>, + <&clks IMX6QDL_CLK_PLL3_USB_OTG>, <&clks IMX6QDL_CLK_PERIPH>, + <&clks IMX6QDL_CLK_PERIPH_PRE>, <&clks IMX6QDL_CLK_PERIPH_CLK2>, + <&clks IMX6QDL_CLK_PERIPH_CLK2_SEL>, <&clks IMX6QDL_CLK_OSC>, + <&clks IMX6QDL_CLK_AXI_ALT_SEL>, <&clks IMX6QDL_CLK_AXI_SEL> , + <&clks IMX6QDL_CLK_PLL3_PFD1_540M>; clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "axi_alt_sel", "axi_sel", "pll3_pfd1_540m"; interrupts = <0 107 0x04>, <0 112 0x4>; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index cfda9d8aa008..16486119cc0f 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -47,9 +47,12 @@ <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, <&clks IMX6QDL_CLK_STEP>, <&clks IMX6QDL_CLK_PLL1_SW>, - <&clks IMX6QDL_CLK_PLL1_SYS>; + <&clks IMX6QDL_CLK_PLL1_SYS>, + <&clks IMX6QDL_PLL1_BYPASS>, + <&clks IMX6QDL_CLK_PLL1>, + <&clks IMX6QDL_PLL1_BYPASS_SRC> ; clock-names = "arm", "pll2_pfd2_396m", "step", - "pll1_sw", "pll1_sys"; + "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src"; arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 073c731fa8bb..1b1e5f319c93 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -61,9 +61,12 @@ clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>, <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>, - <&clks IMX6SL_CLK_PLL1_SYS>; + <&clks IMX6SL_CLK_PLL1_SYS>, + <&clks IMX6SL_PLL1_BYPASS>, + <&clks IMX6SL_CLK_PLL1>, + <&clks IMX6SL_PLL1_BYPASS_SRC> ; clock-names = "arm", "pll2_pfd2_396m", "step", - "pll1_sw", "pll1_sys"; + "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src"; arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; @@ -118,11 +121,12 @@ <&clks IMX6SL_CLK_PLL1_SW>, <&clks IMX6SL_CLK_PRE_PERIPH2_SEL>, <&clks IMX6SL_CLK_PERIPH2_CLK2_SEL>, <&clks IMX6SL_CLK_PERIPH2_CLK2_PODF>, <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_PLL2_BYPASS_SRC>, <&clks IMX6SL_PLL2_BYPASS>, - <&clks IMX6SL_CLK_PLL2>; + <&clks IMX6SL_CLK_PLL2>, <&clks IMX6SL_CLK_PLL1>, <&clks IMX6SL_PLL1_BYPASS>, + <&clks IMX6SL_PLL1_BYPASS_SRC>; clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "pll1_sys", "periph2", "ahb", "ocram", "pll1_sw", "periph2_pre", "periph2_clk2_sel", "periph2_clk2", "step", "pll2_bypass_src", - "pll2_bypass", "pll2"; + "pll2_bypass", "pll2", "pll1", "pll1_bypass", "pll1_bypass_src"; fsl,max_ddr_freq = <400000000>; }; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 2a05307b0333..d4d6d4586e36 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -76,9 +76,12 @@ <&clks IMX6SX_CLK_PLL2_PFD2>, <&clks IMX6SX_CLK_STEP>, <&clks IMX6SX_CLK_PLL1_SW>, - <&clks IMX6SX_CLK_PLL1_SYS>; + <&clks IMX6SX_CLK_PLL1_SYS>, + <&clks IMX6SX_PLL1_BYPASS>, + <&clks IMX6SX_CLK_PLL1>, + <&clks IMX6SX_PLL1_BYPASS_SRC> ; clock-names = "arm", "pll2_pfd2_396m", "step", - "pll1_sw", "pll1_sys"; + "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src"; arm-supply = <®_arm>; soc-supply = <®_soc>; }; |