diff options
| -rw-r--r-- | arch/arm/mach-tegra/clock.h | 8 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra11_clocks.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra12_clocks.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra14_clocks.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra_cl_dvfs.c | 2 |
5 files changed, 10 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h index 438f27903fb8..f9fa228ae217 100644 --- a/arch/arm/mach-tegra/clock.h +++ b/arch/arm/mach-tegra/clock.h @@ -2,12 +2,11 @@ * arch/arm/mach-tegra/include/mach/clock.h * * Copyright (C) 2010 Google, Inc. - * Copyright (c) 2012 NVIDIA CORPORATION. All rights reserved. * * Author: * Colin Cross <ccross@google.com> * - * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2010-2014, NVIDIA Corporation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -405,6 +404,11 @@ struct clk *tegra_get_clock_by_name(const char *name); void tegra_clk_init_from_table(struct tegra_clk_init_table *table); #ifndef CONFIG_COMMON_CLK +static inline void clk_set_cl_dvfs_data(struct clk *c, void *cld) +{ + c->u.dfll.cl_dvfs = cld; +} + static inline bool clk_is_auto_dvfs(struct clk *c) { return c->auto_dvfs; diff --git a/arch/arm/mach-tegra/tegra11_clocks.c b/arch/arm/mach-tegra/tegra11_clocks.c index 01746afd8e9b..a552d1202dad 100644 --- a/arch/arm/mach-tegra/tegra11_clocks.c +++ b/arch/arm/mach-tegra/tegra11_clocks.c @@ -1,7 +1,7 @@ /* * arch/arm/mach-tegra/tegra11_clocks.c * - * Copyright (c) 2011-2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -3588,7 +3588,6 @@ static void __init tegra11_dfll_cpu_late_init(struct clk *c) ret = tegra_init_cl_dvfs(); if (!ret) { c->state = OFF; - c->u.dfll.cl_dvfs = platform_get_drvdata(&tegra_cl_dvfs_device); use_dfll = CONFIG_TEGRA_USE_DFLL_RANGE; tegra_dvfs_set_dfll_range(cpu->dvfs, use_dfll); diff --git a/arch/arm/mach-tegra/tegra12_clocks.c b/arch/arm/mach-tegra/tegra12_clocks.c index c686b43d5bc5..57233b1e76eb 100644 --- a/arch/arm/mach-tegra/tegra12_clocks.c +++ b/arch/arm/mach-tegra/tegra12_clocks.c @@ -4030,7 +4030,6 @@ static void __init tegra12_dfll_cpu_late_init(struct clk *c) ret = tegra_init_cl_dvfs(); if (!ret) { c->state = OFF; - c->u.dfll.cl_dvfs = platform_get_drvdata(&tegra_cl_dvfs_device); if (tegra_platform_is_silicon()) use_dfll = CONFIG_TEGRA_USE_DFLL_RANGE; tegra_dvfs_set_dfll_range(cpu->dvfs, use_dfll); diff --git a/arch/arm/mach-tegra/tegra14_clocks.c b/arch/arm/mach-tegra/tegra14_clocks.c index a6603a480159..183792b6b030 100644 --- a/arch/arm/mach-tegra/tegra14_clocks.c +++ b/arch/arm/mach-tegra/tegra14_clocks.c @@ -1,7 +1,7 @@ /* * arch/arm/mach-tegra/tegra14_clocks.c * - * Copyright (c) 2013 NVIDIA Corporation. All rights reserved. + * Copyright (c) 2013-2014 NVIDIA Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -3186,7 +3186,6 @@ static void __init tegra14_dfll_cpu_late_init(struct clk *c) ret = tegra_init_cl_dvfs(); if (!ret) { c->state = OFF; - c->u.dfll.cl_dvfs = platform_get_drvdata(&tegra_cl_dvfs_device); use_dfll = CONFIG_TEGRA_USE_DFLL_RANGE; tegra_dvfs_set_dfll_range(cpu->dvfs, use_dfll); diff --git a/arch/arm/mach-tegra/tegra_cl_dvfs.c b/arch/arm/mach-tegra/tegra_cl_dvfs.c index fec1e443e366..bb9000475271 100644 --- a/arch/arm/mach-tegra/tegra_cl_dvfs.c +++ b/arch/arm/mach-tegra/tegra_cl_dvfs.c @@ -1481,6 +1481,8 @@ static int cl_dvfs_init(struct tegra_cl_dvfs *cld) cl_dvfs_init_cntrl_logic(cld); cl_dvfs_disable_clocks(cld); + /* Set target clock cl_dvfs data */ + clk_set_cl_dvfs_data(cld->dfll_clk, cld); return 0; } |