diff options
-rw-r--r-- | arch/arm/configs/omap1_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap1/Kconfig | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap1/board-ams-delta.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-omap1/clock.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap1/clock_data.c | 53 | ||||
-rw-r--r-- | arch/arm/mach-omap1/devices.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cpuidle34xx.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/io.h | 0 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_l3_noc.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/smartreflex.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/twl-common.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-omap2/twl-common.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/clock.h | 2 |
16 files changed, 70 insertions, 42 deletions
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig index 7b63462b349d..a7e777581378 100644 --- a/arch/arm/configs/omap1_defconfig +++ b/arch/arm/configs/omap1_defconfig @@ -48,7 +48,6 @@ CONFIG_MACH_SX1=y CONFIG_MACH_NOKIA770=y CONFIG_MACH_AMS_DELTA=y CONFIG_MACH_OMAP_GENERIC=y -CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y CONFIG_OMAP_ARM_216MHZ=y CONFIG_OMAP_ARM_195MHZ=y CONFIG_OMAP_ARM_192MHZ=y diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index e0a028161dde..73f287d6429b 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -171,14 +171,6 @@ config MACH_OMAP_GENERIC comment "OMAP CPU Speed" depends on ARCH_OMAP1 -config OMAP_CLOCKS_SET_BY_BOOTLOADER - bool "OMAP clocks set by bootloader" - depends on ARCH_OMAP1 - help - Enable this option to prevent the kernel from overriding the clock - frequencies programmed by bootloader for MPU, DSP, MMUs, TC, - internal LCD controller and MPU peripherals. - config OMAP_ARM_216MHZ bool "OMAP ARM 216 MHz CPU (1710 only)" depends on ARCH_OMAP1 && ARCH_OMAP16XX diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 51bae31cf361..b0f15d234a12 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -302,8 +302,6 @@ static void __init ams_delta_init(void) omap_cfg_reg(J19_1610_CAM_D6); omap_cfg_reg(J18_1610_CAM_D7); - iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc)); - omap_board_config = ams_delta_config; omap_board_config_size = ARRAY_SIZE(ams_delta_config); omap_serial_init(); @@ -373,10 +371,16 @@ static int __init ams_delta_modem_init(void) } arch_initcall(ams_delta_modem_init); +static void __init ams_delta_map_io(void) +{ + omap15xx_map_io(); + iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc)); +} + MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") /* Maintainer: Jonathan McDowell <noodles@earth.li> */ .atag_offset = 0x100, - .map_io = omap15xx_map_io, + .map_io = ams_delta_map_io, .init_early = omap1_init_early, .reserve = omap_reserve, .init_irq = omap1_init_irq, diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index eaf09efb91ca..16b1423b454a 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -17,7 +17,8 @@ #include <plat/clock.h> -extern int __init omap1_clk_init(void); +int omap1_clk_init(void); +void omap1_clk_late_init(void); extern int omap1_clk_enable(struct clk *clk); extern void omap1_clk_disable(struct clk *clk); extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 92400b9eb69f..1297bb58869c 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -767,6 +767,15 @@ static struct clk_functions omap1_clk_functions = { .clk_disable_unused = omap1_clk_disable_unused, }; +static void __init omap1_show_rates(void) +{ + pr_notice("Clocking rate (xtal/DPLL1/MPU): " + "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", + ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, + ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, + arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); +} + int __init omap1_clk_init(void) { struct omap_clk *c; @@ -835,9 +844,12 @@ int __init omap1_clk_init(void) /* We want to be in syncronous scalable mode */ omap_writew(0x1000, ARM_SYSST); -#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER - /* Use values set by bootloader. Determine PLL rate and recalculate - * dependent clocks as if kernel had changed PLL or divisors. + + /* + * Initially use the values set by bootloader. Determine PLL rate and + * recalculate dependent clocks as if kernel had changed PLL or + * divisors. See also omap1_clk_late_init() that can reprogram dpll1 + * after the SRAM is initialized. */ { unsigned pll_ctl_val = omap_readw(DPLL_CTL); @@ -862,25 +874,10 @@ int __init omap1_clk_init(void) } } } -#else - /* Find the highest supported frequency and enable it */ - if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { - printk(KERN_ERR "System frequencies not set. Check your config.\n"); - /* Guess sane values (60MHz) */ - omap_writew(0x2290, DPLL_CTL); - omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL); - ck_dpll1.rate = 60000000; - } -#endif propagate_rate(&ck_dpll1); /* Cache rates for clocks connected to ck_ref (not dpll1) */ propagate_rate(&ck_ref); - printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): " - "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", - ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, - ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, - arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); - + omap1_show_rates(); if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { /* Select slicer output as OMAP input clock */ omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, @@ -925,3 +922,21 @@ int __init omap1_clk_init(void) return 0; } + +#define OMAP1_DPLL1_SANE_VALUE 60000000 + +void __init omap1_clk_late_init(void) +{ + if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE) + return; + + /* Find the highest supported frequency and enable it */ + if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { + pr_err("System frequencies not set, using default. Check your config.\n"); + omap_writew(0x2290, DPLL_CTL); + omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL); + ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE; + } + propagate_rate(&ck_dpll1); + omap1_show_rates(); +} diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 48ef9888e820..475cb2f50d87 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -30,6 +30,8 @@ #include <plat/omap7xx.h> #include <plat/mcbsp.h> +#include "clock.h" + /*-------------------------------------------------------------------------*/ #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE) @@ -293,6 +295,7 @@ static int __init omap1_init_devices(void) return -ENODEV; omap_sram_init(); + omap1_clk_late_init(); /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 503414718905..e1293aa513d3 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -334,6 +334,7 @@ config MACH_OMAP4_PANDA config OMAP3_EMU bool "OMAP3 debugging peripherals" depends on ARCH_OMAP3 + select ARM_AMBA select OC_ETM help Say Y here to enable debugging hardware of omap3 diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 1fe35c24fba2..942bb4f19f9f 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -24,6 +24,7 @@ #include <linux/sched.h> #include <linux/cpuidle.h> +#include <linux/export.h> #include <plat/prcm.h> #include <plat/irqs.h> diff --git a/arch/arm/mach-omap2/io.h b/arch/arm/mach-omap2/io.h deleted file mode 100644 index e69de29bb2d1..000000000000 --- a/arch/arm/mach-omap2/io.h +++ /dev/null diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 6b3088db83b7..207a2ff9a8c4 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -749,7 +749,7 @@ static int _count_mpu_irqs(struct omap_hwmod *oh) ohii = &oh->mpu_irqs[i++]; } while (ohii->irq != -1); - return i; + return i-1; } /** @@ -772,7 +772,7 @@ static int _count_sdma_reqs(struct omap_hwmod *oh) ohdi = &oh->sdma_reqs[i++]; } while (ohdi->dma_req != -1); - return i; + return i-1; } /** @@ -795,7 +795,7 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) mem = &os->addr[i++]; } while (mem->pa_start != mem->pa_end); - return i; + return i-1; } /** diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index 6a66aa5e2a5b..d15225ff5c49 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -237,7 +237,7 @@ static int __devexit omap4_l3_remove(struct platform_device *pdev) static const struct of_device_id l3_noc_match[] = { {.compatible = "ti,omap4-l3-noc", }, {}, -} +}; MODULE_DEVICE_TABLE(of, l3_noc_match); #else #define l3_noc_match NULL diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 1e79bdf313e3..00bff46ca48b 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -24,6 +24,7 @@ #include "powerdomain.h" #include "clockdomain.h" #include "pm.h" +#include "twl-common.h" static struct omap_device_pm_latency *pm_lats; @@ -226,11 +227,8 @@ postcore_initcall(omap2_common_pm_init); static int __init omap2_common_pm_late_init(void) { - /* Init the OMAP TWL parameters */ - omap3_twl_init(); - omap4_twl_init(); - /* Init the voltage layer */ + omap_pmic_late_init(); omap_voltage_late_init(); /* Initialize the voltages */ diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 6a4f6839a7d9..cf246b39bac7 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -139,7 +139,7 @@ static irqreturn_t sr_interrupt(int irq, void *data) sr_write_reg(sr_info, ERRCONFIG_V1, status); } else if (sr_info->ip_type == SR_TYPE_V2) { /* Read the status bits */ - sr_read_reg(sr_info, IRQSTATUS); + status = sr_read_reg(sr_info, IRQSTATUS); /* Clear them by writing back */ sr_write_reg(sr_info, IRQSTATUS, status); diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 522435772168..10b20c652e5d 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c @@ -30,6 +30,7 @@ #include <plat/usb.h> #include "twl-common.h" +#include "pm.h" static struct i2c_board_info __initdata pmic_i2c_board_info = { .addr = 0x48, @@ -48,6 +49,16 @@ void __init omap_pmic_init(int bus, u32 clkrate, omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); } +void __init omap_pmic_late_init(void) +{ + /* Init the OMAP TWL parameters (if PMIC has been registerd) */ + if (!pmic_i2c_board_info.irq) + return; + + omap3_twl_init(); + omap4_twl_init(); +} + #if defined(CONFIG_ARCH_OMAP3) static struct twl4030_usb_data omap3_usb_pdata = { .usb_mode = T2_USB_MODE_ULPI, diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h index 5e83a5bd37fb..275dde8cb27a 100644 --- a/arch/arm/mach-omap2/twl-common.h +++ b/arch/arm/mach-omap2/twl-common.h @@ -1,6 +1,8 @@ #ifndef __OMAP_PMIC_COMMON__ #define __OMAP_PMIC_COMMON__ +#include <plat/irqs.h> + #define TWL_COMMON_PDATA_USB (1 << 0) #define TWL_COMMON_PDATA_BCI (1 << 1) #define TWL_COMMON_PDATA_MADC (1 << 2) @@ -30,6 +32,7 @@ struct twl4030_platform_data; void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, struct twl4030_platform_data *pmic_data); +void omap_pmic_late_init(void); static inline void omap2_pmic_init(const char *pmic_type, struct twl4030_platform_data *pmic_data) diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 197ca03c3f7d..eb73ab40e955 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h @@ -165,8 +165,8 @@ struct dpll_data { u8 auto_recal_bit; u8 recal_en_bit; u8 recal_st_bit; - u8 flags; # endif + u8 flags; }; #endif |