diff options
-rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabreauto.c | 9 | ||||
-rwxr-xr-x | arch/arm/mach-mx6/board-mx6sl_arm2.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx6/board-mx6sl_evk.c | 2 | ||||
-rwxr-xr-x | arch/arm/mach-mx6/clock_mx6sl.c | 37 | ||||
-rw-r--r-- | arch/arm/mach-mx6/pm.c | 53 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/epdc.h | 1 | ||||
-rw-r--r-- | drivers/dma/imx-sdma.c | 52 | ||||
-rw-r--r-- | drivers/dma/pxp/pxp_dma_v2.c | 23 | ||||
-rw-r--r-- | drivers/media/video/mxc/capture/csi_v4l2_capture.c | 6 | ||||
-rw-r--r-- | drivers/video/mxc/mxc_elcdif_fb.c | 9 | ||||
-rw-r--r-- | drivers/video/mxc/mxc_epdc_fb.c | 5 | ||||
-rw-r--r-- | include/linux/fsl_devices.h | 1 |
12 files changed, 82 insertions, 118 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_sabreauto.c b/arch/arm/mach-mx6/board-mx6q_sabreauto.c index e5378ba92cf6..86d6b1858e95 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabreauto.c +++ b/arch/arm/mach-mx6/board-mx6q_sabreauto.c @@ -1145,6 +1145,15 @@ static int flexcan1_en; static void mx6q_flexcan_switch(void) { if (flexcan0_en || flexcan1_en) { + /* + * The transceiver TJA1041A on sabreauto RevE baseboard will + * fail to transit to Normal state if EN/STBY is high by default + * after board power up. So we set the EN/STBY initial state to low + * first then to high to guarantee the state transition successfully. + */ + gpio_set_value_cansleep(SABREAUTO_CAN_EN, 0); + gpio_set_value_cansleep(SABREAUTO_CAN_STBY, 0); + gpio_set_value_cansleep(SABREAUTO_CAN_EN, 1); gpio_set_value_cansleep(SABREAUTO_CAN_STBY, 1); /* Enable STEER pin if CAN1 interface is required. diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 09d3c182ec45..a29f3bcb9b07 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -877,7 +877,6 @@ static struct imx_epdc_fb_platform_data epdc_data = { .put_pins = epdc_put_pins, .enable_pins = epdc_enable_pins, .disable_pins = epdc_disable_pins, - .pg_display_mix = true, }; static int spdc_get_pins(void) @@ -1105,7 +1104,6 @@ static struct mxc_fb_platform_data fb_data[] = { .mode_str = "SEIKO-WVGA", .mode = video_modes, .num_modes = ARRAY_SIZE(video_modes), - .pg_display_mix = true, }, }; diff --git a/arch/arm/mach-mx6/board-mx6sl_evk.c b/arch/arm/mach-mx6/board-mx6sl_evk.c index 7561ba90fa15..adc8b463b78b 100644 --- a/arch/arm/mach-mx6/board-mx6sl_evk.c +++ b/arch/arm/mach-mx6/board-mx6sl_evk.c @@ -1084,7 +1084,6 @@ static struct imx_epdc_fb_platform_data epdc_data = { .put_pins = epdc_put_pins, .enable_pins = epdc_enable_pins, .disable_pins = epdc_disable_pins, - .pg_display_mix = true, }; static int spdc_get_pins(void) @@ -1317,7 +1316,6 @@ static struct mxc_fb_platform_data wvga_fb_data[] = { .mode_str = "SEIKO-WVGA", .mode = wvga_video_modes, .num_modes = ARRAY_SIZE(wvga_video_modes), - .pg_display_mix = true, }, }; diff --git a/arch/arm/mach-mx6/clock_mx6sl.c b/arch/arm/mach-mx6/clock_mx6sl.c index e95c45484362..f375b4ac9dd4 100755 --- a/arch/arm/mach-mx6/clock_mx6sl.c +++ b/arch/arm/mach-mx6/clock_mx6sl.c @@ -89,11 +89,6 @@ DEFINE_SPINLOCK(mx6sl_clk_lock); #define MXC_TPRER 0x04 #define V2_TPRER_PRE24M_OFFSET 12 #define V2_TPRER_PRE24M_MASK 0xF -#define GPC_CNTR_OFFSET 0x0 -#define GPC_PGC_DISP_PGCR_OFFSET 0x240 -#define GPC_PGC_DISP_PUPSCR_OFFSET 0x244 -#define GPC_PGC_DISP_PDNSCR_OFFSET 0x248 -#define GPC_PGC_DISP_SR_OFFSET 0x24c /* We need to check the exp status again after timer expiration, * as there might be interrupt coming between the first time exp @@ -1904,33 +1899,6 @@ static struct clk i2c_clk[] = { }, }; -static int _display_mix_enable(struct clk *clk) -{ - if (cpu_is_mx6sl() && (mx6sl_revision() >= IMX_CHIP_REVISION_1_2)) { - __raw_writel(0x0, gpc_base + GPC_PGC_DISP_PGCR_OFFSET); - __raw_writel(0x20, gpc_base + GPC_CNTR_OFFSET); - __raw_writel(0x1, gpc_base + GPC_PGC_DISP_SR_OFFSET); - } - return 0; -} - -static void _display_mix_disable(struct clk *clk) -{ - if (cpu_is_mx6sl() && (mx6sl_revision() >= IMX_CHIP_REVISION_1_2)) { - __raw_writel(0x101, gpc_base + GPC_PGC_DISP_PUPSCR_OFFSET); - __raw_writel(0x101, gpc_base + GPC_PGC_DISP_PDNSCR_OFFSET); - - __raw_writel(0x1, gpc_base + GPC_PGC_DISP_PGCR_OFFSET); - __raw_writel(0x10, gpc_base + GPC_CNTR_OFFSET); - } -} - -static struct clk display_mix = { - __INIT_CLK_DEBUG(display_mix) - .enable = _display_mix_enable, - .disable = _display_mix_disable, -}; - static int _clk_ipu1_set_parent(struct clk *clk, struct clk *parent) { int mux; @@ -2069,7 +2037,6 @@ static struct clk ipu2_clk = { .set_rate = _clk_ipu2_set_rate, .get_rate = _clk_ipu2_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, - .secondary = &display_mix, }; static struct clk usdhc_dep_clk = { @@ -2836,7 +2803,6 @@ static struct clk pxp_axi_clk = { .round_rate = _clk_pxp_epdc_axi_round_rate, .get_rate = _clk_pxp_axi_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, - .secondary = &display_mix, }; static struct clk epdc_axi_clk = { @@ -2852,7 +2818,6 @@ static struct clk epdc_axi_clk = { .round_rate = _clk_pxp_epdc_axi_round_rate, .get_rate = _clk_epdc_axi_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, - .secondary = &display_mix, }; static unsigned long _clk_lcdif_pix_get_rate(struct clk *clk) @@ -3002,7 +2967,6 @@ static struct clk lcdif_pix_clk = { .round_rate = _clk_epdc_lcdif_pix_round_rate, .get_rate = _clk_lcdif_pix_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, - .secondary = &display_mix, }; static struct clk epdc_pix_clk = { @@ -3018,7 +2982,6 @@ static struct clk epdc_pix_clk = { .round_rate = _clk_epdc_lcdif_pix_round_rate, .get_rate = _clk_epdc_pix_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, - .secondary = &display_mix, }; static unsigned long _clk_spdif_round_rate(struct clk *clk, unsigned long rate) diff --git a/arch/arm/mach-mx6/pm.c b/arch/arm/mach-mx6/pm.c index f2efa00efb47..d9c04e11bed0 100644 --- a/arch/arm/mach-mx6/pm.c +++ b/arch/arm/mach-mx6/pm.c @@ -50,7 +50,11 @@ #define GPC_ISR3_OFFSET 0x20 #define GPC_ISR4_OFFSET 0x24 #define GPC_CNTR_OFFSET 0x0 -#define GPC_PGC_DISP_PGCR_OFFSET 0x240 +#define GPC_PGC_DISP_PGCR_OFFSET 0x240 +#define GPC_PGC_DISP_PUPSCR_OFFSET 0x244 +#define GPC_PGC_DISP_PDNSCR_OFFSET 0x248 +#define GPC_PGC_DISP_SR_OFFSET 0x24c +#define GPC_PGC_GPU_PGCR_OFFSET 0x260 #define GPC_PGC_CPU_PDN_OFFSET 0x2a0 #define GPC_PGC_CPU_PUPSCR_OFFSET 0x2a4 #define GPC_PGC_CPU_PDNSCR_OFFSET 0x2a8 @@ -170,6 +174,47 @@ static void usb_power_up_handler(void) } +static void disp_power_down(void) +{ + if (cpu_is_mx6sl() && (mx6sl_revision() >= IMX_CHIP_REVISION_1_2)) { + + __raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PUPSCR_OFFSET); + __raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PDNSCR_OFFSET); + + __raw_writel(0x1, gpc_base + GPC_PGC_DISP_PGCR_OFFSET); + __raw_writel(0x10, gpc_base + GPC_CNTR_OFFSET); + + /* Disable EPDC/LCDIF pix clock, and EPDC/LCDIF/PXP axi clock */ + __raw_writel(ccgr3 & + ~MXC_CCM_CCGRx_CG5_MASK & + ~MXC_CCM_CCGRx_CG4_MASK & + ~MXC_CCM_CCGRx_CG3_MASK & + ~MXC_CCM_CCGRx_CG2_MASK & + ~MXC_CCM_CCGRx_CG1_MASK, MXC_CCM_CCGR3); + + } +} + +static void disp_power_up(void) +{ + if (cpu_is_mx6sl() && (mx6sl_revision() >= IMX_CHIP_REVISION_1_2)) { + /* + * Need to enable EPDC/LCDIF pix clock, and + * EPDC/LCDIF/PXP axi clock before power up. + */ + __raw_writel(ccgr3 | + MXC_CCM_CCGRx_CG5_MASK | + MXC_CCM_CCGRx_CG4_MASK | + MXC_CCM_CCGRx_CG3_MASK | + MXC_CCM_CCGRx_CG2_MASK | + MXC_CCM_CCGRx_CG1_MASK, MXC_CCM_CCGR3); + + __raw_writel(0x0, gpc_base + GPC_PGC_DISP_PGCR_OFFSET); + __raw_writel(0x20, gpc_base + GPC_CNTR_OFFSET); + __raw_writel(0x1, gpc_base + GPC_PGC_DISP_SR_OFFSET); + } +} + static void mx6_suspend_store(void) { /* save some settings before suspend */ @@ -274,12 +319,14 @@ static int mx6_suspend_enter(suspend_state_t state) switch (state) { case PM_SUSPEND_MEM: + disp_power_down(); usb_power_down_handler(); mxc_cpu_lp_set(ARM_POWER_OFF); arm_pg = true; break; case PM_SUSPEND_STANDBY: if (cpu_is_mx6sl()) { + disp_power_down(); usb_power_down_handler(); mxc_cpu_lp_set(STOP_XTAL_ON); arm_pg = true; @@ -347,8 +394,10 @@ static int mx6_suspend_enter(suspend_state_t state) restore_gic_dist_state(0, &gds); restore_gic_cpu_state(0, &gcs); } - if (state == PM_SUSPEND_MEM || (cpu_is_mx6sl())) + if (state == PM_SUSPEND_MEM || (cpu_is_mx6sl())) { usb_power_up_handler(); + disp_power_up(); + } mx6_suspend_restore(); diff --git a/arch/arm/plat-mxc/include/mach/epdc.h b/arch/arm/plat-mxc/include/mach/epdc.h index 08fef76148f3..e6dae37d9a59 100644 --- a/arch/arm/plat-mxc/include/mach/epdc.h +++ b/arch/arm/plat-mxc/include/mach/epdc.h @@ -36,7 +36,6 @@ struct imx_epdc_fb_platform_data { void (*put_pins) (void); void (*enable_pins) (void); void (*disable_pins) (void); - bool pg_display_mix; }; struct imx_spdc_panel_init_set { diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index bee75e8c85c5..81434d6af1bb 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -339,34 +339,6 @@ struct sdma_engine { #define SDMA_H_CONFIG_ACR (1 << 4) /* indicates if AHB freq /core freq = 2 or 1 */ #define SDMA_H_CONFIG_CSM (3) /* indicates which context switch mode is selected*/ -#ifdef CONFIG_SDMA_IRAM -static unsigned long sdma_iram_paddr; -static void *sdma_iram_vaddr; -#define sdma_iram_phys_to_virt(p) (sdma_iram_vaddr + ((p) - sdma_iram_paddr)) -#define sdma_iram_virt_to_phys(v) (sdma_iram_paddr + ((v) - sdma_iram_vaddr)) -static struct gen_pool *sdma_iram_pool; - -/*! - * Allocates uncacheable buffer from IRAM - */ -void __iomem *sdma_iram_malloc(size_t size, unsigned long *buf) -{ - *buf = gen_pool_alloc(sdma_iram_pool, size); - if (!buf) - return NULL; - - return sdma_iram_phys_to_virt(*buf); -} - -void sdma_iram_free(unsigned long buf, size_t size) -{ - if (!sdma_iram_pool) - return; - - gen_pool_free(sdma_iram_pool, buf, size); -} -#endif /*CONFIG_SDMA_IRAM */ - static inline u32 chnenbl_ofs(struct sdma_engine *sdma, unsigned int event) { @@ -449,7 +421,7 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size, int ret; #ifdef CONFIG_SDMA_IRAM - buf_virt = sdma_iram_malloc(size, (unsigned long *)&buf_phys); + buf_virt = iram_alloc(size, (unsigned long *)&buf_phys); #else buf_virt = dma_alloc_coherent(NULL, size, @@ -472,7 +444,7 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size, spin_unlock_irqrestore(&sdma->channel_0_lock, flags); #ifdef CONFIG_SDMA_IRAM - sdma_iram_free(buf_phys, size); + iram_free(buf_phys, size); #else dma_free_coherent(NULL, size, buf_virt, buf_phys); #endif @@ -938,8 +910,7 @@ static int sdma_request_channel(struct sdma_channel *sdmac) int ret = -EBUSY; #ifdef CONFIG_SDMA_IRAM - sdmac->bd = sdma_iram_malloc(sizeof(sdmac->bd), - (unsigned long *)&sdmac->bd_phys); + sdmac->bd = iram_alloc(PAGE_SIZE, (unsigned long *)&sdmac->bd_phys); #else sdmac->bd = dma_alloc_noncached(NULL, PAGE_SIZE, &sdmac->bd_phys, GFP_KERNEL); #endif @@ -1106,7 +1077,7 @@ static void sdma_free_chan_resources(struct dma_chan *chan) sdma_set_channel_priority(sdmac, 0); #ifdef CONFIG_SDMA_IRAM - sdma_iram_free(sdmac->bd_phys, sizeof(sdmac->bd)); + iram_free(sdmac->bd_phys, PAGE_SIZE); #else dma_free_coherent(NULL, PAGE_SIZE, sdmac->bd, sdmac->bd_phys); #endif @@ -1494,12 +1465,7 @@ static int __init sdma_init(struct sdma_engine *sdma) writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); #ifdef CONFIG_SDMA_IRAM - /* Allocate memory for SDMA channel and buffer descriptors */ - sdma_iram_vaddr = iram_alloc(SZ_4K, &sdma_iram_paddr); - sdma_iram_pool = gen_pool_create(PAGE_SHIFT/2, -1); - gen_pool_add(sdma_iram_pool, sdma_iram_paddr, SZ_4K, -1); - - sdma->channel_control = sdma_iram_malloc(MAX_DMA_CHANNELS * + sdma->channel_control = iram_alloc(MAX_DMA_CHANNELS * sizeof(struct sdma_channel_control) + sizeof(struct sdma_context_data), (unsigned long *)&ccb_phys); @@ -1534,7 +1500,7 @@ static int __init sdma_init(struct sdma_engine *sdma) ret = sdma_request_channel(&sdma->channel[0]); if (ret) - goto err_dma_alloc; + goto err_dma_request; sdma_config_ownership(&sdma->channel[0], false, true, false); @@ -1557,6 +1523,12 @@ static int __init sdma_init(struct sdma_engine *sdma) return 0; +err_dma_request: +#ifdef CONFIG_SDMA_IRAM + iram_free((unsigned long)ccb_phys, MAX_DMA_CHANNELS + * sizeof(struct sdma_channel_control) + + sizeof(struct sdma_context_data)); +#endif err_dma_alloc: clk_disable(sdma->clk); dev_err(sdma->dev, "initialisation failed with %d\n", ret); diff --git a/drivers/dma/pxp/pxp_dma_v2.c b/drivers/dma/pxp/pxp_dma_v2.c index f0b50b7a1c05..7169b44a9bb3 100644 --- a/drivers/dma/pxp/pxp_dma_v2.c +++ b/drivers/dma/pxp/pxp_dma_v2.c @@ -800,8 +800,6 @@ static void pxp_clk_enable(struct pxps *pxp) } clk_enable(pxp->clk); - /* Pull PxP out of reset */ - __raw_writel(0, pxp->base + HW_PXP_CTRL); pxp->clk_stat = CLK_STAT_ON; mutex_unlock(&pxp->clk_mutex); @@ -820,13 +818,6 @@ static void pxp_clk_disable(struct pxps *pxp) spin_lock_irqsave(&pxp->lock, flags); if ((pxp->pxp_ongoing == 0) && list_empty(&head)) { - /* Put the PXP into reset as the Display MIX is going - * to be Power gated. - */ - while (__raw_readl(pxp->base + HW_PXP_CTRL) - & BM_PXP_CTRL_ENABLE) - ; - __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL); spin_unlock_irqrestore(&pxp->lock, flags); clk_disable(pxp->clk); pxp->clk_stat = CLK_STAT_OFF; @@ -1636,11 +1627,11 @@ static int pxp_suspend(struct platform_device *pdev, pm_message_t state) { struct pxps *pxp = platform_get_drvdata(pdev); - /* Need to call the enable/disable sequence here to - * ensure that the PXP is in the right state before the - * SOC enters suspend state. - */ pxp_clk_enable(pxp); + while (__raw_readl(pxp->base + HW_PXP_CTRL) & BM_PXP_CTRL_ENABLE) + ; + + __raw_writel(BM_PXP_CTRL_SFTRST, pxp->base + HW_PXP_CTRL); pxp_clk_disable(pxp); return 0; @@ -1650,11 +1641,9 @@ static int pxp_resume(struct platform_device *pdev) { struct pxps *pxp = platform_get_drvdata(pdev); - /* Need to call the enable/disable sequence here to - * ensure that the PXP is in the right state after the - * SOC exits suspend state. - */ pxp_clk_enable(pxp); + /* Pull PxP out of reset */ + __raw_writel(0, pxp->base + HW_PXP_CTRL); pxp_clk_disable(pxp); return 0; diff --git a/drivers/media/video/mxc/capture/csi_v4l2_capture.c b/drivers/media/video/mxc/capture/csi_v4l2_capture.c index 58cfa016b183..f2620d85bcc3 100644 --- a/drivers/media/video/mxc/capture/csi_v4l2_capture.c +++ b/drivers/media/video/mxc/capture/csi_v4l2_capture.c @@ -1065,11 +1065,11 @@ static int csi_v4l_dqueue(cam_data *cam, struct v4l2_buffer *buf) return retval; } pxp_complete_update(cam); + memcpy(cam->frame[buf->index].vaddress, + cam->frame[req_buf_number].vaddress, + cam->v2f.fmt.pix.sizeimage); } up(&cam->busy_lock); - memcpy(cam->frame[buf->index].vaddress, - cam->frame[req_buf_number].vaddress, - cam->v2f.fmt.pix.sizeimage); return retval; } diff --git a/drivers/video/mxc/mxc_elcdif_fb.c b/drivers/video/mxc/mxc_elcdif_fb.c index 2c38b0e9379c..b3691b540522 100644 --- a/drivers/video/mxc/mxc_elcdif_fb.c +++ b/drivers/video/mxc/mxc_elcdif_fb.c @@ -79,7 +79,6 @@ struct mxc_elcdif_fb_data { struct semaphore flip_sem; struct fb_var_screeninfo var; u32 pseudo_palette[16]; - bool pg_display_mix; }; struct elcdif_signal_cfg { @@ -1187,12 +1186,6 @@ static int mxc_elcdif_fb_blank(int blank, struct fb_info *info) } if (data->cur_blank != FB_BLANK_UNBLANK) { - - if (data->pg_display_mix) { - mxc_elcdif_stop(); - mxc_elcdif_dma_release(); - data->running = false; - } if (g_elcdif_axi_clk_enable) { clk_disable(g_elcdif_axi_clk); g_elcdif_axi_clk_enable = false; @@ -1499,8 +1492,6 @@ static int mxc_elcdif_fb_probe(struct platform_device *pdev) if (ret) goto err3; - data->pg_display_mix = pdata->pg_display_mix; - platform_set_drvdata(pdev, fbi); return 0; diff --git a/drivers/video/mxc/mxc_epdc_fb.c b/drivers/video/mxc/mxc_epdc_fb.c index 71697f2749d9..4103498dc1b0 100644 --- a/drivers/video/mxc/mxc_epdc_fb.c +++ b/drivers/video/mxc/mxc_epdc_fb.c @@ -1089,10 +1089,7 @@ static void epdc_powerup(struct mxc_epdc_fb_data *fb_data) clk_enable(fb_data->epdc_clk_axi); clk_enable(fb_data->epdc_clk_pix); - if (fb_data->pdata->pg_display_mix) - epdc_init_settings(fb_data); - else - __raw_writel(EPDC_CTRL_CLKGATE, EPDC_CTRL_CLEAR); + __raw_writel(EPDC_CTRL_CLKGATE, EPDC_CTRL_CLEAR); /* Enable power to the EPD panel */ ret = regulator_enable(fb_data->display_regulator); diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index 892cba580c22..ac56f18c53a3 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h @@ -247,7 +247,6 @@ struct mxc_fb_platform_data { int num_modes; char *mode_str; u32 interface_pix_fmt; - bool pg_display_mix; }; struct fsl_mxc_lcd_platform_data { |