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-rw-r--r--arch/arm/mach-tegra/board-ventana.c4
-rw-r--r--arch/arm/mach-tegra/board-whistler.c4
-rw-r--r--arch/arm/mach-tegra/usb_phy.c39
3 files changed, 31 insertions, 16 deletions
diff --git a/arch/arm/mach-tegra/board-ventana.c b/arch/arm/mach-tegra/board-ventana.c
index 01141d50c160..4fa547467307 100644
--- a/arch/arm/mach-tegra/board-ventana.c
+++ b/arch/arm/mach-tegra/board-ventana.c
@@ -113,7 +113,7 @@ static struct tegra_audio_platform_data tegra_spdif_pdata = {
static struct tegra_utmip_config utmi_phy_config[] = {
[0] = {
- .hssync_start_delay = 0,
+ .hssync_start_delay = 9,
.idle_wait_delay = 17,
.elastic_limit = 16,
.term_range_adj = 6,
@@ -122,7 +122,7 @@ static struct tegra_utmip_config utmi_phy_config[] = {
.xcvr_lsrslew = 2,
},
[1] = {
- .hssync_start_delay = 0,
+ .hssync_start_delay = 9,
.idle_wait_delay = 17,
.elastic_limit = 16,
.term_range_adj = 6,
diff --git a/arch/arm/mach-tegra/board-whistler.c b/arch/arm/mach-tegra/board-whistler.c
index eac91ca844c1..e7a2827f192b 100644
--- a/arch/arm/mach-tegra/board-whistler.c
+++ b/arch/arm/mach-tegra/board-whistler.c
@@ -127,7 +127,7 @@ static inline void whistler_bt_rfkill(void) { }
static struct tegra_utmip_config utmi_phy_config[] = {
[0] = {
- .hssync_start_delay = 0,
+ .hssync_start_delay = 9,
.idle_wait_delay = 17,
.elastic_limit = 16,
.term_range_adj = 6,
@@ -136,7 +136,7 @@ static struct tegra_utmip_config utmi_phy_config[] = {
.xcvr_lsrslew = 2,
},
[1] = {
- .hssync_start_delay = 0,
+ .hssync_start_delay = 9,
.idle_wait_delay = 17,
.elastic_limit = 16,
.term_range_adj = 6,
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
index d7bc6180f94a..47e0155cc80a 100644
--- a/arch/arm/mach-tegra/usb_phy.c
+++ b/arch/arm/mach-tegra/usb_phy.c
@@ -126,6 +126,7 @@
#define UTMIP_FORCE_PD_POWERDOWN (1 << 14)
#define UTMIP_FORCE_PD2_POWERDOWN (1 << 16)
#define UTMIP_FORCE_PDZI_POWERDOWN (1 << 18)
+#define UTMIP_XCVR_LSBIAS_SEL (1 << 21)
#define UTMIP_XCVR_HSSLEW_MSB(x) (((x) & 0x7f) << 25)
#define UTMIP_BIAS_CFG0 0x80c
@@ -233,6 +234,7 @@ struct tegra_xtal_freq {
u8 active_delay;
u16 xtal_freq_count;
u16 debounce;
+ u8 pdtrk_count;
};
static const struct tegra_xtal_freq tegra_freq_table[] = {
@@ -243,6 +245,7 @@ static const struct tegra_xtal_freq tegra_freq_table[] = {
.active_delay = 0x04,
.xtal_freq_count = 0x76,
.debounce = 0x7530,
+ .pdtrk_count = 5,
},
{
.freq = 13000000,
@@ -251,6 +254,7 @@ static const struct tegra_xtal_freq tegra_freq_table[] = {
.active_delay = 0x05,
.xtal_freq_count = 0x7F,
.debounce = 0x7EF4,
+ .pdtrk_count = 5,
},
{
.freq = 19200000,
@@ -259,6 +263,7 @@ static const struct tegra_xtal_freq tegra_freq_table[] = {
.active_delay = 0x06,
.xtal_freq_count = 0xBB,
.debounce = 0xBB80,
+ .pdtrk_count = 7,
},
{
.freq = 26000000,
@@ -267,6 +272,7 @@ static const struct tegra_xtal_freq tegra_freq_table[] = {
.active_delay = 0x09,
.xtal_freq_count = 0xFE,
.debounce = 0xFDE8,
+ .pdtrk_count = 9,
},
};
@@ -308,8 +314,8 @@ static struct tegra_utmip_config utmip_default[] = {
.elastic_limit = 16,
.term_range_adj = 6,
.xcvr_setup = 9,
- .xcvr_lsfslew = 1,
- .xcvr_lsrslew = 1,
+ .xcvr_lsfslew = 2,
+ .xcvr_lsrslew = 2,
},
[2] = {
.hssync_start_delay = 9,
@@ -532,7 +538,7 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
}
val = readl(base + UTMIP_TX_CFG0);
- val &= ~UTMIP_FS_PREABMLE_J;
+ val |= UTMIP_FS_PREABMLE_J;
writel(val, base + UTMIP_TX_CFG0);
val = readl(base + UTMIP_HSRX_CFG0);
@@ -576,10 +582,10 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
utmip_pad_power_on(phy);
val = readl(base + UTMIP_XCVR_CFG0);
- val &= ~(UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
- UTMIP_FORCE_PDZI_POWERDOWN | UTMIP_XCVR_SETUP(~0) |
- UTMIP_XCVR_LSFSLEW(~0) | UTMIP_XCVR_LSRSLEW(~0) |
- UTMIP_XCVR_HSSLEW_MSB(~0));
+ val &= ~(UTMIP_XCVR_LSBIAS_SEL | UTMIP_FORCE_PD_POWERDOWN |
+ UTMIP_FORCE_PD2_POWERDOWN |UTMIP_FORCE_PDZI_POWERDOWN |
+ UTMIP_XCVR_SETUP(~0) | UTMIP_XCVR_LSFSLEW(~0) |
+ UTMIP_XCVR_LSRSLEW(~0) | UTMIP_XCVR_HSSLEW_MSB(~0));
val |= UTMIP_XCVR_SETUP(config->xcvr_setup);
val |= UTMIP_XCVR_LSFSLEW(config->xcvr_lsfslew);
val |= UTMIP_XCVR_LSRSLEW(config->xcvr_lsrslew);
@@ -592,12 +598,15 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
writel(val, base + UTMIP_XCVR_CFG1);
val = readl(base + UTMIP_BAT_CHRG_CFG0);
- val &= ~UTMIP_PD_CHRG;
+ if (phy->mode == TEGRA_USB_PHY_MODE_HOST)
+ val |= UTMIP_PD_CHRG;
+ else
+ val &= ~UTMIP_PD_CHRG;
writel(val, base + UTMIP_BAT_CHRG_CFG0);
val = readl(base + UTMIP_BIAS_CFG1);
val &= ~UTMIP_BIAS_PDTRK_COUNT(~0);
- val |= UTMIP_BIAS_PDTRK_COUNT(0x5);
+ val |= UTMIP_BIAS_PDTRK_COUNT(phy->freq->pdtrk_count);
writel(val, base + UTMIP_BIAS_CFG1);
if (phy->instance == 0) {
@@ -610,6 +619,10 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
}
if (phy->instance == 2) {
+ val = readl(base + UTMIP_SPARE_CFG0);
+ val |= FUSE_SETUP_SEL;
+ writel(val, base + UTMIP_SPARE_CFG0);
+
val = readl(base + USB_SUSP_CTRL);
val |= UTMIP_PHY_ENABLE;
writel(val, base + USB_SUSP_CTRL);
@@ -666,9 +679,11 @@ static void utmi_phy_power_off(struct tegra_usb_phy *phy)
val |= UTMIP_RESET;
writel(val, base + USB_SUSP_CTRL);
- val = readl(base + UTMIP_BAT_CHRG_CFG0);
- val |= UTMIP_PD_CHRG;
- writel(val, base + UTMIP_BAT_CHRG_CFG0);
+ if (phy->mode == TEGRA_USB_PHY_MODE_DEVICE) {
+ val = readl(base + UTMIP_BAT_CHRG_CFG0);
+ val |= UTMIP_PD_CHRG;
+ writel(val, base + UTMIP_BAT_CHRG_CFG0);
+ }
val = readl(base + UTMIP_XCVR_CFG0);
val |= UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
generated by cgit v1.2.3 (git 2.0.4) at 2024-11-11 18:47:12 +0000