diff options
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/tegra-swgid.h | 95 | ||||
| -rw-r--r-- | drivers/iommu/tegra-smmu.c | 22 |
2 files changed, 49 insertions, 68 deletions
diff --git a/arch/arm/mach-tegra/include/mach/tegra-swgid.h b/arch/arm/mach-tegra/include/mach/tegra-swgid.h index 447f48fe8843..97ddf0a80f54 100644 --- a/arch/arm/mach-tegra/include/mach/tegra-swgid.h +++ b/arch/arm/mach-tegra/include/mach/tegra-swgid.h @@ -5,66 +5,41 @@ #ifndef DT_BINDINGS_IOMMU_TEGRA_SWGID_H #define DT_BINDINGS_IOMMU_TEGRA_SWGID_H -#define SWGID_AFI 0 -#define SWGID_AVPC 1 -#define SWGID_DC 2 -#define SWGID_DCB 3 -#define SWGID_EPP 4 -#define SWGID_G2 5 -#define SWGID_HC 6 -#define SWGID_HDA 7 -#define SWGID_ISP 8 -#define SWGID_ISP2 SWGID_ISP -/* UNUSED: 9 */ -/* UNUSED: 10 */ -#define SWGID_MPE 11 -#define SWGID_MSENC SWGID_MPE -#define SWGID_NV 12 -#define SWGID_NV2 13 -#define SWGID_PPCS 14 -#define SWGID_SATA2 15 -#define SWGID_SATA 16 -#define SWGID_VDE 17 -#define SWGID_VI 18 -#define SWGID_VIC 19 -#define SWGID_XUSB_HOST 20 -#define SWGID_XUSB_DEV 21 -#define SWGID_A9AVP 22 -#define SWGID_TSEC 23 -#define SWGID_PPCS1 24 -/* UNUSED: 25 */ -/* UNUSED: 26 */ -/* UNUSED: 27 */ -/* UNUSED: 28 */ -/* UNUSED: 29 */ -/* UNUSED: 30 */ -/* UNUSED: 31 */ - -/* UNUSED: 32 */ -/* UNUSED: 33 */ -/* UNUSED: 34 */ -/* UNUSED: 35 */ -/* UNUSED: 36 */ -#define SWGID_DC14 37 /* 0x0x490 */ -/* UNUSED: 38 */ -/* UNUSED: 39 */ - -#define SWGID_DC12 48 /* 0xa88 */ -/* UNUSED: 49 */ -/* UNUSED: 50 */ -#define SWGID_SDMMC1A 51 /* 0xa94 */ -#define SWGID_SDMMC2A 52 -#define SWGID_SDMMC3A 53 -#define SWGID_SDMMC4A 54 -#define SWGID_ISP2B 55 -#define SWGID_GPU 56 -#define SWGID_GPUB 57 -#define SWGID_PPCS2 58 -/* UNUSED: 59 */ -/* UNUSED: 60 */ -/* UNUSED: 61 */ -/* UNUSED: 62 */ -/* UNUSED: 63 */ +#define SWGID_AFI 0 /* 0x238 */ +#define SWGID_AVPC 1 /* 0x23c */ +#define SWGID_DC 2 /* 0x240 */ +#define SWGID_DCB 3 /* 0x244 */ +#define SWGID_EPP 4 /* 0x248 */ +#define SWGID_G2 5 /* 0x24c */ +#define SWGID_HC 6 /* 0x250 */ +#define SWGID_HDA 7 /* 0x254 */ +#define SWGID_ISP 8 /* 0x258 */ +#define SWGID_ISP2 SWGID_ISP +#define SWGID_DC14 9 /* 0x490 *//* 150: Exceptionally non-linear */ +#define SWGID_DC12 10 /* 0xa88 *//* 532: Exceptionally non-linear */ +#define SWGID_MPE 11 /* 0x264 */ +#define SWGID_MSENC SWGID_MPE +#define SWGID_NV 12 /* 0x268 */ +#define SWGID_NV2 13 /* 0x26c */ +#define SWGID_PPCS 14 /* 0x270 */ +#define SWGID_SATA2 15 /* 0x274 */ +#define SWGID_SATA 16 /* 0x278 */ +#define SWGID_VDE 17 /* 0x27c */ +#define SWGID_VI 18 /* 0x280 */ +#define SWGID_VIC 19 /* 0x284 */ +#define SWGID_XUSB_HOST 20 /* 0x288 */ +#define SWGID_XUSB_DEV 21 /* 0x28c */ +#define SWGID_A9AVP 22 /* 0x290 */ +#define SWGID_TSEC 23 /* 0x294 */ +#define SWGID_PPCS1 24 /* 0x298 */ +#define SWGID_SDMMC1A 25 /* 0xa94 *//* Linear shift starts here */ +#define SWGID_SDMMC2A 26 /* 0xa98 */ +#define SWGID_SDMMC3A 27 /* 0xa9c */ +#define SWGID_SDMMC4A 28 /* 0xaa0 */ +#define SWGID_ISP2B 29 /* 0xaa4 */ +#define SWGID_GPU 30 /* 0xaa8 */ +#define SWGID_GPUB 31 /* 0xaac */ +#define SWGID_PPCS2 32 /* 0xab0 */ #define SWGID(x) (1ULL << SWGID_##x) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index a674f6473c17..ab05430ac6f3 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -303,15 +303,21 @@ static const u32 smmu_asid_security_ofs[] = { SMMU_ASID_SECURITY_7, }; -static size_t tegra_smmu_get_offset_base(int id) +static size_t tegra_smmu_get_offset(int id) { - if (!(id & BIT(5))) - return SMMU_SWGRP_ASID_BASE; - - if (id & BIT(4)) - return 0xa88 - SWGID_DC12 * sizeof(u32); + switch (id) { + case SWGID_DC14: + return 0x490; + case SWGID_DC12: + return 0xa88; + case SWGID_AFI...SWGID_ISP: + case SWGID_MPE...SWGID_PPCS1: + return (id - SWGID_AFI) * sizeof(u32) + SMMU_AFI_ASID; + case SWGID_SDMMC1A...63: + return (id - SWGID_SDMMC1A) * sizeof(u32) + 0xa94; + }; - return 0x490 - SWGID_DC14 * sizeof(u32); + BUG(); } /* @@ -480,7 +486,7 @@ static int __smmu_client_set_hwgrp(struct smmu_client *c, u64 map, int on) if (i == SWGID_AFI) continue; - offs = i * sizeof(u32) + tegra_smmu_get_offset_base(i); + offs = tegra_smmu_get_offset(i); val = smmu_read(smmu, offs); val &= ~3; /* always overwrite ASID */ |