diff options
| -rw-r--r-- | arch/arm/mach-s3c2410/s3c2412.c | 29 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-power.h | 34 |
2 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2412.c b/arch/arm/mach-s3c2410/s3c2412.c index e24ffd5e478b..2d163f7600be 100644 --- a/arch/arm/mach-s3c2410/s3c2412.c +++ b/arch/arm/mach-s3c2410/s3c2412.c @@ -35,11 +35,15 @@ #include <asm/mach/irq.h> #include <asm/hardware.h> +#include <asm/proc-fns.h> #include <asm/io.h> #include <asm/irq.h> +#include <asm/arch/idle.h> + #include <asm/arch/regs-clock.h> #include <asm/arch/regs-serial.h> +#include <asm/arch/regs-power.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-gpioj.h> #include <asm/arch/regs-dsc.h> @@ -75,6 +79,27 @@ void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no) s3c_device_nand.name = "s3c2412-nand"; } +/* s3c2412_idle + * + * use the standard idle call by ensuring the idle mode + * in power config, then issuing the idle co-processor + * instruction +*/ + +static void s3c2412_idle(void) +{ + unsigned long tmp; + + /* ensure our idle mode is to go to idle */ + + tmp = __raw_readl(S3C2412_PWRCFG); + tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK; + tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE; + __raw_writel(tmp, S3C2412_PWRCFG); + + cpu_do_idle(); +} + /* s3c2412_map_io * * register the standard cpu IO areas, and any passed in from the @@ -87,6 +112,10 @@ void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size) s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10; + /* set our idle function */ + + s3c24xx_idle = s3c2412_idle; + /* register our io-tables */ iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); diff --git a/include/asm-arm/arch-s3c2410/regs-power.h b/include/asm-arm/arch-s3c2410/regs-power.h new file mode 100644 index 000000000000..6c319ea2afac --- /dev/null +++ b/include/asm-arm/arch-s3c2410/regs-power.h @@ -0,0 +1,34 @@ +/* linux/include/asm/arch-s3c2410/regs-power.h + * + * Copyright (c) 2003,2004,2005,2006 Simtec Electronics <linux@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C24XX power control register definitions +*/ + +#ifndef __ASM_ARM_REGS_PWR +#define __ASM_ARM_REGS_PWR __FILE__ + +#define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR) + +#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) +#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) + +#define S3C2412_PWRCFG_BATF_IGNORE (0<<0) +#define S3C2412_PWRCFG_BATF_SLEEP (3<<0) +#define S3C2412_PWRCFG_BATF_MASK (3<<0) + +#define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0<<6) +#define S3C2412_PWRCFG_STANDBYWFI_IDLE (1<<6) +#define S3C2412_PWRCFG_STANDBYWFI_STOP (2<<6) +#define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3<<6) +#define S3C2412_PWRCFG_STANDBYWFI_MASK (3<<6) + +#define S3C2412_PWRCFG_RTC_MASKIRQ (1<<8) +#define S3C2412_PWRCFG_NAND_NORST (1<<9) + +#endif /* __ASM_ARM_REGS_PWR */ |