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-rw-r--r--drivers/rtc/rtc-tps6586x.c12
-rw-r--r--include/linux/mfd/tps6586x.h8
2 files changed, 17 insertions, 3 deletions
diff --git a/drivers/rtc/rtc-tps6586x.c b/drivers/rtc/rtc-tps6586x.c
index 745134b5caef..b70614fb7d5e 100644
--- a/drivers/rtc/rtc-tps6586x.c
+++ b/drivers/rtc/rtc-tps6586x.c
@@ -30,8 +30,13 @@
#include <linux/slab.h>
#define RTC_CTRL 0xc0
+#define POR_RESET_N BIT(7)
+#define OSC_SRC_SEL BIT(6)
#define RTC_ENABLE BIT(5) /* enables alarm */
-#define RTC_HIRES BIT(4) /* 1Khz or 32Khz updates */
+#define RTC_BUF_ENABLE BIT(4) /* 32 KHz buffer enable */
+#define PRE_BYPASS BIT(3) /* 0=1KHz or 1=32KHz updates */
+#define CL_SEL_MASK (BIT(2)|BIT(1))
+#define CL_SEL_POS 1
#define RTC_ALARM1_HI 0xc1
#define RTC_COUNT4 0xc6
@@ -284,9 +289,10 @@ static int __devinit tps6586x_rtc_probe(struct platform_device *pdev)
goto fail;
}
- /* disable high-res mode, enable tick counting */
+ /* 1 kHz tick mode, enable tick counting */
err = tps6586x_update(tps_dev, RTC_CTRL,
- (RTC_ENABLE | RTC_HIRES), RTC_ENABLE);
+ RTC_ENABLE | ((pdata->cl_sel<<CL_SEL_POS)&CL_SEL_MASK),
+ RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
if (err < 0) {
dev_err(&pdev->dev, "unable to start counter\n");
goto fail;
diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h
index c98b6fa4148b..6d6ddc983f10 100644
--- a/include/linux/mfd/tps6586x.h
+++ b/include/linux/mfd/tps6586x.h
@@ -63,6 +63,13 @@ struct tps6586x_settings {
enum pwm_pfm_mode sm_pwm_mode;
};
+enum {
+ TPS6586X_RTC_CL_SEL_1_5PF = 0x0,
+ TPS6586X_RTC_CL_SEL_6_5PF = 0x1,
+ TPS6586X_RTC_CL_SEL_7_5PF = 0x2,
+ TPS6586X_RTC_CL_SEL_12_5PF = 0x3,
+};
+
struct tps6586x_subdev_info {
int id;
const char *name;
@@ -81,6 +88,7 @@ struct tps6586x_epoch_start {
struct tps6586x_rtc_platform_data {
int irq;
struct tps6586x_epoch_start start;
+ int cl_sel; /* internal XTAL capacitance, see TPS6586X_RTC_CL_SEL* */
};
struct tps6586x_platform_data {