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-rw-r--r--arch/arm/boot/dts/imx7d-sdb.dts12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 91973adb98a7..1daa265d0eda 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -670,6 +670,15 @@
>;
};
+ pinctrl_uart5dte: uart5dtegrp {
+ fsl,pins = <
+ MX7D_PAD_SAI1_TX_BCLK__UART5_DTE_RX 0x79
+ MX7D_PAD_SAI1_RX_DATA__UART5_DTE_TX 0x79
+ MX7D_PAD_SAI1_TX_SYNC__UART5_DTE_RTS 0x79
+ MX7D_PAD_SAI1_TX_DATA__UART5_DTE_CTS 0x79
+ >;
+ };
+
pinctrl_uart6: uart6grp {
fsl,pins = <
MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX 0x79
@@ -863,6 +872,9 @@
assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
fsl,uart-has-rtscts;
+ /* for DTE mode, add below change */
+ /* fsl,dte-mode; */
+ /* pinctrl-0 = <&pinctrl_uart5dte>; */
status = "okay";
};