diff options
Diffstat (limited to 'Documentation/devicetree/bindings/crypto')
| -rw-r--r-- | Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 139 |
1 files changed, 127 insertions, 12 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt index 593bf35c1699..c5dff19cd55d 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt @@ -203,6 +203,26 @@ EXAMPLE ===================================================================== +Secure memory (SM) Node + + - compatible + Usage: required + Value type: <string> + Definition: Must include "fsl,imx6q-caam-sm" + + - reg + Usage: required + Value type: <prop-encoded-array> + Definition: Specifies a two SM parameters: an offset from + the parent physical address and the length the SM registers. + +EXAMPLE + caam_sm: caam-sm@100000 { + compatible = "fsl,imx6q-caam-sm"; + reg = <0x100000 0x4000>; + }; + +===================================================================== Run Time Integrity Check (RTIC) Node Child node of the crypto node. Defines a register space that @@ -366,6 +386,91 @@ EXAMPLE }; ===================================================================== +CAAM SNVS Node + Load the CAAM SNVS node. + + - compatible + Usage: required + Value type: <string> + Definition: Must include "fsl,imx6q-caam-snvs". + + - reg + Usage: required + Value type: <prop-encoded-array> + Definition: A standard property. Specifies the physical + address and length of the SEC4 configuration + registers. + + - clocks + Usage: required if i.MX clk driver defines an SNVS clock + Value type: <prop_encoded-array> + Definition: Phandle and clock specifier pair describing + the clock required for enabling and disabling SNVS. + + - clock-names + Usage: required if i.MX clk driver defines an SNVS clock + Value type: <string> + Definition: Clock name string corresponding to the clock + in the clocks property. + +===================================================================== +Security Violation (SECVIO) Node + Reports security violations. + + - compatible + Usage: required + Value type: <string> + Definition: Must include "fsl,imx6q-caam-secvio". + + - interrupts + Usage: required + Value type: <prop_encoded-array> + Definition: Specifies the interrupts generated by this + device. The value of the interrupts property + consists of one interrupt specifier. The format + of the specifier is defined by the binding document + describing the node's interrupt parent. + + - jtag-tamper + Usage: optional-but-recommended + Value type: <string> + Definition: + Security tamper on the JTAG + Must include "enabled" to enable. + + - watchdog-tamper + Usage: optional-but-recommended + Value type: <string> + Definition: + Security tamper on the watchdog + Must include "enabled" to enable. + + - internal-boot-tamper + Usage: optional-but-recommended + Value type: <string> + Definition: + Security tamper on the internal boot + Must include "enabled" to enable. + + - external-pin-tamper + Usage: optional-but-recommended + Value type: <string> + Definition: + Security tamper on the external pin + Must include "enabled" to enable. + +EXAMPLE + irq_sec_vio: caam_secvio { + compatible = "fsl,imx6q-caam-secvio"; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + jtag-tamper = "disabled"; + watchdog-tamper = "enabled"; + internal-boot-tamper = "enabled"; + external-pin-tamper = "disabled"; + }; + + +===================================================================== Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node A SNVS child node that defines SNVS LP RTC. @@ -394,18 +499,14 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node value type: <u32> Definition: LP register offset. default it is 0x34. - - clocks - Usage: optional, required if SNVS LP RTC requires explicit - enablement of clocks - Value type: <prop_encoded-array> - Definition: a clock specifier describing the clock required for - enabling and disabling SNVS LP RTC. - - - clock-names - Usage: optional, required if SNVS LP RTC requires explicit - enablement of clocks - Value type: <string> - Definition: clock name string should be "snvs-rtc". + - clocks + Usage: optional + Value type: <prop-encoded-array> + Definition: A standard property. Specifies the source clock for + snvs register access. If i.MX clk driver defines the clock node, + it needs user to specify the clocks in device tree for all modules + with snvs LP/HP registers access. The modules involved snvs LP/HP + registers access are snvs-power key, snvs-rtc, and caam. EXAMPLE sec_mon_rtc_lp@1 { @@ -557,4 +658,18 @@ FULL EXAMPLE }; }; + caam_snvs: caam-snvs@30370000 { + compatible = "fsl,imx6q-caam-snvs"; + reg = <0x30370000 0x10000>; + }; + + irq_sec_vio: caam_secvio { + compatible = "fsl,imx6q-caam-secvio"; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + jtag-tamper = "disabled"; + watchdog-tamper = "enabled"; + internal-boot-tamper = "enabled"; + external-pin-tamper = "disabled"; + }; + ===================================================================== |