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-rw-r--r--Documentation/devicetree/bindings/dma/fsl-edma-v3.txt13
1 files changed, 7 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt b/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt
index 322b2c64f396..9c84de7e402c 100644
--- a/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt
@@ -14,12 +14,13 @@ Required properties:
- interrupts : A list of interrupt-specifiers, each channel has one interrupt.
- interrupt-names : Should contain:
"edma-chan12-tx" - the channel12 transmission interrupt
-- #dma-cells : Must be <4>.
+- #dma-cells : Must be <3>.
The 1st cell specifies the channel ID.
The 2nd cell specifies the channel priority.
- The 3rd cell specifies the channel type like for transmit or receive:
+ The 3rd cell specifies the channel attributes which include below:
+ BIT(0): transmit or receive:
0: transmit, 1: receive.
- The 4th cell specifies the local access or remote access:
+ BIT(1): local or remote access:
0: local, 1: remote.
See the SoC's reference manual for all the supported request sources.
- dma-channels : Number of channels supported by the controller
@@ -31,7 +32,7 @@ edma0: dma-controller@40018000 {
<0x0 0x5a2d0000 0x0 0x10000>, /* channel13 UART0 tx */
<0x0 0x5a2e0000 0x0 0x10000>, /* channel14 UART1 rx */
<0x0 0x5a2f0000 0x0 0x10000>; /* channel15 UART1 tx */
- #dma-cells = <4>;
+ #dma-cells = <3>;
dma-channels = <4>;
interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>,
@@ -60,7 +61,7 @@ lpuart1: serial@5a070000 {
assigned-clock-rates = <80000000>;
power-domains = <&pd_dma_lpuart1>;
dma-names = "tx","rx";
- dmas = <&edma0 15 0 0 0>,
- <&edma0 14 0 1 0>;
+ dmas = <&edma0 15 0 0>,
+ <&edma0 14 0 1>;
status = "disabled";
};