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-rw-r--r--Documentation/devicetree/bindings/media/imx8-isi.txt33
-rw-r--r--Documentation/devicetree/bindings/media/imx8-media-dev.txt38
-rw-r--r--Documentation/devicetree/bindings/media/imx8-mipi-csi.txt73
-rw-r--r--Documentation/devicetree/bindings/media/imx8-parallel-csi.txt48
4 files changed, 192 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/media/imx8-isi.txt b/Documentation/devicetree/bindings/media/imx8-isi.txt
new file mode 100644
index 000000000000..7739121f0ca6
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/imx8-isi.txt
@@ -0,0 +1,33 @@
+NXP Image Sensor Interface
+========================
+
+The Image Sensor Interface (ISI) is used to obtain the image data for
+processing in its pipeline channels. Each pipeline processes the image
+line from a configured source and performs one or more functions that
+are configured by software, such as down scaling, color space conversion,
+de-interlacing, alpha insertion, cropping and rotation (horizontal and
+vertical). The processed image is stored into programmable memory locations.
+
+Required properties:
+- compatible: should be "fsl,imx8-isi", where SoC can be one of imx8qxp, imx8qm
+- reg: the register base and size for the device registers
+- interrupts: the ISI interrupt, high level active
+- clock-names: should be "per"
+- clocks: the ISI AXI clock
+- interface: specify ISI input, virtual channel and output,
+ <Input MIPI_VCx Output>
+ Input : 0-DC0, 1-DC1, 2-MIPI CSI0, 3-MIPI CSI1, 4-HDMI, 5-MEM
+ VCx : 0-VC0, 1-VC1, 2-VC2, 3-VC3, MIPI CSI only
+ Output: 0-DC0, 1-DC1, 2-MEM
+
+Example:
+ isi_0: isi@58100000 {
+ compatible = "fsl,imx8-isi";
+ reg = <0x58100000 0x10000>;
+ interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gic>;
+ clocks = <&img_lpcg IMX_IMG_LPCG_PDMA0_CLK>;
+ clock-names = "per";
+ power-domains = <&pd IMX_SC_R_ISI_CH0>;
+ interface = <2 0 2>;
+ };
diff --git a/Documentation/devicetree/bindings/media/imx8-media-dev.txt b/Documentation/devicetree/bindings/media/imx8-media-dev.txt
new file mode 100644
index 000000000000..dd7de1cbde44
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/imx8-media-dev.txt
@@ -0,0 +1,38 @@
+Virtual Media device
+-------------------------------
+
+Virtual Media device is used to manage all modules in image capture subsystem
+of imx8qxp/qm platform. ISI(Image Sensor Interface), MIPI CSI, Parallel CSI
+device node should be under it.
+
+Required properties:
+ - compatible : must be "fsl,mxc-md";
+ - reg : Must contain an entry for each entry in reg-names;
+ - #address-cells: should be <1>;
+ - #size-cells : should be <1>;
+ - ranges : use to handle address space
+
+Optional properties:
+ - parallel_csi: indicate that camera sensor use parallel interface
+
+
+
+For example:
+
+ cameradev: camera {
+ compatible = "fsl,mxc-md", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ isi@58100000 {
+ compatible = "fsl,imx8-isi";
+ reg = <0x58100000 0x10000>;
+ ...
+ };
+ csi@58227000 {
+ compatible = "fsl,mxc-mipi-csi2";
+ ...
+ };
+ ...
+ };
diff --git a/Documentation/devicetree/bindings/media/imx8-mipi-csi.txt b/Documentation/devicetree/bindings/media/imx8-mipi-csi.txt
new file mode 100644
index 000000000000..3c69e3e52b8c
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/imx8-mipi-csi.txt
@@ -0,0 +1,73 @@
+Freescale i.MX8QXP/QM MIPI CSI2
+=========================
+
+mipi_csi2 node
+--------------
+
+This is the device node for the MIPI CSI-2 receiver core in i.MXQXP/QM SoC.
+
+Required properties:
+
+- compatible : "fsl,mxc-mipi-csi2";
+- reg : base address and length of the register set for the device;
+- clocks : list of clock specifiers, see
+ Documentation/devicetree/bindings/clock/clock-bindings.txt for details;
+- clock-names : must contain "clk_core", "clk_esc" and "clk_pxl" entries,
+ matching entries in the clock property;
+- assigned-clock-rates : the value should be 360MHz and 72MHz;
+- power-domains : a phandle to the power domain, see
+ Documentation/devicetree/bindings/power/power_domain.txt for details;
+- power-domain-name : must contain "pd_csi", "pd_isi_ch0".
+
+Optional properties:
+- virtual-channel: whether use mipi csi virtual channel
+
+The device node should contain one 'port' child nodes with one child 'endpoint'
+node, according to the bindings defined in:
+ Documentation/devicetree/bindings/ media/video-interfaces.txt.
+ The following are properties specific to those nodes.
+
+port node
+---------
+
+- reg : (required) can take the values 0 which mean the port is a
+ sink port;
+
+endpoint node
+-------------
+
+- data-lanes : (required) an array specifying active physical MIPI-CSI2
+ data input lanes and their mapping to logical lanes; this
+ shall only be applied to port 0 (sink port), the array's
+ content is unused only its length is meaningful,
+ in this case the maximum length supported is 2;
+
+example:
+
+ mipi_csi: csi@58227000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "fsl,mxc-mipi-csi2";
+ reg = <0x58227000 0x1000>,
+ <0x58221000 0x1000>;
+ clocks = <&csi_lpcg IMX_CSI_LPCG_CSI0_CORE_CLK>,
+ <&csi_lpcg IMX_CSI_LPCG_CSI0_ESC_CLK>,
+ <&img_lpcg IMX_IMG_LPCG_CSI0_PXL_LINK_CLK>;
+ clock-names = "clk_core", "clk_esc", "clk_pxl";
+ assigned-clocks = <&csi_lpcg IMX_CSI_LPCG_CSI0_CORE_CLK>,
+ <&csi_lpcg IMX_CSI_LPCG_CSI0_ESC_CLK>;
+ assigned-clock-rates = <360000000>, <72000000>;
+ power-domains = <&pd IMX_SC_R_CSI_0>, <&pd IMX_SC_R_ISI_CH0>;
+ power-domain-names = "pd_csi", "pd_isi_ch0";
+ status = "okay";
+
+ port@0 {
+ reg = <0>;
+ mipi_csi0_ep: endpoint {
+ remote-endpoint = <&ov5640_mipi_ep>;
+ data-lanes = <1 2>;
+ };
+ };
+
+ };
diff --git a/Documentation/devicetree/bindings/media/imx8-parallel-csi.txt b/Documentation/devicetree/bindings/media/imx8-parallel-csi.txt
new file mode 100644
index 000000000000..af1ecb9e2318
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/imx8-parallel-csi.txt
@@ -0,0 +1,48 @@
+Freescale i.MX8QXP Parallel Capture Interface
+=========================
+
+parallel interface node
+--------------
+
+This is the device node for the parallel capture interface in i.MX8QXP SoC.
+
+Required properties:
+- compatible : "fsl,mxc-parallel-csi";
+- reg : base address and length of the register set for the device;
+- clocks : list of clock specifiers
+- clock-names : must contain "pixel", "ipg", "div" and "dpll" entries,
+ matching entries in the clock property;
+- assigned-clocks : need to set the parent of pixel clock;
+- assigned-clock-parent: set the pll as the parent of pixel clock;
+- assigned-clock-rates : the value should be 160MHz;
+- power-domains : a phandle to the power domain, see
+- power-domain-name : must contain "pd_pi", "pd_isi_ch0".
+
+port node
+- reg : can take the values 0 which mean the port is a sink port
+
+example:
+ parallel_csi: pcsi@58261000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "fsl,mxc-parallel-csi";
+ reg = <0x58261000 0x1000>;
+ clocks = <&pi_lpcg IMX_PI_LPCG_PI0_PIXEL_CLK>,
+ <&pi_lpcg IMX_PI_LPCG_PI0_IPG_CLK>,
+ <&clk IMX_PARALLEL_PER_DIV_CLK>,
+ <&clk IMX_PARALLEL_DPLL_CLK>;
+ clock-names = "pixel", "ipg", "div", "dpll";
+ assigned-clocks = <&clk IMX_PARALLEL_PER_DIV_CLK>;
+ assigned-clock-parents = <&clk IMX_PARALLEL_DPLL_CLK>;
+ assigned-clock-rates = <160000000>; /* 160MHz */
+ power-domains = <&pd IMX_SC_R_PI_0>, <&pd IMX_SC_R_ISI_CH0>;
+ power-domain-names = "pd_pi", "pd_isi_ch0";
+
+ port@0 {
+ reg = <0>;
+ parallel_csi_ep: endpoint {
+ remote-endpoint = <&ov5640_ep>;
+ };
+ };
+ };