summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
diff options
context:
space:
mode:
Diffstat (limited to 'Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml')
-rw-r--r--Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml19
1 files changed, 19 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index acea1cd444fd..8d944d02198f 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -25,6 +25,8 @@ properties:
- fsl,imx6qp-pcie
- fsl,imx7d-pcie
- fsl,imx8mq-pcie
+ - fsl,imx8qm-pcie
+ - fsl,imx8qxp-pcie
reg:
items:
@@ -148,6 +150,23 @@ properties:
the three PCIe PHY powers. This regulator can be supplied by both
1.8v and 3.3v voltage supplies (optional required).
+ hsio-cfg:
+ description: hsio configuration mode when the pcie node is supported.
+ mode 1: pciea 2 lanes and one sata ahci port.
+ mode 2: pciea 1 lane, pcieb 1 lane and one sata ahci port.
+ mode 3: pciea 2 lanes, pcieb 1 lane.
+
+ local-addr:
+ description: the local address used in hsio module.
+
+ reset-names:
+ description: Must contain the following entries: "clkreq"
+
+ l1ss-disabled:
+ description: Force to disable L1SS or not. If present then the L1
+ substate would be force disabled although it might be supported by the
+ chip.
+
required:
- compatible
- reg