diff options
Diffstat (limited to 'Documentation/devicetree/bindings/reset')
4 files changed, 209 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/gpio-reset.txt b/Documentation/devicetree/bindings/reset/gpio-reset.txt new file mode 100644 index 000000000000..7d45d8b810ea --- /dev/null +++ b/Documentation/devicetree/bindings/reset/gpio-reset.txt @@ -0,0 +1,36 @@ +GPIO reset controller +===================== + +A GPIO reset controller controls a single GPIO that is connected to the reset +pin of a peripheral IC. Please also refer to reset.txt in this directory for +common reset controller binding usage. + +Required properties: +- compatible: Should be "gpio-reset" +- reset-gpios: A gpio used as reset line. The gpio specifier for this property + depends on the gpio controller that provides the gpio. +- #reset-cells: 0, see below + +Optional properties: +- reset-delay-us: delay in microseconds. The gpio reset line will be asserted for + this duration to reset. +- reset-post-delay-ms: delay in milliseconds to wait after reset. +- initially-in-reset: boolean. If not set, the initial state should be a + deasserted reset line. If this property exists, the + reset line should be kept in reset. + +example: + +sii902x_reset: gpio-reset { + compatible = "gpio-reset"; + reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + reset-delay-us = <10000>; + initially-in-reset; + #reset-cells = <0>; +}; + +/* Device with nRESET pin connected to GPIO5_0 */ +sii902x@39 { + /* ... */ + resets = <&sii902x_reset>; /* active-low GPIO5_0, 10 ms delay */ +}; diff --git a/Documentation/devicetree/bindings/reset/nxp,dispmix-clk-en.txt b/Documentation/devicetree/bindings/reset/nxp,dispmix-clk-en.txt new file mode 100644 index 000000000000..4375039eb072 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/nxp,dispmix-clk-en.txt @@ -0,0 +1,58 @@ +NXP Display Mix clk-en Reset Controller +======================================= + +This binding describes a reset controller device that is used to enable +or disable the internal clocks for all the submodules(such as, LCDIF, +MIPI DSI, MIPI CSI, ISI and etc) included by the Display Mix subsystem +on IMX8MM and IMX8MN platforms. Like sft-rstn, only assert and deassert +functions are required for submodule internal clocks enable or disable, +that means the clk-en can be treated as a real reset controller. + +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +Required properties: +- compatible: Should be "fsl,imx8mm-dispmix-clk-en" or + "fsl,imx8mn-dispmix-clk-en". +- reg: should be register base and length as documented in the datasheet. +- clocks: phandle and clock specifier to disp apb clock for register access. +- clock-names: should be "disp-apb". +- power-domains: phandle to dispmix power domain. +- reset-cells: 1, see below. + +example: + + dispmix_clk_en: dispmix-clk-en@32e28004 { + compatible = "fsl,imx8mn-dispmix-clk-en"; + reg = <0x0 0x32e28004 0x0 0x4>; + clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>; + clock-names = "disp-apb"; + power-domains = <&dispmix_pd>; + #reset-cells = <1>; + }; + +Specifying clk-en control of devices +==================================== + +Device nodes in Display Mix should specify the reset channel required in +their "resets" property, containing a phandle to the clk-en device node +and an index to specify which channel to use, as described in +Documentation/devicetree/bindings/reset/reset.txt. + +example: + + lcdif_resets: lcdif-resets { + #address-cells = <1>; + #size-cells = <0>; + #reset-cells = <0>; + + lcdif-clk-enable { + compatible = "lcdif,clk-enable"; + resets = <&dispmix_clk_en IMX8MN_LCDIF_APB_CLK_EN>, + <&dispmix_clk_en IMX8MN_LCDIF_PIXEL_CLK_EN>; + }; + }; + +Macro definitions for the supported reset channels can be found in: +include/dt-bindings/reset/imx8mm-dispmix.h and +include/dt-bindings/reset/imx8mn-dispmix.h. diff --git a/Documentation/devicetree/bindings/reset/nxp,dispmix-mipi-rst.txt b/Documentation/devicetree/bindings/reset/nxp,dispmix-mipi-rst.txt new file mode 100644 index 000000000000..c47bfd4842ed --- /dev/null +++ b/Documentation/devicetree/bindings/reset/nxp,dispmix-mipi-rst.txt @@ -0,0 +1,57 @@ +NXP Display Mix mipi-rst Reset Controller +========================================= + +This binding describes a reset controller device that is used to reset +or de-reset the MIPI DPHY master direction(for MIPI DSI) and slave +direction(for MIPI CSI) included by the Display Mix subsystem on IMX8MM +and IMX8MN platforms. Like sft-rstn, only assert and deassert functions +are required for PHY reset or de-reset. + +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +Required properties: +- compatible: Should be "fsl,imx8mm-dispmix-mipi-rst" or + "fsl,imx8mn-dispmix-mipi-rst". +- reg: should be register base and length as documented in the datasheet. +- clocks: phandle and clock specifier to disp apb clock for register access. +- clock-names: should be "disp-apb". +- power-domains: phandle to dispmix power domain. +- reset-cells: 1, see below. + +example: + + dispmix_mipi_rst: dispmix-mipi-rst@32e28008 { + compatible = "fsl,imx8mn-dispmix-mipi-rst"; + reg = <0x0 0x32e28008 0x0 0x4>; + clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>; + clock-names = "disp-apb"; + active_low; + power-domains = <&dispmix_pd>; + #reset-cells = <1>; + }; + +Specifying mipi-rst control of devices +====================================== + +Device nodes in Display Mix should specify the reset channel required in +their "resets" property, containing a phandle to the mipi-rst device node +and an index to specify which channel to use, as described in +Documentation/devicetree/bindings/reset/reset.txt. + +example: + + mipi_dsi_resets: mipi-dsi-resets { + #address-cells = <1>; + #size-cells = <0>; + #reset-cells = <0>; + + dsi-mipi-reset { + compatible = "dsi,mipi-reset"; + resets = <&dispmix_mipi_rst IMX8MN_MIPI_M_RESET>; + }; + }; + +Macro definitions for the supported reset channels can be found in: +include/dt-bindings/reset/imx8mm-dispmix.h and +include/dt-bindings/reset/imx8mn-dispmix.h. diff --git a/Documentation/devicetree/bindings/reset/nxp,dispmix-sft-rstn.txt b/Documentation/devicetree/bindings/reset/nxp,dispmix-sft-rstn.txt new file mode 100644 index 000000000000..7867018a409b --- /dev/null +++ b/Documentation/devicetree/bindings/reset/nxp,dispmix-sft-rstn.txt @@ -0,0 +1,58 @@ +NXP Display Mix sft-rstn Reset Controller +========================================= + +This binding describes a reset controller device that is used to reset +or de-reset all the submodules(such as, LCDIF, MIPI DSI, MIPI CSI, ISI +and etc) included by the Display Mix subsystem on IMX8MM and IMX8MN +platforms. Only assert and deassert functions are required for submodule +reset or de-reset. + +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +Required properties: +- compatible: Should be "fsl,imx8mm-dispmix-sft-rstn" or + "fsl,imx8mn-dispmix-sft-rstn". +- reg: should be register base and length as documented in the datasheet. +- clocks: phandle and clock specifier to disp apb clock for register access. +- clock-names: should be "disp-apb". +- power-domains: phandle to dispmix power domain. +- reset-cells: 1, see below. + +example: + + dispmix_sft_rstn: dispmix-sft-rstn@32e28000 { + compatible = "fsl,imx8mm-dispmix-sft-rstn"; + reg = <0x0 0x32e28000 0x0 0x4>; + clocks = <&clk IMX8MM_CLK_DISP_APB_ROOT>; + clock-names = "disp-apb"; + active_low; + power-domains = <&dispmix_pd>; + #reset-cells = <1>; + }; + +Specifying sft-rstn control of devices +====================================== + +Device nodes in Display Mix should specify the reset channel required in +their "resets" property, containing a phandle to the sft-rstn device node +and an index to specify which channel to use, as described in +Documentation/devicetree/bindings/reset/reset.txt. + +example: + + lcdif_resets: lcdif-resets { + #address-cells = <1>; + #size-cells = <0>; + #reset-cells = <0>; + + lcdif-soft-resetn { + compatible = "lcdif,soft-resetn"; + resets = <&dispmix_sft_rstn IMX8MN_LCDIF_APB_CLK_RESET>, + <&dispmix_sft_rstn IMX8MN_LCDIF_PIXEL_CLK_RESET>; + }; + }; + +Macro definitions for the supported reset channels can be found in: +include/dt-bindings/reset/imx8mm-dispmix.h and +include/dt-bindings/reset/imx8mn-dispmix.h. |