diff options
Diffstat (limited to 'arch/arm/boot/dts/at91sam9263.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/at91sam9263.dtsi | 162 |
1 files changed, 144 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 251ccec430a4..66106eecf1ed 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -113,45 +113,57 @@ }; }; - uart0 { - pinctrl_uart0: uart0-0 { + usart0 { + pinctrl_usart0: usart0-0 { atmel,pins = <0 26 0x1 0x1 /* PA26 periph A with pullup */ 0 27 0x1 0x0>; /* PA27 periph A */ }; - pinctrl_uart0_rts_cts: uart0_rts_cts-0 { + pinctrl_usart0_rts: usart0_rts-0 { atmel,pins = - <0 28 0x1 0x0 /* PA28 periph A */ - 0 29 0x1 0x0>; /* PA29 periph A */ + <0 28 0x1 0x0>; /* PA28 periph A */ + }; + + pinctrl_usart0_cts: usart0_cts-0 { + atmel,pins = + <0 29 0x1 0x0>; /* PA29 periph A */ }; }; - uart1 { - pinctrl_uart1: uart1-0 { + usart1 { + pinctrl_usart1: usart1-0 { atmel,pins = <3 0 0x1 0x1 /* PD0 periph A with pullup */ 3 1 0x1 0x0>; /* PD1 periph A */ }; - pinctrl_uart1_rts_cts: uart1_rts_cts-0 { + pinctrl_usart1_rts: usart1_rts-0 { + atmel,pins = + <3 7 0x2 0x0>; /* PD7 periph B */ + }; + + pinctrl_usart1_cts: usart1_cts-0 { atmel,pins = - <3 7 0x2 0x0 /* PD7 periph B */ - 3 8 0x2 0x0>; /* PD8 periph B */ + <3 8 0x2 0x0>; /* PD8 periph B */ }; }; - uart2 { - pinctrl_uart2: uart2-0 { + usart2 { + pinctrl_usart2: usart2-0 { atmel,pins = <3 2 0x1 0x1 /* PD2 periph A with pullup */ 3 3 0x1 0x0>; /* PD3 periph A */ }; - pinctrl_uart2_rts_cts: uart2_rts_cts-0 { + pinctrl_usart2_rts: usart2_rts-0 { atmel,pins = - <3 5 0x2 0x0 /* PD5 periph B */ - 4 6 0x2 0x0>; /* PD6 periph B */ + <3 5 0x2 0x0>; /* PD5 periph B */ + }; + + pinctrl_usart2_cts: usart2_cts-0 { + atmel,pins = + <4 6 0x2 0x0>; /* PD6 periph B */ }; }; @@ -163,6 +175,100 @@ }; }; + macb { + pinctrl_macb_rmii: macb_rmii-0 { + atmel,pins = + <2 25 0x2 0x0 /* PC25 periph B */ + 4 21 0x1 0x0 /* PE21 periph A */ + 4 23 0x1 0x0 /* PE23 periph A */ + 4 24 0x1 0x0 /* PE24 periph A */ + 4 25 0x1 0x0 /* PE25 periph A */ + 4 26 0x1 0x0 /* PE26 periph A */ + 4 27 0x1 0x0 /* PE27 periph A */ + 4 28 0x1 0x0 /* PE28 periph A */ + 4 29 0x1 0x0 /* PE29 periph A */ + 4 30 0x1 0x0>; /* PE30 periph A */ + }; + + pinctrl_macb_rmii_mii: macb_rmii_mii-0 { + atmel,pins = + <2 20 0x2 0x0 /* PC20 periph B */ + 2 21 0x2 0x0 /* PC21 periph B */ + 2 22 0x2 0x0 /* PC22 periph B */ + 2 23 0x2 0x0 /* PC23 periph B */ + 2 24 0x2 0x0 /* PC24 periph B */ + 2 25 0x2 0x0 /* PC25 periph B */ + 2 27 0x2 0x0 /* PC27 periph B */ + 4 22 0x2 0x0>; /* PE22 periph B */ + }; + }; + + mmc0 { + pinctrl_mmc0_clk: mmc0_clk-0 { + atmel,pins = + <0 12 0x1 0x0>; /* PA12 periph A */ + }; + + pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { + atmel,pins = + <0 1 0x1 0x1 /* PA1 periph A with pullup */ + 0 0 0x1 0x1>; /* PA0 periph A with pullup */ + }; + + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { + atmel,pins = + <0 3 0x1 0x1 /* PA3 periph A with pullup */ + 0 4 0x1 0x1 /* PA4 periph A with pullup */ + 0 5 0x1 0x1>; /* PA5 periph A with pullup */ + }; + + pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { + atmel,pins = + <0 16 0x1 0x1 /* PA16 periph A with pullup */ + 0 17 0x1 0x1>; /* PA17 periph A with pullup */ + }; + + pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { + atmel,pins = + <0 18 0x1 0x1 /* PA18 periph A with pullup */ + 0 19 0x1 0x1 /* PA19 periph A with pullup */ + 0 20 0x1 0x1>; /* PA20 periph A with pullup */ + }; + }; + + mmc1 { + pinctrl_mmc1_clk: mmc1_clk-0 { + atmel,pins = + <0 6 0x1 0x0>; /* PA6 periph A */ + }; + + pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { + atmel,pins = + <0 7 0x1 0x1 /* PA7 periph A with pullup */ + 0 8 0x1 0x1>; /* PA8 periph A with pullup */ + }; + + pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { + atmel,pins = + <0 9 0x1 0x1 /* PA9 periph A with pullup */ + 0 10 0x1 0x1 /* PA10 periph A with pullup */ + 0 11 0x1 0x1>; /* PA11 periph A with pullup */ + }; + + pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { + atmel,pins = + <0 21 0x1 0x1 /* PA21 periph A with pullup */ + 0 22 0x1 0x1>; /* PA22 periph A with pullup */ + }; + + pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { + atmel,pins = + <0 23 0x1 0x1 /* PA23 periph A with pullup */ + 0 24 0x1 0x1 /* PA24 periph A with pullup */ + 0 25 0x1 0x1>; /* PA25 periph A with pullup */ + }; + }; + pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; @@ -230,7 +336,7 @@ atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; + pinctrl-0 = <&pinctrl_usart0>; status = "disabled"; }; @@ -241,7 +347,7 @@ atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; + pinctrl-0 = <&pinctrl_usart1>; status = "disabled"; }; @@ -252,7 +358,7 @@ atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; + pinctrl-0 = <&pinctrl_usart2>; status = "disabled"; }; @@ -260,6 +366,8 @@ compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; interrupts = <21 4 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb_rmii>; status = "disabled"; }; @@ -278,6 +386,24 @@ #size-cells = <0>; status = "disabled"; }; + + mmc0: mmc@fff80000 { + compatible = "atmel,hsmci"; + reg = <0xfff80000 0x600>; + interrupts = <10 4 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + mmc1: mmc@fff84000 { + compatible = "atmel,hsmci"; + reg = <0xfff84000 0x600>; + interrupts = <11 4 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; nand0: nand@40000000 { |