diff options
Diffstat (limited to 'arch/arm/boot/dts/exynos5250.dtsi')
-rw-r--r-- | arch/arm/boot/dts/exynos5250.dtsi | 82 |
1 files changed, 53 insertions, 29 deletions
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 376090f07231..9db5047812f3 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -68,17 +68,17 @@ }; }; - pd_gsc: gsc-power-domain@0x10044000 { + pd_gsc: gsc-power-domain@10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; }; - pd_mfc: mfc-power-domain@0x10044040 { + pd_mfc: mfc-power-domain@10044040 { compatible = "samsung,exynos4210-pd"; reg = <0x10044040 0x20>; }; - clock: clock-controller@0x10010000 { + clock: clock-controller@10010000 { compatible = "samsung,exynos5250-clock"; reg = <0x10010000 0x30000>; #clock-cells = <1>; @@ -96,6 +96,11 @@ <1 14 0xf08>, <1 11 0xf08>, <1 10 0xf08>; + /* Unfortunately we need this since some versions of U-Boot + * on Exynos don't set the CNTFRQ register, so we need the + * value from DT. + */ + clock-frequency = <24000000>; }; mct@101C0000 { @@ -163,16 +168,27 @@ clock-names = "watchdog"; }; + g2d@10850000 { + compatible = "samsung,exynos5250-g2d"; + reg = <0x10850000 0x1000>; + interrupts = <0 91 0>; + clocks = <&clock 345>; + clock-names = "fimg2d"; + }; + codec@11000000 { compatible = "samsung,mfc-v6"; reg = <0x11000000 0x10000>; interrupts = <0 96 0>; samsung,power-domain = <&pd_mfc>; + clocks = <&clock 266>; + clock-names = "mfc"; }; - rtc { + rtc@101E0000 { clocks = <&clock 337>; clock-names = "rtc"; + status = "okay"; }; tmu@10060000 { @@ -406,6 +422,7 @@ i2s0: i2s@03830000 { compatible = "samsung,s5pv210-i2s"; + status = "disabled"; reg = <0x03830000 0x100>; dmas = <&pdma0 10 &pdma0 9 @@ -422,6 +439,7 @@ i2s1: i2s@12D60000 { compatible = "samsung,s3c6410-i2s"; + status = "disabled"; reg = <0x12D60000 0x100>; dmas = <&pdma1 12 &pdma1 11>; @@ -434,6 +452,7 @@ i2s2: i2s@12D70000 { compatible = "samsung,s3c6410-i2s"; + status = "disabled"; reg = <0x12D70000 0x100>; dmas = <&pdma0 12 &pdma0 11>; @@ -559,7 +578,7 @@ }; }; - gsc_0: gsc@0x13e00000 { + gsc_0: gsc@13e00000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e00000 0x1000>; interrupts = <0 85 0>; @@ -568,7 +587,7 @@ clock-names = "gscl"; }; - gsc_1: gsc@0x13e10000 { + gsc_1: gsc@13e10000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e10000 0x1000>; interrupts = <0 86 0>; @@ -577,7 +596,7 @@ clock-names = "gscl"; }; - gsc_2: gsc@0x13e20000 { + gsc_2: gsc@13e20000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e20000 0x1000>; interrupts = <0 87 0>; @@ -586,7 +605,7 @@ clock-names = "gscl"; }; - gsc_3: gsc@0x13e30000 { + gsc_3: gsc@13e30000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e30000 0x1000>; interrupts = <0 88 0>; @@ -599,41 +618,46 @@ compatible = "samsung,exynos4212-hdmi"; reg = <0x14530000 0x70000>; interrupts = <0 95 0>; - clocks = <&clock 333>, <&clock 136>, <&clock 137>, - <&clock 333>, <&clock 333>; + clocks = <&clock 344>, <&clock 136>, <&clock 137>, + <&clock 159>, <&clock 1024>; clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", - "sclk_hdmiphy", "hdmiphy"; + "sclk_hdmiphy", "mout_hdmi"; }; mixer { compatible = "samsung,exynos5250-mixer"; reg = <0x14450000 0x10000>; interrupts = <0 94 0>; + clocks = <&clock 343>, <&clock 136>; + clock-names = "mixer", "sclk_hdmi"; }; - dp-controller { - compatible = "samsung,exynos5-dp"; - reg = <0x145b0000 0x1000>; - interrupts = <10 3>; - interrupt-parent = <&combiner>; + dp_phy: video-phy@10040720 { + compatible = "samsung,exynos5250-dp-video-phy"; + reg = <0x10040720 4>; + #phy-cells = <0>; + }; + + dp-controller@145B0000 { clocks = <&clock 342>; clock-names = "dp"; - #address-cells = <1>; - #size-cells = <0>; - - dptx-phy { - reg = <0x10040720>; - samsung,enable-mask = <1>; - }; + phys = <&dp_phy>; + phy-names = "dp"; }; - fimd { - compatible = "samsung,exynos5250-fimd"; - interrupt-parent = <&combiner>; - reg = <0x14400000 0x40000>; - interrupt-names = "fifo", "vsync", "lcd_sys"; - interrupts = <18 4>, <18 5>, <18 6>; + fimd@14400000 { clocks = <&clock 133>, <&clock 339>; clock-names = "sclk_fimd", "fimd"; }; + + adc: adc@12D10000 { + compatible = "samsung,exynos-adc-v1"; + reg = <0x12D10000 0x100>, <0x10040718 0x4>; + interrupts = <0 106 0>; + clocks = <&clock 303>; + clock-names = "adc"; + #io-channel-cells = <1>; + io-channel-ranges; + status = "disabled"; + }; }; |