1 files changed, 0 insertions, 95 deletions
diff --git a/arch/arm/boot/dts/tegra114-macallan.dts b/arch/arm/boot/dts/tegra114-macallan.dts
deleted file mode 100644
index 74798e433482..000000000000
--- a/arch/arm/boot/dts/tegra114-macallan.dts
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * arch/arm/boot/dts/tegra114-macallan.dts
- *
- * Copyright (C) 2013-2014 NVIDIA Corporation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-/dts-v1/;
-
-/include/ "tegra114.dtsi"
-#include "tegra114-platforms/tegra114-macallan-e1645-gpio-default.dtsi"
-#include "tegra114-platforms/tegra114-macallan-e1645-pinmux.dtsi"
-#include "tegra114-platforms/tegra114-macallan-powermon.dtsi"
-
-/ {
-	model = "NVIDIA Tegra114 macallan evaluation board";
-	compatible = "nvidia,macallan", "nvidia,tegra114";
-
-	host1x {
-		hdmi {
-			status = "okay";
-		};
-	};
-
-	i2c@7000c500 {
-		clock-frequency = <400000>;
-	};
-
-	spi@7000d400 {
-		status = "okay";
-		spi-max-frequency = <25000000>;
-		nvidia,dma-request-selector = <&apbdma 0>;
-	};
-
-	pmc {
-		status = "okay";
-		nvidia,invert-interrupt;
-		nvidia,suspend-mode = <0>;
-		nvidia,cpu-pwr-good-time = <300>;
-		nvidia,cpu-pwr-off-time = <300>;
-		nvidia,core-pwr-good-time = <3845 3845>;
-		nvidia,core-pwr-off-time = <2000>;
-		nvidia,core-power-req-active-high;
-		nvidia,sys-clock-req-active-high;
-	};
-
-	sdhci@78000600 {
-		tap-delay = <5>;
-		trim-delay = <3>;
-		ddr-clk-limit = <41000000>;
-		base-clk = <104000000>;
-		mmc-ocr-mask = <0>;
-		bus-width = <8>;
-		built-in;
-		status = "okay";
-	};
-	sdhci@78000400 {
-		cd-gpios = <&gpio 170 0>; /* gpio PV2 */
-		tap-delay = <3>;
-		trim-delay = <3>;
-		ddr-clk-limit = <41000000>;
-		base-clk = <208000000>;
-		bus-width = <4>;
-		status = "okay";
-	};
-	sdhci@78000000 {
-		status = "okay";
-	};
-
-	camera {
-		status = "okay";
-	};
-
-	clocks {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		clk32k_in: clock {
-			compatible = "fixed-clock";
-			reg=<0>;
-			#clock-cells = <0>;
-			clock-frequency = <32768>;
-		};
-	};
-};