diff options
Diffstat (limited to 'arch/arm/boot/dts/tegra20-tamonten.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-tamonten.dtsi | 47 | 
1 files changed, 26 insertions, 21 deletions
| diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index 7726dab3d08d..a1b0d965757f 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -4,12 +4,17 @@  	model = "Avionic Design Tamonten SOM";  	compatible = "ad,tamonten", "nvidia,tegra20"; +	aliases { +		rtc0 = "/i2c@7000d000/tps6586x@34"; +		rtc1 = "/rtc@7000e000"; +	}; +  	memory {  		reg = <0x00000000 0x20000000>;  	}; -	host1x { -		hdmi { +	host1x@50000000 { +		hdmi@54280000 {  			vdd-supply = <&hdmi_vdd_reg>;  			pll-supply = <&hdmi_pll_reg>; @@ -19,7 +24,7 @@  		};  	}; -	pinmux { +	pinmux@70000014 {  		pinctrl-names = "default";  		pinctrl-0 = <&state_default>; @@ -176,50 +181,50 @@  					"gmb", "gmc", "gmd", "gme", "gpu7",  					"gpv", "i2cp", "pta", "rm", "slxa",  					"slxk", "spia", "spib", "uac"; -				nvidia,pull = <0>; -				nvidia,tristate = <0>; +				nvidia,pull = <TEGRA_PIN_PULL_NONE>; +				nvidia,tristate = <TEGRA_PIN_DISABLE>;  			};  			conf_ck32 {  				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",  					"pmcc", "pmcd", "pmce", "xm2c", "xm2d"; -				nvidia,pull = <0>; +				nvidia,pull = <TEGRA_PIN_PULL_NONE>;  			};  			conf_csus {  				nvidia,pins = "csus", "spid", "spif"; -				nvidia,pull = <1>; -				nvidia,tristate = <1>; +				nvidia,pull = <TEGRA_PIN_PULL_DOWN>; +				nvidia,tristate = <TEGRA_PIN_ENABLE>;  			};  			conf_crtp {  				nvidia,pins = "crtp", "dap2", "dap3", "dap4",  					"dtc", "dte", "dtf", "gpu", "sdio1",  					"slxc", "slxd", "spdi", "spdo", "spig",  					"uda"; -				nvidia,pull = <0>; -				nvidia,tristate = <1>; +				nvidia,pull = <TEGRA_PIN_PULL_NONE>; +				nvidia,tristate = <TEGRA_PIN_ENABLE>;  			};  			conf_ddc {  				nvidia,pins = "ddc", "dta", "dtd", "kbca",  					"kbcb", "kbcc", "kbcd", "kbce", "kbcf",  					"sdc"; -				nvidia,pull = <2>; -				nvidia,tristate = <0>; +				nvidia,pull = <TEGRA_PIN_PULL_UP>; +				nvidia,tristate = <TEGRA_PIN_DISABLE>;  			};  			conf_hdint {  				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",  					"lpw1", "lsc1", "lsck", "lsda", "lsdi",  					"lvp0", "owc", "sdb"; -				nvidia,tristate = <1>; +				nvidia,tristate = <TEGRA_PIN_ENABLE>;  			};  			conf_irrx {  				nvidia,pins = "irrx", "irtx", "sdd", "spic",  					"spie", "spih", "uaa", "uab", "uad",  					"uca", "ucb"; -				nvidia,pull = <2>; -				nvidia,tristate = <1>; +				nvidia,pull = <TEGRA_PIN_PULL_UP>; +				nvidia,tristate = <TEGRA_PIN_ENABLE>;  			};  			conf_lc {  				nvidia,pins = "lc", "ls"; -				nvidia,pull = <2>; +				nvidia,pull = <TEGRA_PIN_PULL_UP>;  			};  			conf_ld0 {  				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", @@ -229,12 +234,12 @@  					"lhp1", "lhp2", "lhs", "lm0", "lpp",  					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",  					"lvs", "pmc"; -				nvidia,tristate = <0>; +				nvidia,tristate = <TEGRA_PIN_DISABLE>;  			};  			conf_ld17_0 {  				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",  					"ld23_22"; -				nvidia,pull = <1>; +				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;  			};  		}; @@ -457,7 +462,7 @@  		};  	}; -	pmc { +	pmc@7000e400 {  		nvidia,invert-interrupt;  		nvidia,suspend-mode = <1>;  		nvidia,cpu-pwr-good-time = <5000>; @@ -467,7 +472,7 @@  		nvidia,sys-clock-req-active-high;  	}; -	pcie-controller { +	pcie-controller@80003000 {  		pex-clk-supply = <&pci_clk_reg>;  		vdd-supply = <&pci_vdd_reg>;  	}; @@ -492,7 +497,7 @@  		#address-cells = <1>;  		#size-cells = <0>; -		clk32k_in: clock { +		clk32k_in: clock@0 {  			compatible = "fixed-clock";  			reg=<0>;  			#clock-cells = <0>; | 
