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-rw-r--r--arch/arm/mach-clps711x/Kconfig2
-rw-r--r--arch/arm/mach-clps711x/Makefile12
-rw-r--r--arch/arm/mach-clps711x/Makefile.boot1
-rw-r--r--arch/arm/mach-clps711x/autcpu12.c92
-rw-r--r--arch/arm/mach-clps711x/board-autcpu12.c179
-rw-r--r--arch/arm/mach-clps711x/board-cdb89712.c147
-rw-r--r--arch/arm/mach-clps711x/board-clep7312.c (renamed from arch/arm/mach-clps711x/clep7312.c)4
-rw-r--r--arch/arm/mach-clps711x/board-edb7211.c180
-rw-r--r--arch/arm/mach-clps711x/board-fortunet.c (renamed from arch/arm/mach-clps711x/fortunet.c)2
-rw-r--r--arch/arm/mach-clps711x/board-p720t.c232
-rw-r--r--arch/arm/mach-clps711x/cdb89712.c63
-rw-r--r--arch/arm/mach-clps711x/common.c181
-rw-r--r--arch/arm/mach-clps711x/common.h7
-rw-r--r--arch/arm/mach-clps711x/edb7211-arch.c66
-rw-r--r--arch/arm/mach-clps711x/edb7211-mm.c82
-rw-r--r--arch/arm/mach-clps711x/include/mach/autcpu12.h23
-rw-r--r--arch/arm/mach-clps711x/include/mach/clps711x.h27
-rw-r--r--arch/arm/mach-clps711x/include/mach/entry-macro.S51
-rw-r--r--arch/arm/mach-clps711x/include/mach/hardware.h67
-rw-r--r--arch/arm/mach-clps711x/include/mach/irqs.h50
-rw-r--r--arch/arm/mach-clps711x/include/mach/syspld.h9
-rw-r--r--arch/arm/mach-clps711x/p720t.c181
22 files changed, 930 insertions, 728 deletions
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
index 263242da2cb8..2d00165e85ec 100644
--- a/arch/arm/mach-clps711x/Kconfig
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -10,7 +10,6 @@ config ARCH_AUTCPU12
config ARCH_CDB89712
bool "CDB89712"
- select ISA
help
This is an evaluation board from Cirrus for the CS89712 processor.
The board includes 2 serial ports, Ethernet, IRDA, and expansion
@@ -25,7 +24,6 @@ config ARCH_EDB7211
bool "EDB7211"
select ARCH_SELECT_MEMORY_MODEL
select ARCH_SPARSEMEM_ENABLE
- select ISA
help
Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
evaluation board.
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
index 6da6940b3656..992995af666a 100644
--- a/arch/arm/mach-clps711x/Makefile
+++ b/arch/arm/mach-clps711x/Makefile
@@ -9,9 +9,9 @@ obj-m :=
obj-n :=
obj- :=
-obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o
-obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
-obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
-obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o
-obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o
-obj-$(CONFIG_ARCH_P720T) += p720t.o
+obj-$(CONFIG_ARCH_AUTCPU12) += board-autcpu12.o
+obj-$(CONFIG_ARCH_CDB89712) += board-cdb89712.o
+obj-$(CONFIG_ARCH_CLEP7312) += board-clep7312.o
+obj-$(CONFIG_ARCH_EDB7211) += board-edb7211.o
+obj-$(CONFIG_ARCH_FORTUNET) += board-fortunet.o
+obj-$(CONFIG_ARCH_P720T) += board-p720t.o
diff --git a/arch/arm/mach-clps711x/Makefile.boot b/arch/arm/mach-clps711x/Makefile.boot
index 9398e859b5af..eba77d35a615 100644
--- a/arch/arm/mach-clps711x/Makefile.boot
+++ b/arch/arm/mach-clps711x/Makefile.boot
@@ -1,5 +1,4 @@
# The standard locations for stuff on CLPS711x type processors
- zreladdr-y += 0xc0028000
params_phys-y := 0xc0000100
# Should probably have some agreement on these...
initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
deleted file mode 100644
index 32871918bb6e..000000000000
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * linux/arch/arm/mach-clps711x/autcpu12.c
- *
- * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/io.h>
-#include <linux/ioport.h>
-#include <linux/platform_device.h>
-
-#include <mach/hardware.h>
-#include <asm/sizes.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-
-#include <asm/mach/map.h>
-#include <mach/autcpu12.h>
-
-#include "common.h"
-
-/*
- * The on-chip registers are given a size of 1MB so that a section can
- * be used to map them; this saves a page table. This is the place to
- * add mappings for ROM, expansion memory, PCMCIA, etc. (if static
- * mappings are chosen for those areas).
- *
-*/
-
-static struct map_desc autcpu12_io_desc[] __initdata = {
- /* memory-mapped extra io and CS8900A Ethernet chip */
- /* ethernet chip */
- {
- .virtual = AUTCPU12_VIRT_CS8900A,
- .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
- .length = SZ_1M,
- .type = MT_DEVICE
- }
-};
-
-void __init autcpu12_map_io(void)
-{
- clps711x_map_io();
- iotable_init(autcpu12_io_desc, ARRAY_SIZE(autcpu12_io_desc));
-}
-
-static struct resource autcpu12_nvram_resource[] __initdata = {
- DEFINE_RES_MEM_NAMED(AUTCPU12_PHYS_NVRAM, SZ_128K, "SRAM"),
-};
-
-static struct platform_device autcpu12_nvram_pdev __initdata = {
- .name = "autcpu12_nvram",
- .id = -1,
- .resource = autcpu12_nvram_resource,
- .num_resources = ARRAY_SIZE(autcpu12_nvram_resource),
-};
-
-static void __init autcpu12_init(void)
-{
- platform_device_register(&autcpu12_nvram_pdev);
-}
-
-MACHINE_START(AUTCPU12, "autronix autcpu12")
- /* Maintainer: Thomas Gleixner */
- .atag_offset = 0x20000,
- .init_machine = autcpu12_init,
- .map_io = autcpu12_map_io,
- .init_irq = clps711x_init_irq,
- .timer = &clps711x_timer,
- .restart = clps711x_restart,
-MACHINE_END
-
diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c
new file mode 100644
index 000000000000..3fbf43f72589
--- /dev/null
+++ b/arch/arm/mach-clps711x/board-autcpu12.c
@@ -0,0 +1,179 @@
+/*
+ * linux/arch/arm/mach-clps711x/autcpu12.c
+ *
+ * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand-gpio.h>
+#include <linux/platform_device.h>
+#include <linux/basic_mmio_gpio.h>
+
+#include <mach/hardware.h>
+#include <asm/sizes.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+
+#include <asm/mach/map.h>
+#include <mach/autcpu12.h>
+
+#include "common.h"
+
+#define AUTCPU12_CS8900_BASE (CS2_PHYS_BASE + 0x300)
+#define AUTCPU12_CS8900_IRQ (IRQ_EINT3)
+
+#define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000)
+#define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10)
+
+#define AUTCPU12_MMGPIO_BASE (CLPS711X_NR_GPIO)
+#define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */
+#define AUTCPU12_SMC_RDY CLPS711X_GPIO(1, 2)
+#define AUTCPU12_SMC_ALE CLPS711X_GPIO(1, 3)
+#define AUTCPU12_SMC_CLE CLPS711X_GPIO(1, 3)
+
+static struct resource autcpu12_cs8900_resource[] __initdata = {
+ DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K),
+ DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ),
+};
+
+static struct resource autcpu12_nvram_resource[] __initdata = {
+ DEFINE_RES_MEM_NAMED(AUTCPU12_PHYS_NVRAM, SZ_128K, "SRAM"),
+};
+
+static struct platform_device autcpu12_nvram_pdev __initdata = {
+ .name = "autcpu12_nvram",
+ .id = -1,
+ .resource = autcpu12_nvram_resource,
+ .num_resources = ARRAY_SIZE(autcpu12_nvram_resource),
+};
+
+static struct resource autcpu12_nand_resource[] __initdata = {
+ DEFINE_RES_MEM(AUTCPU12_SMC_BASE, SZ_16),
+};
+
+static struct mtd_partition autcpu12_nand_parts[] __initdata = {
+ {
+ .name = "Flash partition 1",
+ .offset = 0,
+ .size = SZ_8M,
+ },
+ {
+ .name = "Flash partition 2",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static void __init autcpu12_adjust_parts(struct gpio_nand_platdata *pdata,
+ size_t sz)
+{
+ switch (sz) {
+ case SZ_16M:
+ case SZ_32M:
+ break;
+ case SZ_64M:
+ case SZ_128M:
+ pdata->parts[0].size = SZ_16M;
+ break;
+ default:
+ pr_warn("Unsupported SmartMedia device size %u\n", sz);
+ break;
+ }
+}
+
+static struct gpio_nand_platdata autcpu12_nand_pdata __initdata = {
+ .gpio_rdy = AUTCPU12_SMC_RDY,
+ .gpio_nce = AUTCPU12_SMC_NCE,
+ .gpio_ale = AUTCPU12_SMC_ALE,
+ .gpio_cle = AUTCPU12_SMC_CLE,
+ .gpio_nwp = -1,
+ .chip_delay = 20,
+ .parts = autcpu12_nand_parts,
+ .num_parts = ARRAY_SIZE(autcpu12_nand_parts),
+ .adjust_parts = autcpu12_adjust_parts,
+};
+
+static struct platform_device autcpu12_nand_pdev __initdata = {
+ .name = "gpio-nand",
+ .id = -1,
+ .resource = autcpu12_nand_resource,
+ .num_resources = ARRAY_SIZE(autcpu12_nand_resource),
+ .dev = {
+ .platform_data = &autcpu12_nand_pdata,
+ },
+};
+
+static struct resource autcpu12_mmgpio_resource[] __initdata = {
+ DEFINE_RES_MEM_NAMED(AUTCPU12_SMC_SEL_BASE, SZ_1, "dat"),
+};
+
+static struct bgpio_pdata autcpu12_mmgpio_pdata __initdata = {
+ .base = AUTCPU12_MMGPIO_BASE,
+ .ngpio = 8,
+};
+
+static struct platform_device autcpu12_mmgpio_pdev __initdata = {
+ .name = "basic-mmio-gpio",
+ .id = -1,
+ .resource = autcpu12_mmgpio_resource,
+ .num_resources = ARRAY_SIZE(autcpu12_mmgpio_resource),
+ .dev = {
+ .platform_data = &autcpu12_mmgpio_pdata,
+ },
+};
+
+static void __init autcpu12_init(void)
+{
+ platform_device_register_simple("video-clps711x", 0, NULL, 0);
+ platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource,
+ ARRAY_SIZE(autcpu12_cs8900_resource));
+ platform_device_register(&autcpu12_mmgpio_pdev);
+ platform_device_register(&autcpu12_nvram_pdev);
+}
+
+static void __init autcpu12_init_late(void)
+{
+ if (IS_ENABLED(MTD_NAND_GPIO) && IS_ENABLED(GPIO_GENERIC_PLATFORM)) {
+ /* We are need both drivers to handle NAND */
+ platform_device_register(&autcpu12_nand_pdev);
+ }
+}
+
+MACHINE_START(AUTCPU12, "autronix autcpu12")
+ /* Maintainer: Thomas Gleixner */
+ .atag_offset = 0x20000,
+ .nr_irqs = CLPS711X_NR_IRQS,
+ .map_io = clps711x_map_io,
+ .init_irq = clps711x_init_irq,
+ .timer = &clps711x_timer,
+ .init_machine = autcpu12_init,
+ .init_late = autcpu12_init_late,
+ .handle_irq = clps711x_handle_irq,
+ .restart = clps711x_restart,
+MACHINE_END
+
diff --git a/arch/arm/mach-clps711x/board-cdb89712.c b/arch/arm/mach-clps711x/board-cdb89712.c
new file mode 100644
index 000000000000..60900ddf97c9
--- /dev/null
+++ b/arch/arm/mach-clps711x/board-cdb89712.c
@@ -0,0 +1,147 @@
+/*
+ * linux/arch/arm/mach-clps711x/cdb89712.c
+ *
+ * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/plat-ram.h>
+#include <linux/mtd/partitions.h>
+
+#include <mach/hardware.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include "common.h"
+
+#define CDB89712_CS8900_BASE (CS2_PHYS_BASE + 0x300)
+#define CDB89712_CS8900_IRQ (IRQ_EINT3)
+
+static struct resource cdb89712_cs8900_resource[] __initdata = {
+ DEFINE_RES_MEM(CDB89712_CS8900_BASE, SZ_1K),
+ DEFINE_RES_IRQ(CDB89712_CS8900_IRQ),
+};
+
+static struct mtd_partition cdb89712_flash_partitions[] __initdata = {
+ {
+ .name = "Flash",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data cdb89712_flash_pdata __initdata = {
+ .width = 4,
+ .probe_type = "map_rom",
+ .parts = cdb89712_flash_partitions,
+ .nr_parts = ARRAY_SIZE(cdb89712_flash_partitions),
+};
+
+static struct resource cdb89712_flash_resources[] __initdata = {
+ DEFINE_RES_MEM(CS0_PHYS_BASE, SZ_8M),
+};
+
+static struct platform_device cdb89712_flash_pdev __initdata = {
+ .name = "physmap-flash",
+ .id = 0,
+ .resource = cdb89712_flash_resources,
+ .num_resources = ARRAY_SIZE(cdb89712_flash_resources),
+ .dev = {
+ .platform_data = &cdb89712_flash_pdata,
+ },
+};
+
+static struct mtd_partition cdb89712_bootrom_partitions[] __initdata = {
+ {
+ .name = "BootROM",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data cdb89712_bootrom_pdata __initdata = {
+ .width = 4,
+ .probe_type = "map_rom",
+ .parts = cdb89712_bootrom_partitions,
+ .nr_parts = ARRAY_SIZE(cdb89712_bootrom_partitions),
+};
+
+static struct resource cdb89712_bootrom_resources[] __initdata = {
+ DEFINE_RES_NAMED(CS7_PHYS_BASE, SZ_128, "BOOTROM", IORESOURCE_MEM |
+ IORESOURCE_CACHEABLE | IORESOURCE_READONLY),
+};
+
+static struct platform_device cdb89712_bootrom_pdev __initdata = {
+ .name = "physmap-flash",
+ .id = 1,
+ .resource = cdb89712_bootrom_resources,
+ .num_resources = ARRAY_SIZE(cdb89712_bootrom_resources),
+ .dev = {
+ .platform_data = &cdb89712_bootrom_pdata,
+ },
+};
+
+static struct platdata_mtd_ram cdb89712_sram_pdata __initdata = {
+ .bankwidth = 4,
+};
+
+static struct resource cdb89712_sram_resources[] __initdata = {
+ DEFINE_RES_MEM(CLPS711X_SRAM_BASE, CLPS711X_SRAM_SIZE),
+};
+
+static struct platform_device cdb89712_sram_pdev __initdata = {
+ .name = "mtd-ram",
+ .id = 0,
+ .resource = cdb89712_sram_resources,
+ .num_resources = ARRAY_SIZE(cdb89712_sram_resources),
+ .dev = {
+ .platform_data = &cdb89712_sram_pdata,
+ },
+};
+
+static void __init cdb89712_init(void)
+{
+ platform_device_register(&cdb89712_flash_pdev);
+ platform_device_register(&cdb89712_bootrom_pdev);
+ platform_device_register(&cdb89712_sram_pdev);
+ platform_device_register_simple("cs89x0", 0, cdb89712_cs8900_resource,
+ ARRAY_SIZE(cdb89712_cs8900_resource));
+}
+
+MACHINE_START(CDB89712, "Cirrus-CDB89712")
+ /* Maintainer: Ray Lehtiniemi */
+ .atag_offset = 0x100,
+ .nr_irqs = CLPS711X_NR_IRQS,
+ .map_io = clps711x_map_io,
+ .init_irq = clps711x_init_irq,
+ .timer = &clps711x_timer,
+ .init_machine = cdb89712_init,
+ .handle_irq = clps711x_handle_irq,
+ .restart = clps711x_restart,
+MACHINE_END
diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/board-clep7312.c
index dbc7842639dc..0b32a487183b 100644
--- a/arch/arm/mach-clps711x/clep7312.c
+++ b/arch/arm/mach-clps711x/board-clep7312.c
@@ -33,14 +33,14 @@ fixup_clep7312(struct tag *tags, char **cmdline, struct meminfo *mi)
mi->bank[0].size = 0x01000000;
}
-
MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
/* Maintainer: Nobody */
.atag_offset = 0x0100,
+ .nr_irqs = CLPS711X_NR_IRQS,
.fixup = fixup_clep7312,
.map_io = clps711x_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .handle_irq = clps711x_handle_irq,
.restart = clps711x_restart,
MACHINE_END
-
diff --git a/arch/arm/mach-clps711x/board-edb7211.c b/arch/arm/mach-clps711x/board-edb7211.c
new file mode 100644
index 000000000000..71aa5cf2c0d3
--- /dev/null
+++ b/arch/arm/mach-clps711x/board-edb7211.c
@@ -0,0 +1,180 @@
+/*
+ * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/memblock.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/backlight.h>
+#include <linux/platform_device.h>
+
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/setup.h>
+#include <asm/mach/map.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <video/platform_lcd.h>
+
+#include <mach/hardware.h>
+
+#include "common.h"
+
+#define VIDEORAM_SIZE SZ_128K
+
+#define EDB7211_LCD_DC_DC_EN CLPS711X_GPIO(3, 1)
+#define EDB7211_LCDEN CLPS711X_GPIO(3, 2)
+#define EDB7211_LCDBL CLPS711X_GPIO(3, 3)
+
+#define EDB7211_FLASH0_BASE (CS0_PHYS_BASE)
+#define EDB7211_FLASH1_BASE (CS1_PHYS_BASE)
+#define EDB7211_CS8900_BASE (CS2_PHYS_BASE + 0x300)
+#define EDB7211_CS8900_IRQ (IRQ_EINT3)
+
+static struct resource edb7211_cs8900_resource[] __initdata = {
+ DEFINE_RES_MEM(EDB7211_CS8900_BASE, SZ_1K),
+ DEFINE_RES_IRQ(EDB7211_CS8900_IRQ),
+};
+
+static struct mtd_partition edb7211_flash_partitions[] __initdata = {
+ {
+ .name = "Flash",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data edb7211_flash_pdata __initdata = {
+ .width = 4,
+ .parts = edb7211_flash_partitions,
+ .nr_parts = ARRAY_SIZE(edb7211_flash_partitions),
+};
+
+static struct resource edb7211_flash_resources[] __initdata = {
+ DEFINE_RES_MEM(EDB7211_FLASH0_BASE, SZ_8M),
+ DEFINE_RES_MEM(EDB7211_FLASH1_BASE, SZ_8M),
+};
+
+static struct platform_device edb7211_flash_pdev __initdata = {
+ .name = "physmap-flash",
+ .id = 0,
+ .resource = edb7211_flash_resources,
+ .num_resources = ARRAY_SIZE(edb7211_flash_resources),
+ .dev = {
+ .platform_data = &edb7211_flash_pdata,
+ },
+};
+
+static void edb7211_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
+{
+ if (power) {
+ gpio_set_value(EDB7211_LCDEN, 1);
+ udelay(100);
+ gpio_set_value(EDB7211_LCD_DC_DC_EN, 1);
+ } else {
+ gpio_set_value(EDB7211_LCD_DC_DC_EN, 0);
+ udelay(100);
+ gpio_set_value(EDB7211_LCDEN, 0);
+ }
+}
+
+static struct plat_lcd_data edb7211_lcd_power_pdata = {
+ .set_power = edb7211_lcd_power_set,
+};
+
+static void edb7211_lcd_backlight_set_intensity(int intensity)
+{
+ gpio_set_value(EDB7211_LCDBL, intensity);
+}
+
+static struct generic_bl_info edb7211_lcd_backlight_pdata = {
+ .name = "lcd-backlight.0",
+ .default_intensity = 0x01,
+ .max_intensity = 0x01,
+ .set_bl_intensity = edb7211_lcd_backlight_set_intensity,
+};
+
+static struct gpio edb7211_gpios[] __initconst = {
+ { EDB7211_LCD_DC_DC_EN, GPIOF_OUT_INIT_LOW, "LCD DC-DC" },
+ { EDB7211_LCDEN, GPIOF_OUT_INIT_LOW, "LCD POWER" },
+ { EDB7211_LCDBL, GPIOF_OUT_INIT_LOW, "LCD BACKLIGHT" },
+};
+
+static struct map_desc edb7211_io_desc[] __initdata = {
+ { /* Memory-mapped extra keyboard row */
+ .virtual = IO_ADDRESS(EP7211_PHYS_EXTKBD),
+ .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
+ .length = SZ_1M,
+ .type = MT_DEVICE,
+ },
+};
+
+void __init edb7211_map_io(void)
+{
+ clps711x_map_io();
+ iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
+}
+
+/* Reserve screen memory region at the start of main system memory. */
+static void __init edb7211_reserve(void)
+{
+ memblock_reserve(PHYS_OFFSET, VIDEORAM_SIZE);
+}
+
+static void __init
+fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
+{
+ /*
+ * Bank start addresses are not present in the information
+ * passed in from the boot loader. We could potentially
+ * detect them, but instead we hard-code them.
+ *
+ * Banks sizes _are_ present in the param block, but we're
+ * not using that information yet.
+ */
+ mi->bank[0].start = 0xc0000000;
+ mi->bank[0].size = SZ_8M;
+ mi->bank[1].start = 0xc1000000;
+ mi->bank[1].size = SZ_8M;
+ mi->nr_banks = 2;
+}
+
+static void __init edb7211_init(void)
+{
+ gpio_request_array(edb7211_gpios, ARRAY_SIZE(edb7211_gpios));
+
+ platform_device_register(&edb7211_flash_pdev);
+ platform_device_register_data(&platform_bus, "platform-lcd", 0,
+ &edb7211_lcd_power_pdata,
+ sizeof(edb7211_lcd_power_pdata));
+ platform_device_register_data(&platform_bus, "generic-bl", 0,
+ &edb7211_lcd_backlight_pdata,
+ sizeof(edb7211_lcd_backlight_pdata));
+ platform_device_register_simple("video-clps711x", 0, NULL, 0);
+ platform_device_register_simple("cs89x0", 0, edb7211_cs8900_resource,
+ ARRAY_SIZE(edb7211_cs8900_resource));
+}
+
+MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
+ /* Maintainer: Jon McClintock */
+ .atag_offset = VIDEORAM_SIZE + 0x100,
+ .nr_irqs = CLPS711X_NR_IRQS,
+ .fixup = fixup_edb7211,
+ .reserve = edb7211_reserve,
+ .map_io = edb7211_map_io,
+ .init_irq = clps711x_init_irq,
+ .timer = &clps711x_timer,
+ .init_machine = edb7211_init,
+ .handle_irq = clps711x_handle_irq,
+ .restart = clps711x_restart,
+MACHINE_END
diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/board-fortunet.c
index 3a3f0b702cb4..7d0125580366 100644
--- a/arch/arm/mach-clps711x/fortunet.c
+++ b/arch/arm/mach-clps711x/board-fortunet.c
@@ -74,9 +74,11 @@ fortunet_fixup(struct tag *tags, char **cmdline, struct meminfo *mi)
MACHINE_START(FORTUNET, "ARM-FortuNet")
/* Maintainer: FortuNet Inc. */
+ .nr_irqs = CLPS711X_NR_IRQS,
.fixup = fortunet_fixup,
.map_io = clps711x_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .handle_irq = clps711x_handle_irq,
.restart = clps711x_restart,
MACHINE_END
diff --git a/arch/arm/mach-clps711x/board-p720t.c b/arch/arm/mach-clps711x/board-p720t.c
new file mode 100644
index 000000000000..1518fc83babd
--- /dev/null
+++ b/arch/arm/mach-clps711x/board-p720t.c
@@ -0,0 +1,232 @@
+/*
+ * linux/arch/arm/mach-clps711x/p720t.c
+ *
+ * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/leds.h>
+#include <linux/sizes.h>
+#include <linux/backlight.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand-gpio.h>
+
+#include <mach/hardware.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/syspld.h>
+
+#include <video/platform_lcd.h>
+
+#include "common.h"
+
+#define P720T_USERLED CLPS711X_GPIO(3, 0)
+#define P720T_NAND_CLE CLPS711X_GPIO(4, 0)
+#define P720T_NAND_ALE CLPS711X_GPIO(4, 1)
+#define P720T_NAND_NCE CLPS711X_GPIO(4, 2)
+
+#define P720T_NAND_BASE (CLPS711X_SDRAM1_BASE)
+
+static struct resource p720t_nand_resource[] __initdata = {
+ DEFINE_RES_MEM(P720T_NAND_BASE, SZ_4),
+};
+
+static struct mtd_partition p720t_nand_parts[] __initdata = {
+ {
+ .name = "Flash partition 1",
+ .offset = 0,
+ .size = SZ_2M,
+ },
+ {
+ .name = "Flash partition 2",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct gpio_nand_platdata p720t_nand_pdata __initdata = {
+ .gpio_rdy = -1,
+ .gpio_nce = P720T_NAND_NCE,
+ .gpio_ale = P720T_NAND_ALE,
+ .gpio_cle = P720T_NAND_CLE,
+ .gpio_nwp = -1,
+ .chip_delay = 15,
+ .parts = p720t_nand_parts,
+ .num_parts = ARRAY_SIZE(p720t_nand_parts),
+};
+
+static struct platform_device p720t_nand_pdev __initdata = {
+ .name = "gpio-nand",
+ .id = -1,
+ .resource = p720t_nand_resource,
+ .num_resources = ARRAY_SIZE(p720t_nand_resource),
+ .dev = {
+ .platform_data = &p720t_nand_pdata,
+ },
+};
+
+static void p720t_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
+{
+ if (power) {
+ PLD_LCDEN = PLD_LCDEN_EN;
+ PLD_PWR |= PLD_S4_ON | PLD_S2_ON | PLD_S1_ON;
+ } else {
+ PLD_PWR &= ~(PLD_S4_ON | PLD_S2_ON | PLD_S1_ON);
+ PLD_LCDEN = 0;
+ }
+}
+
+static struct plat_lcd_data p720t_lcd_power_pdata = {
+ .set_power = p720t_lcd_power_set,
+};
+
+static void p720t_lcd_backlight_set_intensity(int intensity)
+{
+ if (intensity)
+ PLD_PWR |= PLD_S3_ON;
+ else
+ PLD_PWR = 0;
+}
+
+static struct generic_bl_info p720t_lcd_backlight_pdata = {
+ .name = "lcd-backlight.0",
+ .default_intensity = 0x01,
+ .max_intensity = 0x01,
+ .set_bl_intensity = p720t_lcd_backlight_set_intensity,
+};
+
+/*
+ * Map the P720T system PLD. It occupies two address spaces:
+ * 0x10000000 and 0x10400000. We map both regions as one.
+ */
+static struct map_desc p720t_io_desc[] __initdata = {
+ {
+ .virtual = SYSPLD_VIRT_BASE,
+ .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE),
+ .length = SZ_8M,
+ .type = MT_DEVICE,
+ },
+};
+
+static void __init
+fixup_p720t(struct tag *tag, char **cmdline, struct meminfo *mi)
+{
+ /*
+ * Our bootloader doesn't setup any tags (yet).
+ */
+ if (tag->hdr.tag != ATAG_CORE) {
+ tag->hdr.tag = ATAG_CORE;
+ tag->hdr.size = tag_size(tag_core);
+ tag->u.core.flags = 0;
+ tag->u.core.pagesize = PAGE_SIZE;
+ tag->u.core.rootdev = 0x0100;
+
+ tag = tag_next(tag);
+ tag->hdr.tag = ATAG_MEM;
+ tag->hdr.size = tag_size(tag_mem32);
+ tag->u.mem.size = 4096;
+ tag->u.mem.start = PHYS_OFFSET;
+
+ tag = tag_next(tag);
+ tag->hdr.tag = ATAG_NONE;
+ tag->hdr.size = 0;
+ }
+}
+
+static void __init p720t_map_io(void)
+{
+ clps711x_map_io();
+ iotable_init(p720t_io_desc, ARRAY_SIZE(p720t_io_desc));
+}
+
+static void __init p720t_init_early(void)
+{
+ /*
+ * Power down as much as possible in case we don't
+ * have the drivers loaded.
+ */
+ PLD_LCDEN = 0;
+ PLD_PWR &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
+
+ PLD_KBD = 0;
+ PLD_IO = 0;
+ PLD_IRDA = 0;
+ PLD_CODEC = 0;
+ PLD_TCH = 0;
+ PLD_SPI = 0;
+ if (!IS_ENABLED(CONFIG_DEBUG_LL)) {
+ PLD_COM2 = 0;
+ PLD_COM1 = 0;
+ }
+}
+
+static struct gpio_led p720t_gpio_leds[] = {
+ {
+ .name = "User LED",
+ .default_trigger = "heartbeat",
+ .gpio = P720T_USERLED,
+ },
+};
+
+static struct gpio_led_platform_data p720t_gpio_led_pdata __initdata = {
+ .leds = p720t_gpio_leds,
+ .num_leds = ARRAY_SIZE(p720t_gpio_leds),
+};
+
+static void __init p720t_init(void)
+{
+ platform_device_register(&p720t_nand_pdev);
+ platform_device_register_data(&platform_bus, "platform-lcd", 0,
+ &p720t_lcd_power_pdata,
+ sizeof(p720t_lcd_power_pdata));
+ platform_device_register_data(&platform_bus, "generic-bl", 0,
+ &p720t_lcd_backlight_pdata,
+ sizeof(p720t_lcd_backlight_pdata));
+ platform_device_register_simple("video-clps711x", 0, NULL, 0);
+}
+
+static void __init p720t_init_late(void)
+{
+ platform_device_register_data(&platform_bus, "leds-gpio", 0,
+ &p720t_gpio_led_pdata,
+ sizeof(p720t_gpio_led_pdata));
+}
+
+MACHINE_START(P720T, "ARM-Prospector720T")
+ /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
+ .atag_offset = 0x100,
+ .nr_irqs = CLPS711X_NR_IRQS,
+ .fixup = fixup_p720t,
+ .map_io = p720t_map_io,
+ .init_early = p720t_init_early,
+ .init_irq = clps711x_init_irq,
+ .timer = &clps711x_timer,
+ .init_machine = p720t_init,
+ .init_late = p720t_init_late,
+ .handle_irq = clps711x_handle_irq,
+ .restart = clps711x_restart,
+MACHINE_END
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
deleted file mode 100644
index c314f49d6ef6..000000000000
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * linux/arch/arm/mach-clps711x/cdb89712.c
- *
- * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include "common.h"
-
-/*
- * Map the CS89712 Ethernet port. That should be moved to the
- * ethernet driver, perhaps.
- */
-static struct map_desc cdb89712_io_desc[] __initdata = {
- {
- .virtual = ETHER_BASE,
- .pfn =__phys_to_pfn(ETHER_START),
- .length = ETHER_SIZE,
- .type = MT_DEVICE
- }
-};
-
-static void __init cdb89712_map_io(void)
-{
- clps711x_map_io();
- iotable_init(cdb89712_io_desc, ARRAY_SIZE(cdb89712_io_desc));
-}
-
-MACHINE_START(CDB89712, "Cirrus-CDB89712")
- /* Maintainer: Ray Lehtiniemi */
- .atag_offset = 0x100,
- .map_io = cdb89712_map_io,
- .init_irq = clps711x_init_irq,
- .timer = &clps711x_timer,
- .restart = clps711x_restart,
-MACHINE_END
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index 509243d89a32..e046439573ee 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -21,13 +21,16 @@
*/
#include <linux/io.h>
#include <linux/init.h>
+#include <linux/sizes.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
+#include <linux/clockchips.h>
#include <linux/clk-provider.h>
-#include <asm/sizes.h>
+#include <asm/exception.h>
+#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/system_misc.h>
@@ -36,7 +39,6 @@
static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh,
*clk_tint, *clk_spi;
-static unsigned long latch;
/*
* This maps the generic CLPS711x registers
@@ -45,7 +47,7 @@ static struct map_desc clps711x_io_desc[] __initdata = {
{
.virtual = (unsigned long)CLPS711X_VIRT_BASE,
.pfn = __phys_to_pfn(CLPS711X_PHYS_BASE),
- .length = SZ_1M,
+ .length = SZ_64K,
.type = MT_DEVICE
}
};
@@ -64,7 +66,7 @@ static void int1_mask(struct irq_data *d)
clps_writel(intmr1, INTMR1);
}
-static void int1_ack(struct irq_data *d)
+static void int1_eoi(struct irq_data *d)
{
switch (d->irq) {
case IRQ_CSINT: clps_writel(0, COEOI); break;
@@ -86,7 +88,8 @@ static void int1_unmask(struct irq_data *d)
}
static struct irq_chip int1_chip = {
- .irq_ack = int1_ack,
+ .name = "Interrupt Vector 1",
+ .irq_eoi = int1_eoi,
.irq_mask = int1_mask,
.irq_unmask = int1_unmask,
};
@@ -100,7 +103,7 @@ static void int2_mask(struct irq_data *d)
clps_writel(intmr2, INTMR2);
}
-static void int2_ack(struct irq_data *d)
+static void int2_eoi(struct irq_data *d)
{
switch (d->irq) {
case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
@@ -117,73 +120,160 @@ static void int2_unmask(struct irq_data *d)
}
static struct irq_chip int2_chip = {
- .irq_ack = int2_ack,
+ .name = "Interrupt Vector 2",
+ .irq_eoi = int2_eoi,
.irq_mask = int2_mask,
.irq_unmask = int2_unmask,
};
+static void int3_mask(struct irq_data *d)
+{
+ u32 intmr3;
+
+ intmr3 = clps_readl(INTMR3);
+ intmr3 &= ~(1 << (d->irq - 32));
+ clps_writel(intmr3, INTMR3);
+}
+
+static void int3_unmask(struct irq_data *d)
+{
+ u32 intmr3;
+
+ intmr3 = clps_readl(INTMR3);
+ intmr3 |= 1 << (d->irq - 32);
+ clps_writel(intmr3, INTMR3);
+}
+
+static struct irq_chip int3_chip = {
+ .name = "Interrupt Vector 3",
+ .irq_mask = int3_mask,
+ .irq_unmask = int3_unmask,
+};
+
+static struct {
+ int nr;
+ struct irq_chip *chip;
+ irq_flow_handler_t handle;
+} clps711x_irqdescs[] __initdata = {
+ { IRQ_CSINT, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_EINT1, &int1_chip, handle_level_irq, },
+ { IRQ_EINT2, &int1_chip, handle_level_irq, },
+ { IRQ_EINT3, &int1_chip, handle_level_irq, },
+ { IRQ_TC1OI, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_TC2OI, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_RTCMI, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_TINT, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_UTXINT1, &int1_chip, handle_level_irq, },
+ { IRQ_URXINT1, &int1_chip, handle_level_irq, },
+ { IRQ_UMSINT, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_SSEOTI, &int1_chip, handle_level_irq, },
+ { IRQ_KBDINT, &int2_chip, handle_fasteoi_irq, },
+ { IRQ_SS2RX, &int2_chip, handle_level_irq, },
+ { IRQ_SS2TX, &int2_chip, handle_level_irq, },
+ { IRQ_UTXINT2, &int2_chip, handle_level_irq, },
+ { IRQ_URXINT2, &int2_chip, handle_level_irq, },
+};
+
void __init clps711x_init_irq(void)
{
unsigned int i;
- for (i = 0; i < NR_IRQS; i++) {
- if (INT1_IRQS & (1 << i)) {
- irq_set_chip_and_handler(i, &int1_chip,
- handle_level_irq);
- set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
- }
- if (INT2_IRQS & (1 << i)) {
- irq_set_chip_and_handler(i, &int2_chip,
- handle_level_irq);
- set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
- }
- }
-
- /*
- * Disable interrupts
- */
+ /* Disable interrupts */
clps_writel(0, INTMR1);
clps_writel(0, INTMR2);
+ clps_writel(0, INTMR3);
- /*
- * Clear down any pending interrupts
- */
+ /* Clear down any pending interrupts */
+ clps_writel(0, BLEOI);
+ clps_writel(0, MCEOI);
clps_writel(0, COEOI);
clps_writel(0, TC1EOI);
clps_writel(0, TC2EOI);
clps_writel(0, RTCEOI);
clps_writel(0, TEOI);
clps_writel(0, UMSEOI);
- clps_writel(0, SYNCIO);
clps_writel(0, KBDEOI);
+ clps_writel(0, SRXEOF);
+ clps_writel(0xffffffff, DAISR);
+
+ for (i = 0; i < ARRAY_SIZE(clps711x_irqdescs); i++) {
+ irq_set_chip_and_handler(clps711x_irqdescs[i].nr,
+ clps711x_irqdescs[i].chip,
+ clps711x_irqdescs[i].handle);
+ set_irq_flags(clps711x_irqdescs[i].nr,
+ IRQF_VALID | IRQF_PROBE);
+ }
+
+ if (IS_ENABLED(CONFIG_FIQ)) {
+ init_FIQ(0);
+ irq_set_chip_and_handler(IRQ_DAIINT, &int3_chip,
+ handle_bad_irq);
+ set_irq_flags(IRQ_DAIINT,
+ IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
+ }
}
-/*
- * gettimeoffset() returns time since last timer tick, in usecs.
- *
- * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
- * 'tick' is usecs per jiffy.
- */
-static unsigned long clps711x_gettimeoffset(void)
+inline u32 fls16(u32 x)
{
- unsigned long hwticks;
- hwticks = latch - (clps_readl(TC2D) & 0xffff);
- return (hwticks * (tick_nsec / 1000)) / latch;
+ u32 r = 15;
+
+ if (!(x & 0xff00)) {
+ x <<= 8;
+ r -= 8;
+ }
+ if (!(x & 0xf000)) {
+ x <<= 4;
+ r -= 4;
+ }
+ if (!(x & 0xc000)) {
+ x <<= 2;
+ r -= 2;
+ }
+ if (!(x & 0x8000))
+ r--;
+
+ return r;
}
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id)
+asmlinkage void __exception_irq_entry clps711x_handle_irq(struct pt_regs *regs)
{
- timer_tick();
+ u32 irqstat;
+ void __iomem *base = CLPS711X_VIRT_BASE;
+
+ irqstat = readl_relaxed(base + INTSR1) & readl_relaxed(base + INTMR1);
+ if (irqstat) {
+ handle_IRQ(fls16(irqstat), regs);
+ return;
+ }
+
+ irqstat = readl_relaxed(base + INTSR2) & readl_relaxed(base + INTMR2);
+ if (likely(irqstat))
+ handle_IRQ(fls16(irqstat) + 16, regs);
+}
+
+static void clps711x_clockevent_set_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt)
+{
+}
+
+static struct clock_event_device clockevent_clps711x = {
+ .name = "CLPS711x Clockevents",
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_PERIODIC,
+ .set_mode = clps711x_clockevent_set_mode,
+};
+
+static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id)
+{
+ clockevent_clps711x.event_handler(&clockevent_clps711x);
+
return IRQ_HANDLED;
}
static struct irqaction clps711x_timer_irq = {
.name = "CLPS711x Timer Tick",
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
- .handler = p720t_timer_interrupt,
+ .handler = clps711x_timer_interrupt,
};
static void add_fixed_clk(struct clk *clk, const char *name, int rate)
@@ -244,20 +334,19 @@ static void __init clps711x_timer_init(void)
pr_info("CPU frequency set at %i Hz.\n", cpu);
- latch = (timh + HZ / 2) / HZ;
+ clps_writew(DIV_ROUND_CLOSEST(timh, HZ), TC2D);
tmp = clps_readl(SYSCON1);
tmp |= SYSCON1_TC2S | SYSCON1_TC2M;
clps_writel(tmp, SYSCON1);
- clps_writel(latch - 1, TC2D);
+ clockevents_config_and_register(&clockevent_clps711x, timh, 1, 0xffff);
setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
}
struct sys_timer clps711x_timer = {
.init = clps711x_timer_init,
- .offset = clps711x_gettimeoffset,
};
void clps711x_restart(char mode, const char *cmd)
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h
index fc0f0650dcb5..b7c0c75c90c0 100644
--- a/arch/arm/mach-clps711x/common.h
+++ b/arch/arm/mach-clps711x/common.h
@@ -4,9 +4,14 @@
* Common bits.
*/
+#define CLPS711X_NR_IRQS (33)
+#define CLPS711X_NR_GPIO (4 * 8 + 3)
+#define CLPS711X_GPIO(prt, bit) ((prt) * 8 + (bit))
+
struct sys_timer;
extern void clps711x_map_io(void);
extern void clps711x_init_irq(void);
-extern struct sys_timer clps711x_timer;
+extern void clps711x_handle_irq(struct pt_regs *regs);
extern void clps711x_restart(char mode, const char *cmd);
+extern struct sys_timer clps711x_timer;
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c
deleted file mode 100644
index 5fad0b4f40ad..000000000000
--- a/arch/arm/mach-clps711x/edb7211-arch.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * linux/arch/arm/mach-clps711x/arch-edb7211.c
- *
- * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/memblock.h>
-#include <linux/types.h>
-#include <linux/string.h>
-
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include "common.h"
-
-extern void edb7211_map_io(void);
-
-/* Reserve screen memory region at the start of main system memory. */
-static void __init edb7211_reserve(void)
-{
- memblock_reserve(PHYS_OFFSET, 0x00020000);
-}
-
-static void __init
-fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
-{
- /*
- * Bank start addresses are not present in the information
- * passed in from the boot loader. We could potentially
- * detect them, but instead we hard-code them.
- *
- * Banks sizes _are_ present in the param block, but we're
- * not using that information yet.
- */
- mi->bank[0].start = 0xc0000000;
- mi->bank[0].size = 8*1024*1024;
- mi->bank[1].start = 0xc1000000;
- mi->bank[1].size = 8*1024*1024;
- mi->nr_banks = 2;
-}
-
-MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
- /* Maintainer: Jon McClintock */
- .atag_offset = 0x20100, /* 0xc0000000 - 0xc001ffff can be video RAM */
- .fixup = fixup_edb7211,
- .map_io = edb7211_map_io,
- .reserve = edb7211_reserve,
- .init_irq = clps711x_init_irq,
- .timer = &clps711x_timer,
- .restart = clps711x_restart,
-MACHINE_END
diff --git a/arch/arm/mach-clps711x/edb7211-mm.c b/arch/arm/mach-clps711x/edb7211-mm.c
deleted file mode 100644
index 4372f06c9929..000000000000
--- a/arch/arm/mach-clps711x/edb7211-mm.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * linux/arch/arm/mach-clps711x/mm.c
- *
- * Extra MM routines for the EDB7211 board
- *
- * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/bug.h>
-
-#include <mach/hardware.h>
-#include <asm/page.h>
-#include <asm/sizes.h>
-
-#include <asm/mach/map.h>
-
-extern void clps711x_map_io(void);
-
-/*
- * The on-chip registers are given a size of 1MB so that a section can
- * be used to map them; this saves a page table. This is the place to
- * add mappings for ROM, expansion memory, PCMCIA, etc. (if static
- * mappings are chosen for those areas).
- *
- * Here is a physical memory map (to be fleshed out later):
- *
- * Physical Address Size Description
- * ----------------- ----- ---------------------------------
- * c0000000-c001ffff 128KB reserved for video RAM [1]
- * c0020000-c0023fff 16KB parameters (see Documentation/arm/Setup)
- * c0024000-c0027fff 16KB swapper_pg_dir (task 0 page directory)
- * c0028000-... kernel image (TEXTADDR)
- *
- * [1] Unused pages should be given back to the VM; they are not yet.
- * The parameter block should also be released (not sure if this
- * happens).
- */
-static struct map_desc edb7211_io_desc[] __initdata = {
- { /* memory-mapped extra keyboard row */
- .virtual = EP7211_VIRT_EXTKBD,
- .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
- .length = SZ_1M,
- .type = MT_DEVICE,
- }, { /* and CS8900A Ethernet chip */
- .virtual = EP7211_VIRT_CS8900A,
- .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
- .length = SZ_1M,
- .type = MT_DEVICE,
- }, { /* flash banks */
- .virtual = EP7211_VIRT_FLASH1,
- .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
- .length = SZ_8M,
- .type = MT_DEVICE,
- }, {
- .virtual = EP7211_VIRT_FLASH2,
- .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2),
- .length = SZ_8M,
- .type = MT_DEVICE,
- }
-};
-
-void __init edb7211_map_io(void)
-{
- clps711x_map_io();
- iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
-}
-
diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h
index 1588a365f610..0452f5f3f034 100644
--- a/arch/arm/mach-clps711x/include/mach/autcpu12.h
+++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h
@@ -21,24 +21,15 @@
#define __ASM_ARCH_AUTCPU12_H
/*
- * The CS8900A ethernet chip has its I/O registers wired to chip select 2
- * (nCS2). This is the mapping for it.
- */
-#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */
-#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */
-
-/*
* The flash bank is wired to chip select 0
*/
#define AUTCPU12_PHYS_FLASH CS0_PHYS_BASE /* physical */
/* offset for device specific information structure */
#define AUTCPU12_LCDINFO_OFFS (0x00010000)
-/*
-* Videomemory is the internal SRAM (CS 6)
-*/
+
+/* Videomemory in the internal SRAM (CS 6) */
#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE
-#define AUTCPU12_VIRT_VIDEO (0xfd000000)
/*
* All special IO's are tied to CS1
@@ -49,8 +40,6 @@
#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */
-#define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */
-
#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */
#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */
@@ -59,14 +48,6 @@
#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */
-/*
-* defines for smartmedia card access
-*/
-#define AUTCPU12_SMC_RDY (1<<2)
-#define AUTCPU12_SMC_ALE (1<<3)
-#define AUTCPU12_SMC_CLE (1<<4)
-#define AUTCPU12_SMC_PORT_OFFSET PBDR
-#define AUTCPU12_SMC_SELECT_OFFSET 0x10
/*
* defines for lcd contrast
*/
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h
index c82e21ca49c7..01d1b9559710 100644
--- a/arch/arm/mach-clps711x/include/mach/clps711x.h
+++ b/arch/arm/mach-clps711x/include/mach/clps711x.h
@@ -257,6 +257,9 @@
#define MEMCFG_BUS_WIDTH_16 (0)
#define MEMCFG_BUS_WIDTH_8 (3)
+#define MEMCFG_SQAEN (1 << 6)
+#define MEMCFG_CLKENB (1 << 7)
+
#define MEMCFG_WAITSTATE_8_3 (0 << 2)
#define MEMCFG_WAITSTATE_7_3 (1 << 2)
#define MEMCFG_WAITSTATE_6_3 (2 << 2)
@@ -274,4 +277,28 @@
#define MEMCFG_WAITSTATE_2_0 (14 << 2)
#define MEMCFG_WAITSTATE_1_0 (15 << 2)
+/* INTSR1 Interrupts */
+#define IRQ_CSINT (4)
+#define IRQ_EINT1 (5)
+#define IRQ_EINT2 (6)
+#define IRQ_EINT3 (7)
+#define IRQ_TC1OI (8)
+#define IRQ_TC2OI (9)
+#define IRQ_RTCMI (10)
+#define IRQ_TINT (11)
+#define IRQ_UTXINT1 (12)
+#define IRQ_URXINT1 (13)
+#define IRQ_UMSINT (14)
+#define IRQ_SSEOTI (15)
+
+/* INTSR2 Interrupts */
+#define IRQ_KBDINT (16 + 0)
+#define IRQ_SS2RX (16 + 1)
+#define IRQ_SS2TX (16 + 2)
+#define IRQ_UTXINT2 (16 + 12)
+#define IRQ_URXINT2 (16 + 13)
+
+/* INTSR3 Interrupts */
+#define IRQ_DAIINT (32 + 0)
+
#endif /* __MACH_CLPS711X_H */
diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S
deleted file mode 100644
index 56e5c2c23504..000000000000
--- a/arch/arm/mach-clps711x/include/mach/entry-macro.S
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * arch/arm/mach-clps711x/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for CLPS711X-based platforms
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <mach/hardware.h>
-
- .macro get_irqnr_preamble, base, tmp
- .endm
-
-#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
-#error INTSR stride != INTMR stride
-#endif
-
- .macro get_irqnr_and_base, irqnr, stat, base, mask
- mov \base, #CLPS711X_VIRT_BASE
- ldr \stat, [\base, #INTSR1]
- ldr \mask, [\base, #INTMR1]
- mov \irqnr, #4
- mov \mask, \mask, lsl #16
- and \stat, \stat, \mask, lsr #16
- movs \stat, \stat, lsr #4
- bne 1001f
-
- add \base, \base, #INTSR2 - INTSR1
- ldr \stat, [\base, #INTSR1]
- ldr \mask, [\base, #INTMR1]
- mov \irqnr, #16
- mov \mask, \mask, lsl #16
- and \stat, \stat, \mask, lsr #16
-
-1001: tst \stat, #255
- addeq \irqnr, \irqnr, #8
- moveq \stat, \stat, lsr #8
- tst \stat, #15
- addeq \irqnr, \irqnr, #4
- moveq \stat, \stat, lsr #4
- tst \stat, #3
- addeq \irqnr, \irqnr, #2
- moveq \stat, \stat, lsr #2
- tst \stat, #1
- addeq \irqnr, \irqnr, #1
- moveq \stat, \stat, lsr #1
- tst \stat, #1 @ bit 0 should be set
- .endm
-
-
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 8497775d6ee5..2f23dd5d73e4 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -24,7 +24,10 @@
#include <mach/clps711x.h>
-#define CLPS711X_VIRT_BASE IOMEM(0xff000000)
+#define IO_ADDRESS(x) (0xdc000000 + (((x) & 0x03ffffff) | \
+ (((x) >> 2) & 0x3c000000)))
+
+#define CLPS711X_VIRT_BASE IOMEM(IO_ADDRESS(CLPS711X_PHYS_BASE))
#ifndef __ASSEMBLY__
#define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off))
@@ -61,67 +64,17 @@
#define CS7_PHYS_BASE (0x00000000)
#endif
-#define SYSPLD_VIRT_BASE 0xfe000000
-#define SYSPLD_BASE SYSPLD_VIRT_BASE
-
-#if defined (CONFIG_ARCH_CDB89712)
-
-#define ETHER_START 0x20000000
-#define ETHER_SIZE 0x1000
-#define ETHER_BASE 0xfe000000
-
-#endif
+#define CLPS711X_SRAM_BASE CS6_PHYS_BASE
+#define CLPS711X_SRAM_SIZE (48 * 1024)
+#define CLPS711X_SDRAM0_BASE (0xc0000000)
+#define CLPS711X_SDRAM1_BASE (0xd0000000)
#if defined (CONFIG_ARCH_EDB7211)
-/*
- * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3)
- * and repeat across it. This is the mapping for it.
- *
- * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This
- * was cause for much consternation and headscratching. This should probably
- * be made a compile/run time kernel option.
- */
-#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE /* physical */
-
-#define EP7211_VIRT_EXTKBD (0xfd000000) /* virtual */
-
-
-/*
- * The CS8900A ethernet chip has its I/O registers wired to chip select 2
- * (nCS2). This is the mapping for it.
- *
- * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This
- * was cause for much consternation and headscratching. This should probably
- * be made a compile/run time kernel option.
- */
-#define EP7211_PHYS_CS8900A CS2_PHYS_BASE /* physical */
-
-#define EP7211_VIRT_CS8900A (0xfc000000) /* virtual */
-
-
-/*
- * The two flash banks are wired to chip selects 0 and 1. This is the mapping
- * for them.
- *
- * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
- * in jumpered boot mode.
- */
-#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE /* physical */
-#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE /* physical */
-
-#define EP7211_VIRT_FLASH1 (0xfa000000) /* virtual */
-#define EP7211_VIRT_FLASH2 (0xfb000000) /* virtual */
+/* The extra 8 lines of the keyboard matrix are wired to chip select 3 */
+#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE
#endif /* CONFIG_ARCH_EDB7211 */
-/*
- * Relevant bits in port D, which controls power to the various parts of
- * the LCD on the EDB7211.
- */
-#define EDB_PD1_LCD_DC_DC_EN (1<<1)
-#define EDB_PD2_LCDEN (1<<2)
-#define EDB_PD3_LCDBL (1<<3)
-
#endif
diff --git a/arch/arm/mach-clps711x/include/mach/irqs.h b/arch/arm/mach-clps711x/include/mach/irqs.h
deleted file mode 100644
index 14d215f8ca81..000000000000
--- a/arch/arm/mach-clps711x/include/mach/irqs.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * arch/arm/mach-clps711x/include/mach/irqs.h
- *
- * Copyright (C) 2000 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-/*
- * Interrupts from INTSR1
- */
-#define IRQ_CSINT 4
-#define IRQ_EINT1 5
-#define IRQ_EINT2 6
-#define IRQ_EINT3 7
-#define IRQ_TC1OI 8
-#define IRQ_TC2OI 9
-#define IRQ_RTCMI 10
-#define IRQ_TINT 11
-#define IRQ_UTXINT1 12
-#define IRQ_URXINT1 13
-#define IRQ_UMSINT 14
-#define IRQ_SSEOTI 15
-
-#define INT1_IRQS (0x0000fff0)
-
-/*
- * Interrupts from INTSR2
- */
-#define IRQ_KBDINT (16+0) /* bit 0 */
-#define IRQ_SS2RX (16+1) /* bit 1 */
-#define IRQ_SS2TX (16+2) /* bit 2 */
-#define IRQ_UTXINT2 (16+12) /* bit 12 */
-#define IRQ_URXINT2 (16+13) /* bit 13 */
-
-#define INT2_IRQS (0x30070000)
-
-#define NR_IRQS 30
diff --git a/arch/arm/mach-clps711x/include/mach/syspld.h b/arch/arm/mach-clps711x/include/mach/syspld.h
index f7f4c1201898..9a433155bf58 100644
--- a/arch/arm/mach-clps711x/include/mach/syspld.h
+++ b/arch/arm/mach-clps711x/include/mach/syspld.h
@@ -23,14 +23,9 @@
#define __ASM_ARCH_SYSPLD_H
#define SYSPLD_PHYS_BASE (0x10000000)
+#define SYSPLD_VIRT_BASE IO_ADDRESS(SYSPLD_PHYS_BASE)
-#ifndef __ASSEMBLY__
-#include <asm/types.h>
-
-#define SYSPLD_REG(type,off) (*(volatile type *)(SYSPLD_BASE + off))
-#else
-#define SYSPLD_REG(type,off) (off)
-#endif
+#define SYSPLD_REG(type, off) (*(volatile type *)(SYSPLD_VIRT_BASE + (off)))
#define PLD_INT SYSPLD_REG(u32, 0x000000)
#define PLD_INT_PENIRQ (1 << 5)
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
deleted file mode 100644
index b752b586fc2f..000000000000
--- a/arch/arm/mach-clps711x/p720t.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * linux/arch/arm/mach-clps711x/p720t.c
- *
- * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/leds.h>
-
-#include <mach/hardware.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/setup.h>
-#include <asm/sizes.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/syspld.h>
-
-#include <asm/hardware/clps7111.h>
-
-#include "common.h"
-
-/*
- * Map the P720T system PLD. It occupies two address spaces:
- * SYSPLD_PHYS_BASE and SYSPLD_PHYS_BASE + 0x00400000
- * We map both here.
- */
-static struct map_desc p720t_io_desc[] __initdata = {
- {
- .virtual = SYSPLD_VIRT_BASE,
- .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE),
- .length = SZ_1M,
- .type = MT_DEVICE
- }, {
- .virtual = 0xfe400000,
- .pfn = __phys_to_pfn(0x10400000),
- .length = SZ_1M,
- .type = MT_DEVICE
- }
-};
-
-static void __init
-fixup_p720t(struct tag *tag, char **cmdline, struct meminfo *mi)
-{
- /*
- * Our bootloader doesn't setup any tags (yet).
- */
- if (tag->hdr.tag != ATAG_CORE) {
- tag->hdr.tag = ATAG_CORE;
- tag->hdr.size = tag_size(tag_core);
- tag->u.core.flags = 0;
- tag->u.core.pagesize = PAGE_SIZE;
- tag->u.core.rootdev = 0x0100;
-
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_MEM;
- tag->hdr.size = tag_size(tag_mem32);
- tag->u.mem.size = 4096;
- tag->u.mem.start = PHYS_OFFSET;
-
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_NONE;
- tag->hdr.size = 0;
- }
-}
-
-static void __init p720t_map_io(void)
-{
- clps711x_map_io();
- iotable_init(p720t_io_desc, ARRAY_SIZE(p720t_io_desc));
-}
-
-static void __init p720t_init_early(void)
-{
- /*
- * Power down as much as possible in case we don't
- * have the drivers loaded.
- */
- PLD_LCDEN = 0;
- PLD_PWR &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
-
- PLD_KBD = 0;
- PLD_IO = 0;
- PLD_IRDA = 0;
- PLD_CODEC = 0;
- PLD_TCH = 0;
- PLD_SPI = 0;
- if (!IS_ENABLED(CONFIG_DEBUG_LL)) {
- PLD_COM2 = 0;
- PLD_COM1 = 0;
- }
-}
-
-/*
- * LED controled by CPLD
- */
-#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
-static void p720t_led_set(struct led_classdev *cdev,
- enum led_brightness b)
-{
- u8 reg = clps_readb(PDDR);
-
- if (b != LED_OFF)
- reg |= 0x1;
- else
- reg &= ~0x1;
-
- clps_writeb(reg, PDDR);
-}
-
-static enum led_brightness p720t_led_get(struct led_classdev *cdev)
-{
- u8 reg = clps_readb(PDDR);
-
- return (reg & 0x1) ? LED_FULL : LED_OFF;
-}
-
-static int __init p720t_leds_init(void)
-{
-
- struct led_classdev *cdev;
- int ret;
-
- if (!machine_is_p720t())
- return -ENODEV;
-
- cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
- if (!cdev)
- return -ENOMEM;
-
- cdev->name = "p720t:0";
- cdev->brightness_set = p720t_led_set;
- cdev->brightness_get = p720t_led_get;
- cdev->default_trigger = "heartbeat";
-
- ret = led_classdev_register(NULL, cdev);
- if (ret < 0) {
- kfree(cdev);
- return ret;
- }
-
- return 0;
-}
-
-/*
- * Since we may have triggers on any subsystem, defer registration
- * until after subsystem_init.
- */
-fs_initcall(p720t_leds_init);
-#endif
-
-MACHINE_START(P720T, "ARM-Prospector720T")
- /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
- .atag_offset = 0x100,
- .fixup = fixup_p720t,
- .init_early = p720t_init_early,
- .map_io = p720t_map_io,
- .init_irq = clps711x_init_irq,
- .timer = &clps711x_timer,
- .restart = clps711x_restart,
-MACHINE_END