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Diffstat (limited to 'arch/arm/mach-mx28/bus_freq.c')
-rw-r--r--arch/arm/mach-mx28/bus_freq.c72
1 files changed, 12 insertions, 60 deletions
diff --git a/arch/arm/mach-mx28/bus_freq.c b/arch/arm/mach-mx28/bus_freq.c
index a997eaa9a01f..1ea76cbdb4e3 100644
--- a/arch/arm/mach-mx28/bus_freq.c
+++ b/arch/arm/mach-mx28/bus_freq.c
@@ -46,24 +46,21 @@
#define CLKCTRL_BASE_ADDR IO_ADDRESS(CLKCTRL_PHYS_ADDR)
#define DIGCTRL_BASE_ADDR IO_ADDRESS(DIGCTL_PHYS_ADDR)
-#define BP_CLKCTRL_HBUS_ASM_ENABLE 20
-#define CLKCTRL_PLL_PWD_BIT 17
-#define CLKCTRL_PLL_BYPASS 0x1ff
#define BF(value, field) (((value) << BP_##field) & BM_##field)
struct profile profiles[] = {
{ 454736, 151580, 196360, 0, 1550000,
- 1450000, 355000, 3300000, 1750000, 0 },
+ 1450000, 355000, 3300000, 1750000, 24000, 0 },
{ 392727, 130910, 160000, 0, 1475000,
- 1375000, 225000, 3300000, 1750000, 0 },
+ 1375000, 225000, 3300000, 1750000, 24000, 0 },
{ 360000, 120000, 130910, 0, 1375000,
- 1275000, 200000, 3300000, 1750000, 0 },
+ 1275000, 200000, 3300000, 1750000, 24000, 0 },
{ 261818, 130910, 130910, 0, 1275000,
- 1175000, 173000, 3300000, 1750000, 0 },
+ 1175000, 173000, 3300000, 1750000, 24000, 0 },
{ 64000, 64000, 130910, 3, 1050000,
- 975000, 150000, 3300000, 1750000, 0 },
+ 975000, 150000, 3300000, 1750000, 24000, 0 },
{ 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0 },
+ 0, 0, 0, 0, 0, 0 },
};
static struct device *busfreq_dev;
@@ -82,58 +79,13 @@ int low_freq_used(void)
return 0;
}
-void hbus_auto_slow_mode_enable(void)
+int is_hclk_autoslow_ok(void)
{
- __raw_writel(BP_CLKCTRL_HBUS_ASM_ENABLE,
- CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS_SET);
-}
-EXPORT_SYMBOL(hbus_auto_slow_mode_enable);
-
-void hbus_auto_slow_mode_disable(void)
-{
- __raw_writel(BP_CLKCTRL_HBUS_ASM_ENABLE,
- CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS_CLR);
-}
-EXPORT_SYMBOL(hbus_auto_slow_mode_disable);
-
-int cpu_clk_set_pll_on(struct clk *clk, unsigned int freq)
-{
- struct cpufreq_freqs freqs;
-
- freqs.old = clk_get_rate(clk);
- freqs.cpu = 0;
- freqs.new = freq;
-
- if (freqs.old == 24000 && freqs.new > 24000) {
- /* turn pll on */
- __raw_writel(CLKCTRL_PLL_PWD_BIT, CLKCTRL_BASE_ADDR +
- HW_CLKCTRL_PLL0CTRL0_SET);
- udelay(10);
- } else if (freqs.old > 24000 && freqs.new == 24000)
- clkseq_setting = __raw_readl(CLKCTRL_BASE_ADDR +
- HW_CLKCTRL_CLKSEQ);
- return 0;
-}
-
-int cpu_clk_set_pll_off(struct clk *clk, unsigned int freq)
-{
- struct cpufreq_freqs freqs;
-
- freqs.old = clk_get_rate(clk);
- freqs.cpu = 0;
- freqs.new = freq;
-
- if (freqs.old > 24000 && freqs.new == 24000) {
- /* turn pll off */
- __raw_writel(CLKCTRL_PLL_PWD_BIT, CLKCTRL_BASE_ADDR +
- HW_CLKCTRL_PLL0CTRL0_CLR);
- __raw_writel(CLKCTRL_PLL_BYPASS, CLKCTRL_BASE_ADDR +
- HW_CLKCTRL_CLKSEQ);
- } else if (freqs.old == 24000 && freqs.new > 24000)
- __raw_writel(clkseq_setting, CLKCTRL_BASE_ADDR +
- HW_CLKCTRL_CLKSEQ);
-
- return 0;
+ if ((clk_get_usecount(usb_clk0) == 0)
+ && (clk_get_usecount(usb_clk1) == 0))
+ return 1;
+ else
+ return 0;
}
int timing_ctrl_rams(int ss)