diff options
Diffstat (limited to 'arch/arm/mach-mx5/cpu_op-mx53.c')
-rwxr-xr-x | arch/arm/mach-mx5/cpu_op-mx53.c | 41 |
1 files changed, 13 insertions, 28 deletions
diff --git a/arch/arm/mach-mx5/cpu_op-mx53.c b/arch/arm/mach-mx5/cpu_op-mx53.c index debe1bc411d4..8de811d1b19d 100755 --- a/arch/arm/mach-mx5/cpu_op-mx53.c +++ b/arch/arm/mach-mx5/cpu_op-mx53.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -49,7 +49,7 @@ static struct dvfs_op dvfs_core_setpoint_aec[] = { static struct dvfs_op dvfs_core_setpoint_ces_1_2G[] = { {33, 25, 33, 10, 10, 0x08}, /*1_2GHz*/ {30, 18, 33, 20, 10, 0x08}, /* 800MHz */ - {25, 8, 33, 20, 10, 0x08}, /* 400MHz */ + {25, 0, 33, 20, 10, 0x08}, /* 400MHz */ {28, 8, 33, 20, 30, 0x08}, /* 400MHZ, 133MHz */ {29, 0, 33, 20, 10, 0x08},}; /* 400MHZ, 50MHz. */ @@ -57,7 +57,7 @@ static struct dvfs_op dvfs_core_setpoint_ces_1_2G[] = { static struct dvfs_op dvfs_core_setpoint_ces[] = { {33, 25, 33, 10, 10, 0x08}, /*1GHz*/ {30, 18, 33, 20, 10, 0x08}, /* 800MHz */ - {25, 8, 33, 20, 10, 0x08}, /* 400MHz */ + {25, 0, 33, 20, 10, 0x08}, /* 400MHz */ {28, 8, 33, 20, 30, 0x08}, /* 400MHz, 133MHz */ {29, 0, 33, 20, 10, 0x08},}; /* 400MHz, 50MHz. */ @@ -71,7 +71,7 @@ static struct cpu_op cpu_op_aec[] = { .mfd = 2, .mfn = 1, .cpu_podf = 0, - .cpu_voltage = 1050000,}, + .cpu_voltage = 1100000,}, }; /* working point for consumer 1G*/ @@ -84,7 +84,7 @@ static struct cpu_op cpu_op_ces[] = { .mfd = 11, .mfn = 5, .cpu_podf = 0, - .cpu_voltage = 1200000,}, + .cpu_voltage = 1250000,}, { .pll_rate = 800000000, .cpu_rate = 800000000, @@ -93,17 +93,16 @@ static struct cpu_op cpu_op_ces[] = { .mfd = 2, .mfn = 1, .cpu_podf = 0, - .cpu_voltage = 1050000,}, + .cpu_voltage = 1100000,}, { .pll_rate = 800000000, .cpu_rate = 400000000, - .cpu_podf = 1, - .cpu_voltage = 950000,}, - { - .pll_rate = 800000000, - .cpu_rate = 160000000, - .cpu_podf = 4, - .cpu_voltage = 900000,}, + .pdf = 0, + .mfi = 8, + .mfd = 2, + .mfn = 1, + .cpu_podf = 1, + .cpu_voltage = 950000,}, }; /* working point for consumer 1.2G*/ @@ -118,15 +117,6 @@ static struct cpu_op cpu_op_ces_1_2g[] = { .cpu_podf = 0, .cpu_voltage = 1300000,}, { - .pll_rate = 1000000000, - .cpu_rate = 1000000000, - .pdf = 0, - .mfi = 10, - .mfd = 11, - .mfn = 5, - .cpu_podf = 0, - .cpu_voltage = 1200000,}, - { .pll_rate = 800000000, .cpu_rate = 800000000, .pdf = 0, @@ -134,17 +124,12 @@ static struct cpu_op cpu_op_ces_1_2g[] = { .mfd = 2, .mfn = 1, .cpu_podf = 0, - .cpu_voltage = 1050000,}, + .cpu_voltage = 1100000,}, { .pll_rate = 800000000, .cpu_rate = 400000000, .cpu_podf = 1, .cpu_voltage = 950000,}, - { - .pll_rate = 800000000, - .cpu_rate = 160000000, - .cpu_podf = 4, - .cpu_voltage = 900000,}, }; static struct dvfs_op *mx53_get_dvfs_core_table(int *wp) |