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-rw-r--r--arch/arm/mach-mx51/Kconfig13
-rw-r--r--arch/arm/mach-mx51/clock.c2
-rw-r--r--arch/arm/mach-mx51/cpu.c12
-rw-r--r--arch/arm/mach-mx51/devices.c7
-rw-r--r--arch/arm/mach-mx51/mm.c7
-rw-r--r--arch/arm/mach-mx51/pm.c21
-rw-r--r--arch/arm/mach-mx51/system.c14
7 files changed, 27 insertions, 49 deletions
diff --git a/arch/arm/mach-mx51/Kconfig b/arch/arm/mach-mx51/Kconfig
index 769d09f25e81..cfc07d6955da 100644
--- a/arch/arm/mach-mx51/Kconfig
+++ b/arch/arm/mach-mx51/Kconfig
@@ -83,22 +83,11 @@ config ARCH_MXC_HAS_NFC_V3_2
This selects the Freescale MXC Nand Flash Controller Hardware Version 3.2
If unsure, say N.
-menu "SDMA options"
- depends on MXC_SDMA_API
-
config SDMA_IRAM
bool "Use Internal RAM for SDMA transfer"
- default n
+ depends on MXC_SDMA_API
help
Support Internal RAM as SDMA buffer or control structures
-
-config SDMA_IRAM_SIZE
- hex "Reserved bytes of IRAM for SDMA (0x800-0x1000)"
- range 0x800 0x1000
- depends on SDMA_IRAM
- default "0x1000"
- help
- Set the size of IRAM for SDMA. It must be a multiple of 512bytes.
endmenu
menu "I2C Options"
diff --git a/arch/arm/mach-mx51/clock.c b/arch/arm/mach-mx51/clock.c
index 1d11ecb017ec..e5ded48ec6e9 100644
--- a/arch/arm/mach-mx51/clock.c
+++ b/arch/arm/mach-mx51/clock.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
diff --git a/arch/arm/mach-mx51/cpu.c b/arch/arm/mach-mx51/cpu.c
index f4b404ad777f..2f8f216d5533 100644
--- a/arch/arm/mach-mx51/cpu.c
+++ b/arch/arm/mach-mx51/cpu.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -22,8 +22,9 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/iram_alloc.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include "crm_regs.h"
/*!
@@ -39,6 +40,13 @@ static int __init post_cpu_init(void)
{
void __iomem *base;
unsigned int reg;
+ int iram_size = IRAM_SIZE;
+
+#if defined(CONFIG_MXC_SECURITY_SCC) || defined(CONFIG_MXC_SECURITY_SCC_MODULE)
+ if (cpu_is_mx51())
+ iram_size -= SCC_RAM_SIZE;
+#endif
+ iram_init(IRAM_BASE_ADDR, iram_size);
/* Set ALP bits to 000. Set ALP_EN bit in Arm Memory Controller reg. */
reg = 0x8;
diff --git a/arch/arm/mach-mx51/devices.c b/arch/arm/mach-mx51/devices.c
index d45a0d2680a9..489d885ff759 100644
--- a/arch/arm/mach-mx51/devices.c
+++ b/arch/arm/mach-mx51/devices.c
@@ -24,6 +24,7 @@
#include <linux/uio_driver.h>
#include <linux/mxc_scc2_driver.h>
#include <linux/pwm_backlight.h>
+#include <linux/iram_alloc.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <mach/spba.h>
@@ -343,8 +344,6 @@ static inline void mxc_init_ipu(void)
#if defined(CONFIG_MXC_VPU) || defined(CONFIG_MXC_VPU_MODULE)
static struct resource vpu_resources[] = {
[0] = {
- .start = VPU_IRAM_BASE_ADDR,
- .end = VPU_IRAM_BASE_ADDR + VPU_IRAM_SIZE,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -367,6 +366,10 @@ static struct platform_device mxcvpu_device = {
static inline void mxc_init_vpu(void)
{
+ unsigned long addr;
+ iram_alloc(VPU_IRAM_SIZE, &addr);
+ vpu_resources[0].start = addr;
+ vpu_resources[0].end = addr + VPU_IRAM_SIZE - 1;
if (platform_device_register(&mxcvpu_device) < 0)
printk(KERN_ERR "Error: Registering the VPU.\n");
}
diff --git a/arch/arm/mach-mx51/mm.c b/arch/arm/mach-mx51/mm.c
index 5d1695b39453..8b3b450b61a5 100644
--- a/arch/arm/mach-mx51/mm.c
+++ b/arch/arm/mach-mx51/mm.c
@@ -30,11 +30,6 @@
*/
static struct map_desc mx51_io_desc[] __initdata = {
{
- .virtual = IRAM_BASE_ADDR_VIRT,
- .pfn = __phys_to_pfn(IRAM_BASE_ADDR),
- .length = IRAM_SIZE,
- .type = MT_DEVICE},
- {
.virtual = DEBUG_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(DEBUG_BASE_ADDR),
.length = DEBUG_SIZE,
@@ -79,6 +74,6 @@ void __init mx51_map_io(void)
else
tzic_addr = TZIC_BASE_ADDR;
- mx51_io_desc[2].pfn = __phys_to_pfn(tzic_addr);
+ mx51_io_desc[1].pfn = __phys_to_pfn(tzic_addr);
iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
}
diff --git a/arch/arm/mach-mx51/pm.c b/arch/arm/mach-mx51/pm.c
index b60a2532fca3..86fc29a708a7 100644
--- a/arch/arm/mach-mx51/pm.c
+++ b/arch/arm/mach-mx51/pm.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -20,6 +20,7 @@
#include <linux/suspend.h>
#include <linux/proc_fs.h>
#include <linux/cpufreq.h>
+#include <linux/iram_alloc.h>
#include <asm/cacheflush.h>
#include <asm/tlb.h>
#include <asm/mach/map.h>
@@ -79,16 +80,7 @@ static int mx51_suspend_enter(suspend_state_t state)
__raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR);
__raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
} else {
- if ((mxc_cpu_is_rev(CHIP_REV_2_0)) < 0) {
- /* do cpu_idle_workaround */
- u32 l2_iram_addr = IDLE_IRAM_BASE_ADDR;
- if (!iram_ready)
- return 0;
- if (l2_iram_addr > 0x1FFE8000)
- cpu_cortexa8_do_idle(IO_ADDRESS(l2_iram_addr));
- } else {
cpu_do_idle();
- }
}
clk_disable(gpc_dvfs_clk);
@@ -178,6 +170,7 @@ static struct platform_driver mx51_pm_driver = {
static int __init pm_init(void)
{
int cpu_wp_nr;
+ unsigned long iram_paddr;
pr_info("Static Power Management for Freescale i.MX51\n");
if (platform_driver_register(&mx51_pm_driver) != 0) {
@@ -186,12 +179,12 @@ static int __init pm_init(void)
}
suspend_set_ops(&mx51_suspend_ops);
/* Move suspend routine into iRAM */
- suspend_iram_base = IO_ADDRESS(SUSPEND_IRAM_BASE_ADDR);
- memcpy(suspend_iram_base, cpu_do_suspend_workaround, SZ_4K);
+ iram_alloc(SZ_4K, &iram_paddr);
/* Need to remap the area here since we want the memory region
to be executable. */
- suspend_iram_base = __arm_ioremap(SUSPEND_IRAM_BASE_ADDR, SZ_4K,
- MT_HIGH_VECTORS);
+ suspend_iram_base = __arm_ioremap(iram_paddr, SZ_4K,
+ MT_HIGH_VECTORS);
+ memcpy(suspend_iram_base, cpu_do_suspend_workaround, SZ_4K);
suspend_in_iram = (void *)suspend_iram_base;
cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr);
diff --git a/arch/arm/mach-mx51/system.c b/arch/arm/mach-mx51/system.c
index 0e1ae5476bd4..0d6e7ef015ce 100644
--- a/arch/arm/mach-mx51/system.c
+++ b/arch/arm/mach-mx51/system.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -155,17 +155,7 @@ void arch_idle(void)
/* gpc clock is needed for SRPG */
clk_enable(gpc_dvfs_clk);
mxc_cpu_lp_set(arch_idle_mode);
- if ((mxc_cpu_is_rev(CHIP_REV_2_0)) < 0) {
- u32 l2_iram_addr = IDLE_IRAM_BASE_ADDR;
-
- if (!iram_ready)
- return;
-
- if (l2_iram_addr > 0x1FFE8000)
- cpu_cortexa8_do_idle(IO_ADDRESS(l2_iram_addr));
- } else {
- cpu_do_idle();
- }
+ cpu_do_idle();
clk_disable(gpc_dvfs_clk);
}
}