diff options
Diffstat (limited to 'arch/arm/mach-mx6/pads-mx6_sp.h')
| -rw-r--r-- | arch/arm/mach-mx6/pads-mx6_sp.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/pads-mx6_sp.h b/arch/arm/mach-mx6/pads-mx6_sp.h index 7870b7d3c982..f06a89901cbb 100644 --- a/arch/arm/mach-mx6/pads-mx6_sp.h +++ b/arch/arm/mach-mx6/pads-mx6_sp.h @@ -23,6 +23,16 @@ #define MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ #define MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ #define MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ +#define MX6Q_PAD_SD4_CLK__USDHC4_CLK MX6Q_PAD_SD4_CLK__USDHC4_CLK_50MHZ +#define MX6Q_PAD_SD4_CMD__USDHC4_CMD MX6Q_PAD_SD4_CMD__USDHC4_CMD_50MHZ +#define MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 MX6Q_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ +#define MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 MX6Q_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ +#define MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 MX6Q_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ +#define MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 MX6Q_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ +#define MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 MX6Q_PAD_SD4_DAT4__USDHC4_DAT4_50MHZ +#define MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 MX6Q_PAD_SD4_DAT5__USDHC4_DAT5_50MHZ +#define MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 MX6Q_PAD_SD4_DAT6__USDHC4_DAT6_50MHZ +#define MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 MX6Q_PAD_SD4_DAT7__USDHC4_DAT7_50MHZ #define MX6DL_USDHC_PAD_CTRL_22KPU_40OHM_50MHZ MX6Q_USDHC_PAD_CTRL_22KPU_40OHM_50MHZ #define MX6DL_USDHC_PAD_CTRL_50MHZ MX6DL_USDHC_PAD_CTRL @@ -32,6 +42,16 @@ #define MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ #define MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ #define MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ +#define MX6DL_PAD_SD4_CLK__USDHC4_CLK MX6DL_PAD_SD4_CLK__USDHC4_CLK_50MHZ +#define MX6DL_PAD_SD4_CMD__USDHC4_CMD MX6DL_PAD_SD4_CMD__USDHC4_CMD_50MHZ +#define MX6DL_PAD_SD4_DAT0__USDHC4_DAT0 MX6DL_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ +#define MX6DL_PAD_SD4_DAT1__USDHC4_DAT1 MX6DL_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ +#define MX6DL_PAD_SD4_DAT2__USDHC4_DAT2 MX6DL_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ +#define MX6DL_PAD_SD4_DAT3__USDHC4_DAT3 MX6DL_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ +#define MX6DL_PAD_SD4_DAT4__USDHC4_DAT4 MX6DL_PAD_SD4_DAT4__USDHC4_DAT4_50MHZ +#define MX6DL_PAD_SD4_DAT5__USDHC4_DAT5 MX6DL_PAD_SD4_DAT5__USDHC4_DAT5_50MHZ +#define MX6DL_PAD_SD4_DAT6__USDHC4_DAT6 MX6DL_PAD_SD4_DAT6__USDHC4_DAT6_50MHZ +#define MX6DL_PAD_SD4_DAT7__USDHC4_DAT7 MX6DL_PAD_SD4_DAT7__USDHC4_DAT7_50MHZ #define NP(id, pin, pad_ctl) \ NEW_PAD_CTRL(MX6PAD(SD##id##_##pin##__USDHC##id##_##pin), MX6(pad_ctl)) @@ -44,6 +64,13 @@ NP(id, DAT2, pad_ctl), \ NP(id, DAT3, pad_ctl) +#define SD_PINS8(id, pad_ctl) \ + SD_PINS(id, pad_ctl), \ + NP(id, DAT4, pad_ctl), \ + NP(id, DAT5, pad_ctl), \ + NP(id, DAT6, pad_ctl), \ + NP(id, DAT7, pad_ctl) + /* Pull/keeper disabled, or with PAD_CTL_PKE to enable */ #define WEAK (PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_240ohm | PAD_CTL_SPEED_LOW) #define WEAK_IRQ (WEAK | PAD_CTL_PKE | PAD_CTL_HYS) @@ -120,6 +147,10 @@ static iomux_v3_cfg_t MX6NAME(common_pads)[] = { MX6PAD(EIM_D27__UART2_RXD), MX6PAD(EIM_D26__UART2_TXD), + /* UART4 */ + MX6PAD(KEY_COL0__UART4_TXD), + MX6PAD(KEY_ROW0__UART4_RXD), + /* USB hub reset */ NEW_PAD_CTRL(MX6PAD(GPIO_17__GPIO_7_12), WEAK), /* USB Hub Reset */ @@ -163,6 +194,10 @@ static iomux_v3_cfg_t MX6NAME(common_pads)[] = { MX6PAD(SD2_DAT2__USDHC2_DAT2), MX6PAD(SD2_DAT3__USDHC2_DAT3), + /* USDHC4 (eMMC) */ + SD_PINS8(4, USDHC_PAD_CTRL_50MHZ), + MX6PAD(NANDF_D7__GPIO_2_7), /* eMMC reset */ + /* GPIO connector (J14) */ NEW_PAD_CTRL(MX6PAD(GPIO_2__GPIO_1_2), WEAK), /* J14 pin1 - GLED */ NEW_PAD_CTRL(MX6PAD(GPIO_3__GPIO_1_3), WEAK), /* J14 pin3 - RLED */ |