diff options
Diffstat (limited to 'arch/arm/mach-omap1')
71 files changed, 6425 insertions, 2358 deletions
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 55ecc01ea206..8d2f2daba0c0 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -1,3 +1,7 @@ +if ARCH_OMAP1 + +menu "TI OMAP1 specific features" + comment "OMAP Core Type" depends on ARCH_OMAP1 @@ -11,6 +15,7 @@ config ARCH_OMAP850 depends on ARCH_OMAP1 bool "OMAP850 Based System" select CPU_ARM926T + select ARCH_OMAP_OTG config ARCH_OMAP15XX depends on ARCH_OMAP1 @@ -56,6 +61,12 @@ config MACH_OMAP_HTCWIZARD help HTC Wizard smartphone support (AKA QTEK 9100, ...) +config MACH_HERALD + bool "HTC Herald" + depends on ARCH_OMAP850 + help + HTC Herald smartphone support (AKA T-Mobile Wing, ...) + config MACH_OMAP_OSK bool "TI OSK Support" depends on ARCH_OMAP1 && ARCH_OMAP16XX @@ -117,7 +128,7 @@ config MACH_OMAP_PALMTT help Support for the Palm Tungsten|T PDA. To boot the kernel, you'll need a PalmOS compatible bootloader (Garux); check out - http://www.hackndev.com/palm/tt/ for more information. + http://garux.sourceforge.net/ for more information. Say Y here if you have this PDA model, say N otherwise. config MACH_SX1 @@ -141,6 +152,7 @@ config MACH_NOKIA770 config MACH_AMS_DELTA bool "Amstrad E3 (Delta)" depends on ARCH_OMAP1 && ARCH_OMAP15XX + select FIQ help Support for the Amstrad E3 (codename Delta) videophone. Say Y here if you have such a device. @@ -207,6 +219,12 @@ config OMAP_ARM_120MHZ help Enable 120MHz clock for OMAP CPU. If unsure, say N. +config OMAP_ARM_96MHZ + bool "OMAP ARM 96 MHz CPU" + depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) + help + Enable 96MHz clock for OMAP CPU. If unsure, say N. + config OMAP_ARM_60MHZ bool "OMAP ARM 60 MHz CPU" depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) @@ -220,3 +238,6 @@ config OMAP_ARM_30MHZ help Enable 30MHz clock for OMAP CPU. If unsure, say N. +endmenu + +endif diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 6867cd3ad0b4..6ee19504845f 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -3,7 +3,8 @@ # # Common support -obj-y := io.o id.o sram.o clock.o irq.o mux.o serial.o devices.o +obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o dma.o +obj-y += clock.o clock_data.o opp_data.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o @@ -11,14 +12,20 @@ obj-$(CONFIG_OMAP_MPU_TIMER) += time.o obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o # Power Management -obj-$(CONFIG_PM) += pm.o sleep.o +obj-$(CONFIG_PM) += pm.o sleep.o pm_bus.o # DSP obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o mailbox_mach-objs := mailbox.o +i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o +obj-y += $(i2c-omap-m) $(i2c-omap-y) + led-y := leds.o +usb-fs-$(CONFIG_USB) := usb.o +obj-y += $(usb-fs-m) $(usb-fs-y) + # Specific board support obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o board-h2-mmc.o obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o @@ -32,14 +39,22 @@ obj-$(CONFIG_MACH_OMAP_PALMTE) += board-palmte.o obj-$(CONFIG_MACH_OMAP_PALMZ71) += board-palmz71.o obj-$(CONFIG_MACH_OMAP_PALMTT) += board-palmtt.o obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o -obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o +obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o ams-delta-fiq.o \ + ams-delta-fiq-handler.o obj-$(CONFIG_MACH_SX1) += board-sx1.o board-sx1-mmc.o +obj-$(CONFIG_MACH_HERALD) += board-htcherald.o ifeq ($(CONFIG_ARCH_OMAP15XX),y) # Innovator-1510 FPGA obj-$(CONFIG_MACH_OMAP_INNOVATOR) += fpga.o endif +# GPIO +obj-$(CONFIG_ARCH_OMAP730) += gpio7xx.o +obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o +obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o +obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o + # LEDs support led-$(CONFIG_MACH_OMAP_H2) += leds-h2p2-debug.o led-$(CONFIG_MACH_OMAP_H3) += leds-h2p2-debug.o @@ -47,3 +62,7 @@ led-$(CONFIG_MACH_OMAP_INNOVATOR) += leds-innovator.o led-$(CONFIG_MACH_OMAP_PERSEUS2) += leds-h2p2-debug.o led-$(CONFIG_MACH_OMAP_OSK) += leds-osk.o obj-$(CONFIG_LEDS) += $(led-y) + +ifneq ($(CONFIG_FB_OMAP),) +obj-y += lcd_dma.o +endif diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S new file mode 100644 index 000000000000..927d5a181760 --- /dev/null +++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S @@ -0,0 +1,278 @@ +/* + * linux/arch/arm/mach-omap1/ams-delta-fiq-handler.S + * + * Based on linux/arch/arm/lib/floppydma.S + * Renamed and modified to work with 2.6 kernel by Matt Callow + * Copyright (C) 1995, 1996 Russell King + * Copyright (C) 2004 Pete Trapps + * Copyright (C) 2006 Matt Callow + * Copyright (C) 2010 Janusz Krzysztofik + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + */ + +#include <linux/linkage.h> + +#include <plat/io.h> +#include <plat/board-ams-delta.h> + +#include <mach/ams-delta-fiq.h> + +/* + * GPIO related definitions, copied from arch/arm/plat-omap/gpio.c. + * Unfortunately, those were not placed in a separate header file. + */ +#define OMAP1510_GPIO_BASE 0xFFFCE000 +#define OMAP1510_GPIO_DATA_INPUT 0x00 +#define OMAP1510_GPIO_DATA_OUTPUT 0x04 +#define OMAP1510_GPIO_DIR_CONTROL 0x08 +#define OMAP1510_GPIO_INT_CONTROL 0x0c +#define OMAP1510_GPIO_INT_MASK 0x10 +#define OMAP1510_GPIO_INT_STATUS 0x14 +#define OMAP1510_GPIO_PIN_CONTROL 0x18 + +/* GPIO register bitmasks */ +#define KEYBRD_DATA_MASK (0x1 << AMS_DELTA_GPIO_PIN_KEYBRD_DATA) +#define KEYBRD_CLK_MASK (0x1 << AMS_DELTA_GPIO_PIN_KEYBRD_CLK) +#define MODEM_IRQ_MASK (0x1 << AMS_DELTA_GPIO_PIN_MODEM_IRQ) +#define HOOK_SWITCH_MASK (0x1 << AMS_DELTA_GPIO_PIN_HOOK_SWITCH) +#define OTHERS_MASK (MODEM_IRQ_MASK | HOOK_SWITCH_MASK) + +/* IRQ handler register bitmasks */ +#define DEFERRED_FIQ_MASK (0x1 << (INT_DEFERRED_FIQ % IH2_BASE)) +#define GPIO_BANK1_MASK (0x1 << INT_GPIO_BANK1) + +/* Driver buffer byte offsets */ +#define BUF_MASK (FIQ_MASK * 4) +#define BUF_STATE (FIQ_STATE * 4) +#define BUF_KEYS_CNT (FIQ_KEYS_CNT * 4) +#define BUF_TAIL_OFFSET (FIQ_TAIL_OFFSET * 4) +#define BUF_HEAD_OFFSET (FIQ_HEAD_OFFSET * 4) +#define BUF_BUF_LEN (FIQ_BUF_LEN * 4) +#define BUF_KEY (FIQ_KEY * 4) +#define BUF_MISSED_KEYS (FIQ_MISSED_KEYS * 4) +#define BUF_BUFFER_START (FIQ_BUFFER_START * 4) +#define BUF_GPIO_INT_MASK (FIQ_GPIO_INT_MASK * 4) +#define BUF_KEYS_HICNT (FIQ_KEYS_HICNT * 4) +#define BUF_IRQ_PEND (FIQ_IRQ_PEND * 4) +#define BUF_SIR_CODE_L1 (FIQ_SIR_CODE_L1 * 4) +#define BUF_SIR_CODE_L2 (IRQ_SIR_CODE_L2 * 4) +#define BUF_CNT_INT_00 (FIQ_CNT_INT_00 * 4) +#define BUF_CNT_INT_KEY (FIQ_CNT_INT_KEY * 4) +#define BUF_CNT_INT_MDM (FIQ_CNT_INT_MDM * 4) +#define BUF_CNT_INT_03 (FIQ_CNT_INT_03 * 4) +#define BUF_CNT_INT_HSW (FIQ_CNT_INT_HSW * 4) +#define BUF_CNT_INT_05 (FIQ_CNT_INT_05 * 4) +#define BUF_CNT_INT_06 (FIQ_CNT_INT_06 * 4) +#define BUF_CNT_INT_07 (FIQ_CNT_INT_07 * 4) +#define BUF_CNT_INT_08 (FIQ_CNT_INT_08 * 4) +#define BUF_CNT_INT_09 (FIQ_CNT_INT_09 * 4) +#define BUF_CNT_INT_10 (FIQ_CNT_INT_10 * 4) +#define BUF_CNT_INT_11 (FIQ_CNT_INT_11 * 4) +#define BUF_CNT_INT_12 (FIQ_CNT_INT_12 * 4) +#define BUF_CNT_INT_13 (FIQ_CNT_INT_13 * 4) +#define BUF_CNT_INT_14 (FIQ_CNT_INT_14 * 4) +#define BUF_CNT_INT_15 (FIQ_CNT_INT_15 * 4) +#define BUF_CIRC_BUFF (FIQ_CIRC_BUFF * 4) + + +/* + * Register useage + * r8 - temporary + * r9 - the driver buffer + * r10 - temporary + * r11 - interrupts mask + * r12 - base pointers + * r13 - interrupts status + */ + + .text + + .global qwerty_fiqin_end + +ENTRY(qwerty_fiqin_start) + @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ + @ FIQ intrrupt handler + ldr r12, omap_ih1_base @ set pointer to level1 handler + + ldr r11, [r12, #IRQ_MIR_REG_OFFSET] @ fetch interrupts mask + + ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status + bics r13, r13, r11 @ clear masked - any left? + beq exit @ none - spurious FIQ? exit + + ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number + + mov r8, #2 @ reset FIQ agreement + str r8, [r12, #IRQ_CONTROL_REG_OFFSET] + + cmp r10, #INT_GPIO_BANK1 @ is it GPIO bank interrupt? + beq gpio @ yes - process it + + mov r8, #1 + orr r8, r11, r8, lsl r10 @ mask spurious interrupt + str r8, [r12, #IRQ_MIR_REG_OFFSET] +exit: + subs pc, lr, #4 @ return from FIQ + @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ + + + @@@@@@@@@@@@@@@@@@@@@@@@@@@ +gpio: @ GPIO bank interrupt handler + ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank + + ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask +restart: + ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits + bics r13, r13, r11 @ clear masked - any left? + beq exit @ no - spurious interrupt? exit + + orr r11, r11, r13 @ mask all requested interrupts + str r11, [r12, #OMAP1510_GPIO_INT_MASK] + + ands r10, r13, #KEYBRD_CLK_MASK @ extract keyboard status - set? + beq hksw @ no - try next source + + + @@@@@@@@@@@@@@@@@@@@@@ + @ Keyboard clock FIQ mode interrupt handler + @ r10 now contains KEYBRD_CLK_MASK, use it + str r10, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack the interrupt + bic r11, r11, r10 @ unmask it + str r11, [r12, #OMAP1510_GPIO_INT_MASK] + + @ Process keyboard data + ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT] @ fetch GPIO input + + ldr r10, [r9, #BUF_STATE] @ fetch kbd interface state + cmp r10, #0 @ are we expecting start bit? + bne data @ no - go to data processing + + ands r8, r8, #KEYBRD_DATA_MASK @ check start bit - detected? + beq hksw @ no - try next source + + @ r8 contains KEYBRD_DATA_MASK, use it + str r8, [r9, #BUF_STATE] @ enter data processing state + @ r10 already contains 0, reuse it + str r10, [r9, #BUF_KEY] @ clear keycode + mov r10, #2 @ reset input bit mask + str r10, [r9, #BUF_MASK] + + @ Mask other GPIO line interrupts till key done + str r11, [r9, #BUF_GPIO_INT_MASK] @ save mask for later restore + mvn r11, #KEYBRD_CLK_MASK @ prepare all except kbd mask + str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ store into the mask register + + b restart @ restart + +data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask + + @ r8 still contains GPIO input bits + ands r8, r8, #KEYBRD_DATA_MASK @ is keyboard data line low? + ldreq r8, [r9, #BUF_KEY] @ yes - fetch collected so far, + orreq r8, r8, r10 @ set 1 at current mask position + streq r8, [r9, #BUF_KEY] @ and save back + + mov r10, r10, lsl #1 @ shift mask left + bics r10, r10, #0x800 @ have we got all the bits? + strne r10, [r9, #BUF_MASK] @ not yet - store the mask + bne restart @ and restart + + @ r10 already contains 0, reuse it + str r10, [r9, #BUF_STATE] @ reset state to start + + @ Key done - restore interrupt mask + ldr r10, [r9, #BUF_GPIO_INT_MASK] @ fetch saved mask + and r11, r11, r10 @ unmask all saved as unmasked + str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ restore into the mask register + + @ Try appending the keycode to the circular buffer + ldr r10, [r9, #BUF_KEYS_CNT] @ get saved keystrokes count + ldr r8, [r9, #BUF_BUF_LEN] @ get buffer size + cmp r10, r8 @ is buffer full? + beq hksw @ yes - key lost, next source + + add r10, r10, #1 @ incremet keystrokes counter + str r10, [r9, #BUF_KEYS_CNT] + + ldr r10, [r9, #BUF_TAIL_OFFSET] @ get buffer tail offset + @ r8 already contains buffer size + cmp r10, r8 @ end of buffer? + moveq r10, #0 @ yes - rewind to buffer start + + ldr r12, [r9, #BUF_BUFFER_START] @ get buffer start address + add r12, r12, r10, LSL #2 @ calculate buffer tail address + ldr r8, [r9, #BUF_KEY] @ get last keycode + str r8, [r12] @ append it to the buffer tail + + add r10, r10, #1 @ increment buffer tail offset + str r10, [r9, #BUF_TAIL_OFFSET] + + ldr r10, [r9, #BUF_CNT_INT_KEY] @ increment interrupts counter + add r10, r10, #1 + str r10, [r9, #BUF_CNT_INT_KEY] + @@@@@@@@@@@@@@@@@@@@@@@@ + + +hksw: @Is hook switch interrupt requested? + tst r13, #HOOK_SWITCH_MASK @ is hook switch status bit set? + beq mdm @ no - try next source + + + @@@@@@@@@@@@@@@@@@@@@@@@ + @ Hook switch interrupt FIQ mode simple handler + + @ Don't toggle active edge, the switch always bounces + + @ Increment hook switch interrupt counter + ldr r10, [r9, #BUF_CNT_INT_HSW] + add r10, r10, #1 + str r10, [r9, #BUF_CNT_INT_HSW] + @@@@@@@@@@@@@@@@@@@@@@@@ + + +mdm: @Is it a modem interrupt? + tst r13, #MODEM_IRQ_MASK @ is modem status bit set? + beq irq @ no - check for next interrupt + + + @@@@@@@@@@@@@@@@@@@@@@@@ + @ Modem FIQ mode interrupt handler stub + + @ Increment modem interrupt counter + ldr r10, [r9, #BUF_CNT_INT_MDM] + add r10, r10, #1 + str r10, [r9, #BUF_CNT_INT_MDM] + @@@@@@@@@@@@@@@@@@@@@@@@ + + +irq: @ Place deferred_fiq interrupt request + ldr r12, deferred_fiq_ih_base @ set pointer to IRQ handler + mov r10, #DEFERRED_FIQ_MASK @ set deferred_fiq bit + str r10, [r12, #IRQ_ISR_REG_OFFSET] @ place it in the ISR register + + ldr r12, omap1510_gpio_base @ set pointer back to GPIO bank + b restart @ check for next GPIO interrupt + @@@@@@@@@@@@@@@@@@@@@@@@@@@ + + +/* + * Virtual addresses for IO + */ +omap_ih1_base: + .word OMAP1_IO_ADDRESS(OMAP_IH1_BASE) +deferred_fiq_ih_base: + .word OMAP1_IO_ADDRESS(DEFERRED_FIQ_IH_BASE) +omap1510_gpio_base: + .word OMAP1_IO_ADDRESS(OMAP1510_GPIO_BASE) +qwerty_fiqin_end: + +/* + * Check the size of the FIQ, + * it cannot go beyond 0xffff0200, and is copied to 0xffff001c + */ +.if (qwerty_fiqin_end - qwerty_fiqin_start) > (0x200 - 0x1c) + .err +.endif diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c new file mode 100644 index 000000000000..6c994e2d8879 --- /dev/null +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -0,0 +1,155 @@ +/* + * Amstrad E3 FIQ handling + * + * Copyright (C) 2009 Janusz Krzysztofik + * Copyright (c) 2006 Matt Callow + * Copyright (c) 2004 Amstrad Plc + * Copyright (C) 2001 RidgeRun, Inc. + * + * Parts of this code are taken from linux/arch/arm/mach-omap/irq.c + * in the MontaVista 2.4 kernel (and the Amstrad changes therein) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ +#include <linux/gpio.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/module.h> +#include <linux/io.h> + +#include <plat/board-ams-delta.h> + +#include <asm/fiq.h> +#include <mach/ams-delta-fiq.h> + +static struct fiq_handler fh = { + .name = "ams-delta-fiq" +}; + +/* + * This buffer is shared between FIQ and IRQ contexts. + * The FIQ and IRQ isrs can both read and write it. + * It is structured as a header section several 32bit slots, + * followed by the circular buffer where the FIQ isr stores + * keystrokes received from the qwerty keyboard. + * See ams-delta-fiq.h for details of offsets. + */ +unsigned int fiq_buffer[1024]; +EXPORT_SYMBOL(fiq_buffer); + +static unsigned int irq_counter[16]; + +static irqreturn_t deferred_fiq(int irq, void *dev_id) +{ + struct irq_desc *irq_desc; + struct irq_chip *irq_chip = NULL; + int gpio, irq_num, fiq_count; + + irq_desc = irq_to_desc(IH_GPIO_BASE); + if (irq_desc) + irq_chip = irq_desc->chip; + + /* + * For each handled GPIO interrupt, keep calling its interrupt handler + * until the IRQ counter catches the FIQ incremented interrupt counter. + */ + for (gpio = AMS_DELTA_GPIO_PIN_KEYBRD_CLK; + gpio <= AMS_DELTA_GPIO_PIN_HOOK_SWITCH; gpio++) { + irq_num = gpio_to_irq(gpio); + fiq_count = fiq_buffer[FIQ_CNT_INT_00 + gpio]; + + while (irq_counter[gpio] < fiq_count) { + if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) { + /* + * It looks like handle_edge_irq() that + * OMAP GPIO edge interrupts default to, + * expects interrupt already unmasked. + */ + if (irq_chip && irq_chip->unmask) + irq_chip->unmask(irq_num); + } + generic_handle_irq(irq_num); + + irq_counter[gpio]++; + } + } + return IRQ_HANDLED; +} + +void __init ams_delta_init_fiq(void) +{ + void *fiqhandler_start; + unsigned int fiqhandler_length; + struct pt_regs FIQ_regs; + unsigned long val, offset; + int i, retval; + + fiqhandler_start = &qwerty_fiqin_start; + fiqhandler_length = &qwerty_fiqin_end - &qwerty_fiqin_start; + pr_info("Installing fiq handler from %p, length 0x%x\n", + fiqhandler_start, fiqhandler_length); + + retval = claim_fiq(&fh); + if (retval) { + pr_err("ams_delta_init_fiq(): couldn't claim FIQ, ret=%d\n", + retval); + return; + } + + retval = request_irq(INT_DEFERRED_FIQ, deferred_fiq, + IRQ_TYPE_EDGE_RISING, "deferred_fiq", 0); + if (retval < 0) { + pr_err("Failed to get deferred_fiq IRQ, ret=%d\n", retval); + release_fiq(&fh); + return; + } + /* + * Since no set_type() method is provided by OMAP irq chip, + * switch to edge triggered interrupt type manually. + */ + offset = IRQ_ILR0_REG_OFFSET + INT_DEFERRED_FIQ * 0x4; + val = omap_readl(DEFERRED_FIQ_IH_BASE + offset) & ~(1 << 1); + omap_writel(val, DEFERRED_FIQ_IH_BASE + offset); + + set_fiq_handler(fiqhandler_start, fiqhandler_length); + + /* + * Initialise the buffer which is shared + * between FIQ mode and IRQ mode + */ + fiq_buffer[FIQ_GPIO_INT_MASK] = 0; + fiq_buffer[FIQ_MASK] = 0; + fiq_buffer[FIQ_STATE] = 0; + fiq_buffer[FIQ_KEY] = 0; + fiq_buffer[FIQ_KEYS_CNT] = 0; + fiq_buffer[FIQ_KEYS_HICNT] = 0; + fiq_buffer[FIQ_TAIL_OFFSET] = 0; + fiq_buffer[FIQ_HEAD_OFFSET] = 0; + fiq_buffer[FIQ_BUF_LEN] = 256; + fiq_buffer[FIQ_MISSED_KEYS] = 0; + fiq_buffer[FIQ_BUFFER_START] = + (unsigned int) &fiq_buffer[FIQ_CIRC_BUFF]; + + for (i = FIQ_CNT_INT_00; i <= FIQ_CNT_INT_15; i++) + fiq_buffer[i] = 0; + + /* + * FIQ mode r9 always points to the fiq_buffer, becauses the FIQ isr + * will run in an unpredictable context. The fiq_buffer is the FIQ isr's + * only means of communication with the IRQ level and other kernel + * context code. + */ + FIQ_regs.ARM_r9 = (unsigned int)fiq_buffer; + set_fiq_regs(&FIQ_regs); + + pr_info("request_fiq(): fiq_buffer = %p\n", fiq_buffer); + + /* + * Redirect GPIO interrupts to FIQ + */ + offset = IRQ_ILR0_REG_OFFSET + INT_GPIO_BANK1 * 0x4; + val = omap_readl(OMAP_IH1_BASE + offset) | 1; + omap_writel(val, OMAP_IH1_BASE + offset); +} diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 8b40aace9db4..bd0495a9ac3b 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -15,102 +15,110 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/input.h> +#include <linux/interrupt.h> +#include <linux/leds.h> #include <linux/platform_device.h> +#include <linux/serial_8250.h> +#include <media/soc_camera.h> + +#include <asm/serial.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/board-ams-delta.h> +#include <plat/io.h> +#include <plat/board-ams-delta.h> #include <mach/gpio.h> -#include <mach/keypad.h> -#include <mach/mux.h> -#include <mach/usb.h> -#include <mach/board.h> -#include <mach/common.h> +#include <plat/keypad.h> +#include <plat/mux.h> +#include <plat/usb.h> +#include <plat/board.h> +#include <plat/common.h> +#include <mach/camera.h> + +#include <mach/ams-delta-fiq.h> static u8 ams_delta_latch1_reg; static u16 ams_delta_latch2_reg; -static int ams_delta_keymap[] = { +static const unsigned int ams_delta_keymap[] = { KEY(0, 0, KEY_F1), /* Advert */ - KEY(3, 0, KEY_COFFEE), /* Games */ - KEY(2, 0, KEY_QUESTION), /* Directory */ - KEY(3, 2, KEY_CONNECT), /* Internet */ - KEY(2, 1, KEY_SHOP), /* Services */ + KEY(0, 3, KEY_COFFEE), /* Games */ + KEY(0, 2, KEY_QUESTION), /* Directory */ + KEY(2, 3, KEY_CONNECT), /* Internet */ + KEY(1, 2, KEY_SHOP), /* Services */ KEY(1, 1, KEY_PHONE), /* VoiceMail */ - KEY(1, 0, KEY_DELETE), /* Delete */ + KEY(0, 1, KEY_DELETE), /* Delete */ KEY(2, 2, KEY_PLAY), /* Play */ - KEY(0, 1, KEY_PAGEUP), /* Up */ - KEY(3, 1, KEY_PAGEDOWN), /* Down */ - KEY(0, 2, KEY_EMAIL), /* ReadEmail */ - KEY(1, 2, KEY_STOP), /* Stop */ + KEY(1, 0, KEY_PAGEUP), /* Up */ + KEY(1, 3, KEY_PAGEDOWN), /* Down */ + KEY(2, 0, KEY_EMAIL), /* ReadEmail */ + KEY(2, 1, KEY_STOP), /* Stop */ /* Numeric keypad portion */ - KEY(7, 0, KEY_KP1), - KEY(6, 0, KEY_KP2), - KEY(5, 0, KEY_KP3), - KEY(7, 1, KEY_KP4), - KEY(6, 1, KEY_KP5), - KEY(5, 1, KEY_KP6), - KEY(7, 2, KEY_KP7), - KEY(6, 2, KEY_KP8), - KEY(5, 2, KEY_KP9), - KEY(6, 3, KEY_KP0), - KEY(7, 3, KEY_KPASTERISK), - KEY(5, 3, KEY_KPDOT), /* # key */ - KEY(2, 7, KEY_NUMLOCK), /* Mute */ - KEY(1, 7, KEY_KPMINUS), /* Recall */ - KEY(1, 6, KEY_KPPLUS), /* Redial */ - KEY(6, 7, KEY_KPSLASH), /* Handsfree */ - KEY(0, 6, KEY_ENTER), /* Video */ - - KEY(4, 7, KEY_CAMERA), /* Photo */ - - KEY(4, 0, KEY_F2), /* Home */ - KEY(4, 1, KEY_F3), /* Office */ - KEY(4, 2, KEY_F4), /* Mobile */ + KEY(0, 7, KEY_KP1), + KEY(0, 6, KEY_KP2), + KEY(0, 5, KEY_KP3), + KEY(1, 7, KEY_KP4), + KEY(1, 6, KEY_KP5), + KEY(1, 5, KEY_KP6), + KEY(2, 7, KEY_KP7), + KEY(2, 6, KEY_KP8), + KEY(2, 5, KEY_KP9), + KEY(3, 6, KEY_KP0), + KEY(3, 7, KEY_KPASTERISK), + KEY(3, 5, KEY_KPDOT), /* # key */ + KEY(7, 2, KEY_NUMLOCK), /* Mute */ + KEY(7, 1, KEY_KPMINUS), /* Recall */ + KEY(6, 1, KEY_KPPLUS), /* Redial */ + KEY(7, 6, KEY_KPSLASH), /* Handsfree */ + KEY(6, 0, KEY_ENTER), /* Video */ + + KEY(7, 4, KEY_CAMERA), /* Photo */ + + KEY(0, 4, KEY_F2), /* Home */ + KEY(1, 4, KEY_F3), /* Office */ + KEY(2, 4, KEY_F4), /* Mobile */ KEY(7, 7, KEY_F5), /* SMS */ - KEY(5, 7, KEY_F6), /* Email */ + KEY(7, 5, KEY_F6), /* Email */ /* QWERTY portion of keypad */ - KEY(4, 3, KEY_Q), + KEY(3, 4, KEY_Q), KEY(3, 3, KEY_W), - KEY(2, 3, KEY_E), - KEY(1, 3, KEY_R), - KEY(0, 3, KEY_T), - KEY(7, 4, KEY_Y), - KEY(6, 4, KEY_U), - KEY(5, 4, KEY_I), + KEY(3, 2, KEY_E), + KEY(3, 1, KEY_R), + KEY(3, 0, KEY_T), + KEY(4, 7, KEY_Y), + KEY(4, 6, KEY_U), + KEY(4, 5, KEY_I), KEY(4, 4, KEY_O), - KEY(3, 4, KEY_P), + KEY(4, 3, KEY_P), - KEY(2, 4, KEY_A), - KEY(1, 4, KEY_S), - KEY(0, 4, KEY_D), - KEY(7, 5, KEY_F), - KEY(6, 5, KEY_G), + KEY(4, 2, KEY_A), + KEY(4, 1, KEY_S), + KEY(4, 0, KEY_D), + KEY(5, 7, KEY_F), + KEY(5, 6, KEY_G), KEY(5, 5, KEY_H), - KEY(4, 5, KEY_J), - KEY(3, 5, KEY_K), - KEY(2, 5, KEY_L), + KEY(5, 4, KEY_J), + KEY(5, 3, KEY_K), + KEY(5, 2, KEY_L), - KEY(1, 5, KEY_Z), - KEY(0, 5, KEY_X), - KEY(7, 6, KEY_C), + KEY(5, 1, KEY_Z), + KEY(5, 0, KEY_X), + KEY(6, 7, KEY_C), KEY(6, 6, KEY_V), - KEY(5, 6, KEY_B), - KEY(4, 6, KEY_N), - KEY(3, 6, KEY_M), - KEY(2, 6, KEY_SPACE), - - KEY(0, 7, KEY_LEFTSHIFT), /* Vol up */ - KEY(3, 7, KEY_LEFTCTRL), /* Vol down */ + KEY(6, 5, KEY_B), + KEY(6, 4, KEY_N), + KEY(6, 3, KEY_M), + KEY(6, 2, KEY_SPACE), - 0 + KEY(7, 0, KEY_LEFTSHIFT), /* Vol up */ + KEY(7, 3, KEY_LEFTCTRL), /* Vol down */ }; void ams_delta_latch1_write(u8 mask, u8 value) @@ -131,7 +139,6 @@ static void __init ams_delta_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); } static struct map_desc ams_delta_io_desc[] __initdata = { @@ -162,10 +169,6 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_uart_config ams_delta_uart_config __initdata = { - .enabled_uarts = 1, -}; - static struct omap_usb_config ams_delta_usb_config __initdata = { .register_host = 1, .hmc_mode = 16, @@ -174,7 +177,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = { static struct omap_board_config_kernel ams_delta_config[] = { { OMAP_TAG_LCD, &ams_delta_lcd_config }, - { OMAP_TAG_UART, &ams_delta_uart_config }, }; static struct resource ams_delta_kp_resources[] = { @@ -185,11 +187,15 @@ static struct resource ams_delta_kp_resources[] = { }, }; +static const struct matrix_keymap_data ams_delta_keymap_data = { + .keymap = ams_delta_keymap, + .keymap_size = ARRAY_SIZE(ams_delta_keymap), +}; + static struct omap_kp_platform_data ams_delta_kp_data = { .rows = 8, .cols = 8, - .keymap = ams_delta_keymap, - .keymapsize = ARRAY_SIZE(ams_delta_keymap), + .keymap_data = &ams_delta_keymap_data, .delay = 9, }; @@ -213,14 +219,78 @@ static struct platform_device ams_delta_led_device = { .id = -1 }; +static struct i2c_board_info ams_delta_camera_board_info[] = { + { + I2C_BOARD_INFO("ov6650", 0x60), + }, +}; + +#ifdef CONFIG_LEDS_TRIGGERS +DEFINE_LED_TRIGGER(ams_delta_camera_led_trigger); + +static int ams_delta_camera_power(struct device *dev, int power) +{ + /* + * turn on camera LED + */ + if (power) + led_trigger_event(ams_delta_camera_led_trigger, LED_FULL); + else + led_trigger_event(ams_delta_camera_led_trigger, LED_OFF); + return 0; +} +#else +#define ams_delta_camera_power NULL +#endif + +static struct soc_camera_link __initdata ams_delta_iclink = { + .bus_id = 0, /* OMAP1 SoC camera bus */ + .i2c_adapter_id = 1, + .board_info = &ams_delta_camera_board_info[0], + .module_name = "ov6650", + .power = ams_delta_camera_power, +}; + +static struct platform_device ams_delta_camera_device = { + .name = "soc-camera-pdrv", + .id = 0, + .dev = { + .platform_data = &ams_delta_iclink, + }, +}; + +static struct omap1_cam_platform_data ams_delta_camera_platform_data = { + .camexclk_khz = 12000, /* default 12MHz clock, no extra DPLL */ + .lclk_khz_max = 1334, /* results in 5fps CIF, 10fps QCIF */ +}; + static struct platform_device *ams_delta_devices[] __initdata = { &ams_delta_kp_device, &ams_delta_lcd_device, &ams_delta_led_device, + &ams_delta_camera_device, }; static void __init ams_delta_init(void) { + /* mux pins for uarts */ + omap_cfg_reg(UART1_TX); + omap_cfg_reg(UART1_RTS); + + /* parallel camera interface */ + omap_cfg_reg(H19_1610_CAM_EXCLK); + omap_cfg_reg(J15_1610_CAM_LCLK); + omap_cfg_reg(L18_1610_CAM_VS); + omap_cfg_reg(L15_1610_CAM_HS); + omap_cfg_reg(L19_1610_CAM_D0); + omap_cfg_reg(K14_1610_CAM_D1); + omap_cfg_reg(K15_1610_CAM_D2); + omap_cfg_reg(K19_1610_CAM_D3); + omap_cfg_reg(K18_1610_CAM_D4); + omap_cfg_reg(J14_1610_CAM_D5); + omap_cfg_reg(J19_1610_CAM_D6); + omap_cfg_reg(J18_1610_CAM_D7); + iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc)); omap_board_config = ams_delta_config; @@ -231,9 +301,66 @@ static void __init ams_delta_init(void) /* Clear latch2 (NAND, LCD, modem enable) */ ams_delta_latch2_write(~0, 0); - omap_usb_init(&ams_delta_usb_config); + omap1_usb_init(&ams_delta_usb_config); + omap1_set_camera_info(&ams_delta_camera_platform_data); +#ifdef CONFIG_LEDS_TRIGGERS + led_trigger_register_simple("ams_delta_camera", + &ams_delta_camera_led_trigger); +#endif platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); + + ams_delta_init_fiq(); + + omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1); +} + +static struct plat_serial8250_port ams_delta_modem_ports[] = { + { + .membase = IOMEM(AMS_DELTA_MODEM_VIRT), + .mapbase = AMS_DELTA_MODEM_PHYS, + .irq = -EINVAL, /* changed later */ + .flags = UPF_BOOT_AUTOCONF, + .irqflags = IRQF_TRIGGER_RISING, + .iotype = UPIO_MEM, + .regshift = 1, + .uartclk = BASE_BAUD * 16, + }, + { }, +}; + +static struct platform_device ams_delta_modem_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM1, + .dev = { + .platform_data = ams_delta_modem_ports, + }, +}; + +static int __init ams_delta_modem_init(void) +{ + int err; + + if (!machine_is_ams_delta()) + return -ENODEV; + + omap_cfg_reg(M14_1510_GPIO2); + ams_delta_modem_ports[0].irq = + gpio_to_irq(AMS_DELTA_GPIO_PIN_MODEM_IRQ); + + err = gpio_request(AMS_DELTA_GPIO_PIN_MODEM_IRQ, "modem"); + if (err) { + pr_err("Couldn't request gpio pin for modem\n"); + return err; + } + gpio_direction_input(AMS_DELTA_GPIO_PIN_MODEM_IRQ); + + ams_delta_latch2_write( + AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC, + AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC); + + return platform_device_register(&ams_delta_modem_device); } +arch_initcall(ams_delta_modem_init); static void __init ams_delta_map_io(void) { @@ -242,10 +369,9 @@ static void __init ams_delta_map_io(void) MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") /* Maintainer: Jonathan McDowell <noodles@earth.li> */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = ams_delta_map_io, + .reserve = omap_reserve, .init_irq = ams_delta_init_irq, .init_machine = ams_delta_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 19e0e9232336..0efb9dbae44c 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -18,22 +18,23 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/input.h> +#include <linux/smc91x.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <asm/mach/flash.h> #include <asm/mach/map.h> -#include <mach/tc.h> +#include <plat/tc.h> #include <mach/gpio.h> -#include <mach/mux.h> -#include <mach/fpga.h> -#include <mach/nand.h> -#include <mach/keypad.h> -#include <mach/common.h> -#include <mach/board.h> +#include <plat/mux.h> +#include <plat/flash.h> +#include <plat/fpga.h> +#include <plat/keypad.h> +#include <plat/common.h> +#include <plat/board.h> /* fsample is pretty close to p2-sample */ @@ -68,36 +69,41 @@ #define fsample_cpld_clear(bit) \ fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR) -static int fsample_keymap[] = { - KEY(0,0,KEY_UP), - KEY(0,1,KEY_RIGHT), - KEY(0,2,KEY_LEFT), - KEY(0,3,KEY_DOWN), - KEY(0,4,KEY_ENTER), - KEY(1,0,KEY_F10), - KEY(1,1,KEY_SEND), - KEY(1,2,KEY_END), - KEY(1,3,KEY_VOLUMEDOWN), - KEY(1,4,KEY_VOLUMEUP), - KEY(1,5,KEY_RECORD), - KEY(2,0,KEY_F9), - KEY(2,1,KEY_3), - KEY(2,2,KEY_6), - KEY(2,3,KEY_9), - KEY(2,4,KEY_KPDOT), - KEY(3,0,KEY_BACK), - KEY(3,1,KEY_2), - KEY(3,2,KEY_5), - KEY(3,3,KEY_8), - KEY(3,4,KEY_0), - KEY(3,5,KEY_KPSLASH), - KEY(4,0,KEY_HOME), - KEY(4,1,KEY_1), - KEY(4,2,KEY_4), - KEY(4,3,KEY_7), - KEY(4,4,KEY_KPASTERISK), - KEY(4,5,KEY_POWER), - 0 +static const unsigned int fsample_keymap[] = { + KEY(0, 0, KEY_UP), + KEY(1, 0, KEY_RIGHT), + KEY(2, 0, KEY_LEFT), + KEY(3, 0, KEY_DOWN), + KEY(4, 0, KEY_ENTER), + KEY(0, 1, KEY_F10), + KEY(1, 1, KEY_SEND), + KEY(2, 1, KEY_END), + KEY(3, 1, KEY_VOLUMEDOWN), + KEY(4, 1, KEY_VOLUMEUP), + KEY(5, 1, KEY_RECORD), + KEY(0, 2, KEY_F9), + KEY(1, 2, KEY_3), + KEY(2, 2, KEY_6), + KEY(3, 2, KEY_9), + KEY(4, 2, KEY_KPDOT), + KEY(0, 3, KEY_BACK), + KEY(1, 3, KEY_2), + KEY(2, 3, KEY_5), + KEY(3, 3, KEY_8), + KEY(4, 3, KEY_0), + KEY(5, 3, KEY_KPSLASH), + KEY(0, 4, KEY_HOME), + KEY(1, 4, KEY_1), + KEY(2, 4, KEY_4), + KEY(3, 4, KEY_7), + KEY(4, 4, KEY_KPASTERISK), + KEY(5, 4, KEY_POWER), +}; + +static struct smc91x_platdata smc91x_info = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, + .leda = RPC_LED_100_10, + .ledb = RPC_LED_TX_RX, }; static struct resource smc91x_resources[] = { @@ -107,12 +113,21 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = INT_730_MPU_EXT_NIRQ, + .start = INT_7XX_MPU_EXT_NIRQ, .end = 0, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; +static void __init fsample_init_smc91x(void) +{ + fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); + mdelay(50); + fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, + H2P2_DBG_FPGA_LAN_RESET); + mdelay(50); +} + static struct mtd_partition nor_partitions[] = { /* bootloader (U-Boot, etc) in first sector */ { @@ -144,9 +159,9 @@ static struct mtd_partition nor_partitions[] = { }, }; -static struct flash_platform_data nor_data = { - .map_name = "cfi_probe", +static struct physmap_flash_data nor_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = nor_partitions, .nr_parts = ARRAY_SIZE(nor_partitions), }; @@ -158,7 +173,7 @@ static struct resource nor_resource = { }; static struct platform_device nor_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &nor_data, @@ -167,8 +182,40 @@ static struct platform_device nor_device = { .resource = &nor_resource, }; -static struct omap_nand_platform_data nand_data = { - .options = NAND_SAMSUNG_LP_OPTIONS, +static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + unsigned long mask; + + if (cmd == NAND_CMD_NONE) + return; + + mask = (ctrl & NAND_CLE) ? 0x02 : 0; + if (ctrl & NAND_ALE) + mask |= 0x04; + writeb(cmd, (unsigned long)this->IO_ADDR_W | mask); +} + +#define FSAMPLE_NAND_RB_GPIO_PIN 62 + +static int nand_dev_ready(struct mtd_info *mtd) +{ + return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN); +} + +static const char *part_probes[] = { "cmdlinepart", NULL }; + +static struct platform_nand_data nand_data = { + .chip = { + .nr_chips = 1, + .chip_offset = 0, + .options = NAND_SAMSUNG_LP_OPTIONS, + .part_probe_types = part_probes, + }, + .ctrl = { + .cmd_ctrl = nand_cmd_ctl, + .dev_ready = nand_dev_ready, + }, }; static struct resource nand_resource = { @@ -178,7 +225,7 @@ static struct resource nand_resource = { }; static struct platform_device nand_device = { - .name = "omapnand", + .name = "gen_nand", .id = 0, .dev = { .platform_data = &nand_data, @@ -190,23 +237,30 @@ static struct platform_device nand_device = { static struct platform_device smc91x_device = { .name = "smc91x", .id = 0, + .dev = { + .platform_data = &smc91x_info, + }, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, }; static struct resource kp_resources[] = { [0] = { - .start = INT_730_MPUIO_KEYPAD, - .end = INT_730_MPUIO_KEYPAD, + .start = INT_7XX_MPUIO_KEYPAD, + .end = INT_7XX_MPUIO_KEYPAD, .flags = IORESOURCE_IRQ, }, }; +static const struct matrix_keymap_data fsample_keymap_data = { + .keymap = fsample_keymap, + .keymap_size = ARRAY_SIZE(fsample_keymap), +}; + static struct omap_kp_platform_data kp_data = { .rows = 8, .cols = 8, - .keymap = fsample_keymap, - .keymapsize = ARRAY_SIZE(fsample_keymap), + .keymap_data = &fsample_keymap_data, .delay = 4, }; @@ -233,35 +287,37 @@ static struct platform_device *devices[] __initdata = { &lcd_device, }; -#define P2_NAND_RB_GPIO_PIN 62 - -static int nand_dev_ready(struct omap_nand_platform_data *data) -{ - return gpio_get_value(P2_NAND_RB_GPIO_PIN); -} - -static struct omap_uart_config fsample_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1)), -}; - static struct omap_lcd_config fsample_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel fsample_config[] = { - { OMAP_TAG_UART, &fsample_uart_config }, { OMAP_TAG_LCD, &fsample_lcd_config }, }; static void __init omap_fsample_init(void) { - if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0) + fsample_init_smc91x(); + + if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); - nand_data.dev_ready = nand_dev_ready; + gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN); omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); + /* Mux pins for keypad */ + omap_cfg_reg(E2_7XX_KBR0); + omap_cfg_reg(J7_7XX_KBR1); + omap_cfg_reg(E1_7XX_KBR2); + omap_cfg_reg(F3_7XX_KBR3); + omap_cfg_reg(D2_7XX_KBR4); + omap_cfg_reg(C2_7XX_KBC0); + omap_cfg_reg(D3_7XX_KBC1); + omap_cfg_reg(E4_7XX_KBC2); + omap_cfg_reg(F4_7XX_KBC3); + omap_cfg_reg(E3_7XX_KBC4); + platform_add_devices(devices, ARRAY_SIZE(devices)); omap_board_config = fsample_config; @@ -270,21 +326,10 @@ static void __init omap_fsample_init(void) omap_register_i2c_bus(1, 100, NULL, 0); } -static void __init fsample_init_smc91x(void) -{ - fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); - mdelay(50); - fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, - H2P2_DBG_FPGA_LAN_RESET); - mdelay(50); -} - static void __init omap_fsample_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); - fsample_init_smc91x(); } /* Only FPGA needs to be mapped here. All others are done with ioremap */ @@ -314,7 +359,7 @@ static void __init omap_fsample_map_io(void) /* * Hold GSM Reset until needed */ - omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL); + omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); /* * UARTs -> done automagically by 8250 driver @@ -325,29 +370,28 @@ static void __init omap_fsample_map_io(void) */ /* Flash: CS0 timings setup */ - omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0); - omap_writel(0x00000088, OMAP730_FLASH_ACFG_0); + omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); + omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); /* * Ethernet support through the debug board * CS1 timings setup */ - omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1); - omap_writel(0x00000000, OMAP730_FLASH_ACFG_1); + omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); + omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); /* * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, * It is used as the Ethernet controller interrupt */ - omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9); + omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9); } MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") /* Maintainer: Brian Swetland <swetland@google.com> */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_fsample_map_io, + .reserve = omap_reserve, .init_irq = omap_fsample_init_irq, .init_machine = omap_fsample_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index e724940e86f2..23f4ab9e2651 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -23,10 +23,10 @@ #include <asm/mach/map.h> #include <mach/gpio.h> -#include <mach/mux.h> -#include <mach/usb.h> -#include <mach/board.h> -#include <mach/common.h> +#include <plat/mux.h> +#include <plat/usb.h> +#include <plat/board.h> +#include <plat/common.h> static void __init omap_generic_init_irq(void) { @@ -57,24 +57,27 @@ static struct omap_usb_config generic1610_usb_config __initdata = { }; #endif -static struct omap_uart_config generic_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel generic_config[] __initdata = { - { OMAP_TAG_UART, &generic_uart_config }, }; static void __init omap_generic_init(void) { #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap15xx()) { - omap_usb_init(&generic1510_usb_config); + /* mux pins for uarts */ + omap_cfg_reg(UART1_TX); + omap_cfg_reg(UART1_RTS); + omap_cfg_reg(UART2_TX); + omap_cfg_reg(UART2_RTS); + omap_cfg_reg(UART3_TX); + omap_cfg_reg(UART3_RX); + + omap1_usb_init(&generic1510_usb_config); } #endif #if defined(CONFIG_ARCH_OMAP16XX) if (!cpu_is_omap1510()) { - omap_usb_init(&generic1610_usb_config); + omap1_usb_init(&generic1610_usb_config); } #endif @@ -91,10 +94,9 @@ static void __init omap_generic_map_io(void) MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") /* Maintainer: Tony Lindgren <tony@atomide.com> */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_generic_map_io, + .reserve = omap_reserve, .init_irq = omap_generic_init_irq, .init_machine = omap_generic_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c index 46098f546824..f2fc43d8382b 100644 --- a/arch/arm/mach-omap1/board-h2-mmc.c +++ b/arch/arm/mach-omap1/board-h2-mmc.c @@ -16,7 +16,7 @@ #include <linux/i2c/tps65010.h> -#include <mach/mmc.h> +#include <plat/mmc.h> #include <mach/gpio.h> #include "board-h2.h" @@ -58,8 +58,7 @@ static struct omap_mmc_platform_data mmc1_data = { .dma_mask = 0xffffffff, .slots[0] = { .set_power = mmc_set_power, - .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 | - MMC_VDD_32_33 | MMC_VDD_33_34, + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, .name = "mmcblk", }, }; diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index f695aa053ac8..28b84aa9bdba 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -26,68 +26,68 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/input.h> #include <linux/i2c/tps65010.h> +#include <linux/smc91x.h> #include <mach/hardware.h> #include <asm/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <asm/mach/flash.h> #include <asm/mach/map.h> -#include <mach/mux.h> -#include <mach/dma.h> -#include <mach/tc.h> -#include <mach/nand.h> -#include <mach/irda.h> -#include <mach/usb.h> -#include <mach/keypad.h> -#include <mach/common.h> +#include <plat/mux.h> +#include <plat/dma.h> +#include <plat/tc.h> +#include <plat/irda.h> +#include <plat/usb.h> +#include <plat/keypad.h> +#include <plat/common.h> +#include <plat/flash.h> #include "board-h2.h" /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define OMAP1610_ETHR_START 0x04000300 -static int h2_keymap[] = { +static const unsigned int h2_keymap[] = { KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_3), - KEY(0, 3, KEY_F10), - KEY(0, 4, KEY_F5), - KEY(0, 5, KEY_9), - KEY(1, 0, KEY_DOWN), + KEY(1, 0, KEY_RIGHT), + KEY(2, 0, KEY_3), + KEY(3, 0, KEY_F10), + KEY(4, 0, KEY_F5), + KEY(5, 0, KEY_9), + KEY(0, 1, KEY_DOWN), KEY(1, 1, KEY_UP), - KEY(1, 2, KEY_2), - KEY(1, 3, KEY_F9), - KEY(1, 4, KEY_F7), - KEY(1, 5, KEY_0), - KEY(2, 0, KEY_ENTER), - KEY(2, 1, KEY_6), + KEY(2, 1, KEY_2), + KEY(3, 1, KEY_F9), + KEY(4, 1, KEY_F7), + KEY(5, 1, KEY_0), + KEY(0, 2, KEY_ENTER), + KEY(1, 2, KEY_6), KEY(2, 2, KEY_1), - KEY(2, 3, KEY_F2), - KEY(2, 4, KEY_F6), - KEY(2, 5, KEY_HOME), - KEY(3, 0, KEY_8), - KEY(3, 1, KEY_5), - KEY(3, 2, KEY_F12), + KEY(3, 2, KEY_F2), + KEY(4, 2, KEY_F6), + KEY(5, 2, KEY_HOME), + KEY(0, 3, KEY_8), + KEY(1, 3, KEY_5), + KEY(2, 3, KEY_F12), KEY(3, 3, KEY_F3), - KEY(3, 4, KEY_F8), - KEY(3, 5, KEY_END), - KEY(4, 0, KEY_7), - KEY(4, 1, KEY_4), - KEY(4, 2, KEY_F11), - KEY(4, 3, KEY_F1), + KEY(4, 3, KEY_F8), + KEY(5, 3, KEY_END), + KEY(0, 4, KEY_7), + KEY(1, 4, KEY_4), + KEY(2, 4, KEY_F11), + KEY(3, 4, KEY_F1), KEY(4, 4, KEY_F4), - KEY(4, 5, KEY_ESC), - KEY(5, 0, KEY_F13), - KEY(5, 1, KEY_F14), - KEY(5, 2, KEY_F15), - KEY(5, 3, KEY_F16), - KEY(5, 4, KEY_SLEEP), - 0 + KEY(5, 4, KEY_ESC), + KEY(0, 5, KEY_F13), + KEY(1, 5, KEY_F14), + KEY(2, 5, KEY_F15), + KEY(3, 5, KEY_F16), + KEY(4, 5, KEY_SLEEP), }; static struct mtd_partition h2_nor_partitions[] = { @@ -121,9 +121,9 @@ static struct mtd_partition h2_nor_partitions[] = { } }; -static struct flash_platform_data h2_nor_data = { - .map_name = "cfi_probe", +static struct physmap_flash_data h2_nor_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = h2_nor_partitions, .nr_parts = ARRAY_SIZE(h2_nor_partitions), }; @@ -134,7 +134,7 @@ static struct resource h2_nor_resource = { }; static struct platform_device h2_nor_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &h2_nor_data, @@ -179,11 +179,43 @@ static struct mtd_partition h2_nand_partitions[] = { }, }; -/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */ -static struct omap_nand_platform_data h2_nand_data = { - .options = NAND_SAMSUNG_LP_OPTIONS, - .parts = h2_nand_partitions, - .nr_parts = ARRAY_SIZE(h2_nand_partitions), +static void h2_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + unsigned long mask; + + if (cmd == NAND_CMD_NONE) + return; + + mask = (ctrl & NAND_CLE) ? 0x02 : 0; + if (ctrl & NAND_ALE) + mask |= 0x04; + writeb(cmd, (unsigned long)this->IO_ADDR_W | mask); +} + +#define H2_NAND_RB_GPIO_PIN 62 + +static int h2_nand_dev_ready(struct mtd_info *mtd) +{ + return gpio_get_value(H2_NAND_RB_GPIO_PIN); +} + +static const char *h2_part_probes[] = { "cmdlinepart", NULL }; + +struct platform_nand_data h2_nand_platdata = { + .chip = { + .nr_chips = 1, + .chip_offset = 0, + .nr_partitions = ARRAY_SIZE(h2_nand_partitions), + .partitions = h2_nand_partitions, + .options = NAND_SAMSUNG_LP_OPTIONS, + .part_probe_types = h2_part_probes, + }, + .ctrl = { + .cmd_ctrl = h2_nand_cmd_ctl, + .dev_ready = h2_nand_dev_ready, + + }, }; static struct resource h2_nand_resource = { @@ -191,15 +223,21 @@ static struct resource h2_nand_resource = { }; static struct platform_device h2_nand_device = { - .name = "omapnand", + .name = "gen_nand", .id = 0, .dev = { - .platform_data = &h2_nand_data, + .platform_data = &h2_nand_platdata, }, .num_resources = 1, .resource = &h2_nand_resource, }; +static struct smc91x_platdata h2_smc91x_info = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, + .leda = RPC_LED_100_10, + .ledb = RPC_LED_TX_RX, +}; + static struct resource h2_smc91x_resources[] = { [0] = { .start = OMAP1610_ETHR_START, /* Physical */ @@ -216,6 +254,9 @@ static struct resource h2_smc91x_resources[] = { static struct platform_device h2_smc91x_device = { .name = "smc91x", .id = 0, + .dev = { + .platform_data = &h2_smc91x_info, + }, .num_resources = ARRAY_SIZE(h2_smc91x_resources), .resource = h2_smc91x_resources, }; @@ -228,14 +269,18 @@ static struct resource h2_kp_resources[] = { }, }; +static const struct matrix_keymap_data h2_keymap_data = { + .keymap = h2_keymap, + .keymap_size = ARRAY_SIZE(h2_keymap), +}; + static struct omap_kp_platform_data h2_kp_data = { .rows = 8, .cols = 8, - .keymap = h2_keymap, - .keymapsize = ARRAY_SIZE(h2_keymap), - .rep = 1, + .keymap_data = &h2_keymap_data, + .rep = true, .delay = 9, - .dbounce = 1, + .dbounce = true, }; static struct platform_device h2_kp_device = { @@ -250,15 +295,6 @@ static struct platform_device h2_kp_device = { #define H2_IRDA_FIRSEL_GPIO_PIN 17 -#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) -static int h2_transceiver_mode(struct device *dev, int state) -{ - /* SIR when low, else MIR/FIR when HIGH */ - gpio_set_value(H2_IRDA_FIRSEL_GPIO_PIN, !(state & IR_SIRMODE)); - return 0; -} -#endif - static struct omap_irda_config h2_irda_data = { .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE, .rx_channel = OMAP_DMA_UART3_RX, @@ -341,8 +377,6 @@ static void __init h2_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); - h2_init_smc91x(); } static struct omap_usb_config h2_usb_config __initdata = { @@ -360,23 +394,18 @@ static struct omap_usb_config h2_usb_config __initdata = { .pins[1] = 3, }; -static struct omap_uart_config h2_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_lcd_config h2_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel h2_config[] __initdata = { - { OMAP_TAG_UART, &h2_uart_config }, { OMAP_TAG_LCD, &h2_lcd_config }, }; -#define H2_NAND_RB_GPIO_PIN 62 - static void __init h2_init(void) { + h2_init_smc91x(); + /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped * to address 0 by a dip switch), NAND on CS2B. The NAND driver will * notice whether a NAND chip is enabled at probe time. @@ -402,14 +431,18 @@ static void __init h2_init(void) /* omap_cfg_reg(U19_ARMIO1); */ /* CD */ omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ - /* Irda */ -#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) - omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A); - if (gpio_request(H2_IRDA_FIRSEL_GPIO_PIN, "IRDA mode") < 0) - BUG(); - gpio_direction_output(H2_IRDA_FIRSEL_GPIO_PIN, 0); - h2_irda_data.transceiver_mode = h2_transceiver_mode; -#endif + /* Mux pins for keypad */ + omap_cfg_reg(F18_1610_KBC0); + omap_cfg_reg(D20_1610_KBC1); + omap_cfg_reg(D19_1610_KBC2); + omap_cfg_reg(E18_1610_KBC3); + omap_cfg_reg(C21_1610_KBC4); + omap_cfg_reg(G18_1610_KBR0); + omap_cfg_reg(F19_1610_KBR1); + omap_cfg_reg(H14_1610_KBR2); + omap_cfg_reg(E20_1610_KBR3); + omap_cfg_reg(E19_1610_KBR4); + omap_cfg_reg(N19_1610_KBR5); platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); omap_board_config = h2_config; @@ -417,7 +450,7 @@ static void __init h2_init(void) omap_serial_init(); omap_register_i2c_bus(1, 100, h2_i2c_board_info, ARRAY_SIZE(h2_i2c_board_info)); - omap_usb_init(&h2_usb_config); + omap1_usb_init(&h2_usb_config); h2_mmc_init(); } @@ -428,10 +461,9 @@ static void __init h2_map_io(void) MACHINE_START(OMAP_H2, "TI-H2") /* Maintainer: Imre Deak <imre.deak@nokia.com> */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = h2_map_io, + .reserve = omap_reserve, .init_irq = h2_init_irq, .init_machine = h2_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c index 5e8877ce35e0..2098525e7cc5 100644 --- a/arch/arm/mach-omap1/board-h3-mmc.c +++ b/arch/arm/mach-omap1/board-h3-mmc.c @@ -16,7 +16,7 @@ #include <linux/i2c/tps65010.h> -#include <mach/mmc.h> +#include <plat/mmc.h> #include <mach/gpio.h> #include "board-h3.h" @@ -40,8 +40,7 @@ static struct omap_mmc_platform_data mmc1_data = { .dma_mask = 0xffffffff, .slots[0] = { .set_power = mmc_set_power, - .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 | - MMC_VDD_32_33 | MMC_VDD_33_34, + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, .name = "mmcblk", }, }; diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index f597968733b4..dbc8b8d882ba 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -25,9 +25,11 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/input.h> #include <linux/spi/spi.h> #include <linux/i2c/tps65010.h> +#include <linux/smc91x.h> #include <asm/setup.h> #include <asm/page.h> @@ -36,17 +38,16 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <asm/mach/flash.h> #include <asm/mach/map.h> #include <mach/irqs.h> -#include <mach/mux.h> -#include <mach/tc.h> -#include <mach/nand.h> -#include <mach/usb.h> -#include <mach/keypad.h> -#include <mach/dma.h> -#include <mach/common.h> +#include <plat/mux.h> +#include <plat/tc.h> +#include <plat/usb.h> +#include <plat/keypad.h> +#include <plat/dma.h> +#include <plat/common.h> +#include <plat/flash.h> #include "board-h3.h" @@ -55,43 +56,42 @@ #define H3_TS_GPIO 48 -static int h3_keymap[] = { +static const unsigned int h3_keymap[] = { KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_3), - KEY(0, 3, KEY_F10), - KEY(0, 4, KEY_F5), - KEY(0, 5, KEY_9), - KEY(1, 0, KEY_DOWN), + KEY(1, 0, KEY_RIGHT), + KEY(2, 0, KEY_3), + KEY(3, 0, KEY_F10), + KEY(4, 0, KEY_F5), + KEY(5, 0, KEY_9), + KEY(0, 1, KEY_DOWN), KEY(1, 1, KEY_UP), - KEY(1, 2, KEY_2), - KEY(1, 3, KEY_F9), - KEY(1, 4, KEY_F7), - KEY(1, 5, KEY_0), - KEY(2, 0, KEY_ENTER), - KEY(2, 1, KEY_6), + KEY(2, 1, KEY_2), + KEY(3, 1, KEY_F9), + KEY(4, 1, KEY_F7), + KEY(5, 1, KEY_0), + KEY(0, 2, KEY_ENTER), + KEY(1, 2, KEY_6), KEY(2, 2, KEY_1), - KEY(2, 3, KEY_F2), - KEY(2, 4, KEY_F6), - KEY(2, 5, KEY_HOME), - KEY(3, 0, KEY_8), - KEY(3, 1, KEY_5), - KEY(3, 2, KEY_F12), + KEY(3, 2, KEY_F2), + KEY(4, 2, KEY_F6), + KEY(5, 2, KEY_HOME), + KEY(0, 3, KEY_8), + KEY(1, 3, KEY_5), + KEY(2, 3, KEY_F12), KEY(3, 3, KEY_F3), - KEY(3, 4, KEY_F8), - KEY(3, 5, KEY_END), - KEY(4, 0, KEY_7), - KEY(4, 1, KEY_4), - KEY(4, 2, KEY_F11), - KEY(4, 3, KEY_F1), + KEY(4, 3, KEY_F8), + KEY(5, 3, KEY_END), + KEY(0, 4, KEY_7), + KEY(1, 4, KEY_4), + KEY(2, 4, KEY_F11), + KEY(3, 4, KEY_F1), KEY(4, 4, KEY_F4), - KEY(4, 5, KEY_ESC), - KEY(5, 0, KEY_F13), - KEY(5, 1, KEY_F14), - KEY(5, 2, KEY_F15), - KEY(5, 3, KEY_F16), - KEY(5, 4, KEY_SLEEP), - 0 + KEY(5, 4, KEY_ESC), + KEY(0, 5, KEY_F13), + KEY(1, 5, KEY_F14), + KEY(2, 5, KEY_F15), + KEY(3, 5, KEY_F16), + KEY(4, 5, KEY_SLEEP), }; @@ -126,9 +126,9 @@ static struct mtd_partition nor_partitions[] = { } }; -static struct flash_platform_data nor_data = { - .map_name = "cfi_probe", +static struct physmap_flash_data nor_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = nor_partitions, .nr_parts = ARRAY_SIZE(nor_partitions), }; @@ -139,7 +139,7 @@ static struct resource nor_resource = { }; static struct platform_device nor_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &nor_data, @@ -181,11 +181,43 @@ static struct mtd_partition nand_partitions[] = { }, }; -/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */ -static struct omap_nand_platform_data nand_data = { - .options = NAND_SAMSUNG_LP_OPTIONS, - .parts = nand_partitions, - .nr_parts = ARRAY_SIZE(nand_partitions), +static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + unsigned long mask; + + if (cmd == NAND_CMD_NONE) + return; + + mask = (ctrl & NAND_CLE) ? 0x02 : 0; + if (ctrl & NAND_ALE) + mask |= 0x04; + writeb(cmd, (unsigned long)this->IO_ADDR_W | mask); +} + +#define H3_NAND_RB_GPIO_PIN 10 + +static int nand_dev_ready(struct mtd_info *mtd) +{ + return gpio_get_value(H3_NAND_RB_GPIO_PIN); +} + +static const char *part_probes[] = { "cmdlinepart", NULL }; + +struct platform_nand_data nand_platdata = { + .chip = { + .nr_chips = 1, + .chip_offset = 0, + .nr_partitions = ARRAY_SIZE(nand_partitions), + .partitions = nand_partitions, + .options = NAND_SAMSUNG_LP_OPTIONS, + .part_probe_types = part_probes, + }, + .ctrl = { + .cmd_ctrl = nand_cmd_ctl, + .dev_ready = nand_dev_ready, + + }, }; static struct resource nand_resource = { @@ -193,15 +225,21 @@ static struct resource nand_resource = { }; static struct platform_device nand_device = { - .name = "omapnand", + .name = "gen_nand", .id = 0, .dev = { - .platform_data = &nand_data, + .platform_data = &nand_platdata, }, .num_resources = 1, .resource = &nand_resource, }; +static struct smc91x_platdata smc91x_info = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, + .leda = RPC_LED_100_10, + .ledb = RPC_LED_TX_RX, +}; + static struct resource smc91x_resources[] = { [0] = { .start = OMAP1710_ETHR_START, /* Physical */ @@ -218,10 +256,22 @@ static struct resource smc91x_resources[] = { static struct platform_device smc91x_device = { .name = "smc91x", .id = 0, + .dev = { + .platform_data = &smc91x_info, + }, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, }; +static void __init h3_init_smc91x(void) +{ + omap_cfg_reg(W15_1710_GPIO40); + if (gpio_request(40, "SMC91x irq") < 0) { + printk("Error requesting gpio 40 for smc91x irq\n"); + return; + } +} + #define GPTIMER_BASE 0xFFFB1400 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800)) #define GPTIMER_REGS_SIZE 0x46 @@ -254,14 +304,18 @@ static struct resource h3_kp_resources[] = { }, }; +static const struct matrix_keymap_data h3_keymap_data = { + .keymap = h3_keymap, + .keymap_size = ARRAY_SIZE(h3_keymap), +}; + static struct omap_kp_platform_data h3_kp_data = { .rows = 8, .cols = 8, - .keymap = h3_keymap, - .keymapsize = ARRAY_SIZE(h3_keymap), - .rep = 1, + .keymap_data = &h3_keymap_data, + .rep = true, .delay = 9, - .dbounce = 1, + .dbounce = true, }; static struct platform_device h3_kp_device = { @@ -313,16 +367,11 @@ static struct omap_usb_config h3_usb_config __initdata = { .pins[1] = 3, }; -static struct omap_uart_config h3_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_lcd_config h3_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel h3_config[] __initdata = { - { OMAP_TAG_UART, &h3_uart_config }, { OMAP_TAG_LCD, &h3_lcd_config }, }; @@ -337,15 +386,10 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = { }, }; -#define H3_NAND_RB_GPIO_PIN 10 - -static int nand_dev_ready(struct omap_nand_platform_data *data) -{ - return gpio_get_value(H3_NAND_RB_GPIO_PIN); -} - static void __init h3_init(void) { + h3_init_smc91x(); + /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped * to address 0 by a dip switch), NAND on CS2B. The NAND driver will * notice whether a NAND chip is enabled at probe time. @@ -361,12 +405,25 @@ static void __init h3_init(void) nand_resource.end += SZ_4K - 1; if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); - nand_data.dev_ready = nand_dev_ready; + gpio_direction_input(H3_NAND_RB_GPIO_PIN); /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ omap_cfg_reg(V2_1710_GPIO10); + /* Mux pins for keypad */ + omap_cfg_reg(F18_1610_KBC0); + omap_cfg_reg(D20_1610_KBC1); + omap_cfg_reg(D19_1610_KBC2); + omap_cfg_reg(E18_1610_KBC3); + omap_cfg_reg(C21_1610_KBC4); + omap_cfg_reg(G18_1610_KBR0); + omap_cfg_reg(F19_1610_KBR1); + omap_cfg_reg(H14_1610_KBR2); + omap_cfg_reg(E20_1610_KBR3); + omap_cfg_reg(E19_1610_KBR4); + omap_cfg_reg(N19_1610_KBR5); + platform_add_devices(devices, ARRAY_SIZE(devices)); spi_register_board_info(h3_spi_board_info, ARRAY_SIZE(h3_spi_board_info)); @@ -375,25 +432,14 @@ static void __init h3_init(void) omap_serial_init(); omap_register_i2c_bus(1, 100, h3_i2c_board_info, ARRAY_SIZE(h3_i2c_board_info)); - omap_usb_init(&h3_usb_config); + omap1_usb_init(&h3_usb_config); h3_mmc_init(); } -static void __init h3_init_smc91x(void) -{ - omap_cfg_reg(W15_1710_GPIO40); - if (gpio_request(40, "SMC91x irq") < 0) { - printk("Error requesting gpio 40 for smc91x irq\n"); - return; - } -} - static void __init h3_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); - h3_init_smc91x(); } static void __init h3_map_io(void) @@ -403,10 +449,9 @@ static void __init h3_map_io(void) MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") /* Maintainer: Texas Instruments, Inc. */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = h3_map_io, + .reserve = omap_reserve, .init_irq = h3_init_irq, .init_machine = h3_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c new file mode 100644 index 000000000000..f2c5c585bc83 --- /dev/null +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -0,0 +1,620 @@ +/* + * HTC Herald board configuration + * Copyright (C) 2009 Cory Maccarrone <darkstar6262@gmail.com> + * Copyright (C) 2009 Wing Linux + * + * Based on the board-htcwizard.c file from the linwizard project: + * Copyright (C) 2006 Unai Uribarri + * Copyright (C) 2008 linwizard.sourceforge.net + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/input.h> +#include <linux/io.h> +#include <linux/gpio.h> +#include <linux/gpio_keys.h> +#include <linux/i2c.h> +#include <linux/i2c-gpio.h> +#include <linux/htcpld.h> +#include <linux/leds.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +#include <plat/omap7xx.h> +#include <plat/common.h> +#include <plat/board.h> +#include <plat/keypad.h> +#include <plat/usb.h> +#include <plat/mmc.h> + +#include <mach/irqs.h> + +#include <linux/delay.h> + +/* LCD register definition */ +#define OMAP_LCDC_CONTROL (0xfffec000 + 0x00) +#define OMAP_LCDC_STATUS (0xfffec000 + 0x10) +#define OMAP_DMA_LCD_CCR (0xfffee300 + 0xc2) +#define OMAP_DMA_LCD_CTRL (0xfffee300 + 0xc4) +#define OMAP_LCDC_CTRL_LCD_EN (1 << 0) +#define OMAP_LCDC_STAT_DONE (1 << 0) + +/* GPIO definitions for the power button and keyboard slide switch */ +#define HTCHERALD_GPIO_POWER 139 +#define HTCHERALD_GPIO_SLIDE 174 +#define HTCHERALD_GIRQ_BTNS 141 + +/* GPIO definitions for the touchscreen */ +#define HTCHERALD_GPIO_TS 76 + +/* HTCPLD definitions */ + +/* + * CPLD Logic + * + * Chip 3 - 0x03 + * + * Function 7 6 5 4 3 2 1 0 + * ------------------------------------ + * DPAD light x x x x x x x 1 + * SoundDev x x x x 1 x x x + * Screen white 1 x x x x x x x + * MMC power on x x x x x 1 x x + * Happy times (n) 0 x x x x 1 x x + * + * Chip 4 - 0x04 + * + * Function 7 6 5 4 3 2 1 0 + * ------------------------------------ + * Keyboard light x x x x x x x 1 + * LCD Bright (4) x x x x x 1 1 x + * LCD Bright (3) x x x x x 0 1 x + * LCD Bright (2) x x x x x 1 0 x + * LCD Bright (1) x x x x x 0 0 x + * LCD Off x x x x 0 x x x + * LCD image (fb) 1 x x x x x x x + * LCD image (white) 0 x x x x x x x + * Caps lock LED x x 1 x x x x x + * + * Chip 5 - 0x05 + * + * Function 7 6 5 4 3 2 1 0 + * ------------------------------------ + * Red (solid) x x x x x 1 x x + * Red (flash) x x x x x x 1 x + * Green (GSM flash) x x x x 1 x x x + * Green (GSM solid) x x x 1 x x x x + * Green (wifi flash) x x 1 x x x x x + * Blue (bt flash) x 1 x x x x x x + * DPAD Int Enable 1 x x x x x x 0 + * + * (Combinations of the above can be made for different colors.) + * The direction pad interrupt enable must be set each time the + * interrupt is handled. + * + * Chip 6 - 0x06 + * + * Function 7 6 5 4 3 2 1 0 + * ------------------------------------ + * Vibrator x x x x 1 x x x + * Alt LED x x x 1 x x x x + * Screen white 1 x x x x x x x + * Screen white x x 1 x x x x x + * Screen white x 0 x x x x x x + * Enable kbd dpad x x x x x x 0 x + * Happy Times 0 1 0 x x x 0 x + */ + +/* + * HTCPLD GPIO lines start 16 after OMAP_MAX_GPIO_LINES to account + * for the 16 MPUIO lines. + */ +#define HTCPLD_GPIO_START_OFFSET (OMAP_MAX_GPIO_LINES + 16) +#define HTCPLD_IRQ(chip, offset) (OMAP_IRQ_END + 8 * (chip) + (offset)) +#define HTCPLD_BASE(chip, offset) \ + (HTCPLD_GPIO_START_OFFSET + 8 * (chip) + (offset)) + +#define HTCPLD_GPIO_LED_DPAD HTCPLD_BASE(0, 0) +#define HTCPLD_GPIO_LED_KBD HTCPLD_BASE(1, 0) +#define HTCPLD_GPIO_LED_CAPS HTCPLD_BASE(1, 5) +#define HTCPLD_GPIO_LED_RED_FLASH HTCPLD_BASE(2, 1) +#define HTCPLD_GPIO_LED_RED_SOLID HTCPLD_BASE(2, 2) +#define HTCPLD_GPIO_LED_GREEN_FLASH HTCPLD_BASE(2, 3) +#define HTCPLD_GPIO_LED_GREEN_SOLID HTCPLD_BASE(2, 4) +#define HTCPLD_GPIO_LED_WIFI HTCPLD_BASE(2, 5) +#define HTCPLD_GPIO_LED_BT HTCPLD_BASE(2, 6) +#define HTCPLD_GPIO_LED_VIBRATE HTCPLD_BASE(3, 3) +#define HTCPLD_GPIO_LED_ALT HTCPLD_BASE(3, 4) + +#define HTCPLD_GPIO_RIGHT_KBD HTCPLD_BASE(6, 7) +#define HTCPLD_GPIO_UP_KBD HTCPLD_BASE(6, 6) +#define HTCPLD_GPIO_LEFT_KBD HTCPLD_BASE(6, 5) +#define HTCPLD_GPIO_DOWN_KBD HTCPLD_BASE(6, 4) + +#define HTCPLD_GPIO_RIGHT_DPAD HTCPLD_BASE(7, 7) +#define HTCPLD_GPIO_UP_DPAD HTCPLD_BASE(7, 6) +#define HTCPLD_GPIO_LEFT_DPAD HTCPLD_BASE(7, 5) +#define HTCPLD_GPIO_DOWN_DPAD HTCPLD_BASE(7, 4) +#define HTCPLD_GPIO_ENTER_DPAD HTCPLD_BASE(7, 3) + +/* + * The htcpld chip requires a gpio write to a specific line + * to re-enable interrupts after one has occurred. + */ +#define HTCPLD_GPIO_INT_RESET_HI HTCPLD_BASE(2, 7) +#define HTCPLD_GPIO_INT_RESET_LO HTCPLD_BASE(2, 0) + +/* Chip 5 */ +#define HTCPLD_IRQ_RIGHT_KBD HTCPLD_IRQ(0, 7) +#define HTCPLD_IRQ_UP_KBD HTCPLD_IRQ(0, 6) +#define HTCPLD_IRQ_LEFT_KBD HTCPLD_IRQ(0, 5) +#define HTCPLD_IRQ_DOWN_KBD HTCPLD_IRQ(0, 4) + +/* Chip 6 */ +#define HTCPLD_IRQ_RIGHT_DPAD HTCPLD_IRQ(1, 7) +#define HTCPLD_IRQ_UP_DPAD HTCPLD_IRQ(1, 6) +#define HTCPLD_IRQ_LEFT_DPAD HTCPLD_IRQ(1, 5) +#define HTCPLD_IRQ_DOWN_DPAD HTCPLD_IRQ(1, 4) +#define HTCPLD_IRQ_ENTER_DPAD HTCPLD_IRQ(1, 3) + +/* Keyboard definition */ + +static const unsigned int htc_herald_keymap[] = { + KEY(0, 0, KEY_RECORD), /* Mail button */ + KEY(1, 0, KEY_CAMERA), /* Camera */ + KEY(2, 0, KEY_PHONE), /* Send key */ + KEY(3, 0, KEY_VOLUMEUP), /* Volume up */ + KEY(4, 0, KEY_F2), /* Right bar (landscape) */ + KEY(5, 0, KEY_MAIL), /* Win key (portrait) */ + KEY(6, 0, KEY_DIRECTORY), /* Right bar (protrait) */ + KEY(0, 1, KEY_LEFTCTRL), /* Windows key */ + KEY(1, 1, KEY_COMMA), + KEY(2, 1, KEY_M), + KEY(3, 1, KEY_K), + KEY(4, 1, KEY_SLASH), /* OK key */ + KEY(5, 1, KEY_I), + KEY(6, 1, KEY_U), + KEY(0, 2, KEY_LEFTALT), + KEY(1, 2, KEY_TAB), + KEY(2, 2, KEY_N), + KEY(3, 2, KEY_J), + KEY(4, 2, KEY_ENTER), + KEY(5, 2, KEY_H), + KEY(6, 2, KEY_Y), + KEY(0, 3, KEY_SPACE), + KEY(1, 3, KEY_L), + KEY(2, 3, KEY_B), + KEY(3, 3, KEY_V), + KEY(4, 3, KEY_BACKSPACE), + KEY(5, 3, KEY_G), + KEY(6, 3, KEY_T), + KEY(0, 4, KEY_CAPSLOCK), /* Shift */ + KEY(1, 4, KEY_C), + KEY(2, 4, KEY_F), + KEY(3, 4, KEY_R), + KEY(4, 4, KEY_O), + KEY(5, 4, KEY_E), + KEY(6, 4, KEY_D), + KEY(0, 5, KEY_X), + KEY(1, 5, KEY_Z), + KEY(2, 5, KEY_S), + KEY(3, 5, KEY_W), + KEY(4, 5, KEY_P), + KEY(5, 5, KEY_Q), + KEY(6, 5, KEY_A), + KEY(0, 6, KEY_CONNECT), /* Voice button */ + KEY(2, 6, KEY_CANCEL), /* End key */ + KEY(3, 6, KEY_VOLUMEDOWN), /* Volume down */ + KEY(4, 6, KEY_F1), /* Left bar (landscape) */ + KEY(5, 6, KEY_WWW), /* OK button (portrait) */ + KEY(6, 6, KEY_CALENDAR), /* Left bar (portrait) */ +}; + +static const struct matrix_keymap_data htc_herald_keymap_data = { + .keymap = htc_herald_keymap, + .keymap_size = ARRAY_SIZE(htc_herald_keymap), +}; + +static struct omap_kp_platform_data htcherald_kp_data = { + .rows = 7, + .cols = 7, + .delay = 20, + .rep = true, + .keymap_data = &htc_herald_keymap_data, +}; + +static struct resource kp_resources[] = { + [0] = { + .start = INT_7XX_MPUIO_KEYPAD, + .end = INT_7XX_MPUIO_KEYPAD, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device kp_device = { + .name = "omap-keypad", + .id = -1, + .dev = { + .platform_data = &htcherald_kp_data, + }, + .num_resources = ARRAY_SIZE(kp_resources), + .resource = kp_resources, +}; + +/* GPIO buttons for keyboard slide and power button */ +static struct gpio_keys_button herald_gpio_keys_table[] = { + {BTN_0, HTCHERALD_GPIO_POWER, 1, "POWER", EV_KEY, 1, 20}, + {SW_LID, HTCHERALD_GPIO_SLIDE, 0, "SLIDE", EV_SW, 1, 20}, + + {KEY_LEFT, HTCPLD_GPIO_LEFT_KBD, 1, "LEFT", EV_KEY, 1, 20}, + {KEY_RIGHT, HTCPLD_GPIO_RIGHT_KBD, 1, "RIGHT", EV_KEY, 1, 20}, + {KEY_UP, HTCPLD_GPIO_UP_KBD, 1, "UP", EV_KEY, 1, 20}, + {KEY_DOWN, HTCPLD_GPIO_DOWN_KBD, 1, "DOWN", EV_KEY, 1, 20}, + + {KEY_LEFT, HTCPLD_GPIO_LEFT_DPAD, 1, "DLEFT", EV_KEY, 1, 20}, + {KEY_RIGHT, HTCPLD_GPIO_RIGHT_DPAD, 1, "DRIGHT", EV_KEY, 1, 20}, + {KEY_UP, HTCPLD_GPIO_UP_DPAD, 1, "DUP", EV_KEY, 1, 20}, + {KEY_DOWN, HTCPLD_GPIO_DOWN_DPAD, 1, "DDOWN", EV_KEY, 1, 20}, + {KEY_ENTER, HTCPLD_GPIO_ENTER_DPAD, 1, "DENTER", EV_KEY, 1, 20}, +}; + +static struct gpio_keys_platform_data herald_gpio_keys_data = { + .buttons = herald_gpio_keys_table, + .nbuttons = ARRAY_SIZE(herald_gpio_keys_table), + .rep = true, +}; + +static struct platform_device herald_gpiokeys_device = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &herald_gpio_keys_data, + }, +}; + +/* LEDs for the Herald. These connect to the HTCPLD GPIO device. */ +static struct gpio_led gpio_leds[] = { + {"dpad", NULL, HTCPLD_GPIO_LED_DPAD, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"kbd", NULL, HTCPLD_GPIO_LED_KBD, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"vibrate", NULL, HTCPLD_GPIO_LED_VIBRATE, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"green_solid", NULL, HTCPLD_GPIO_LED_GREEN_SOLID, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"green_flash", NULL, HTCPLD_GPIO_LED_GREEN_FLASH, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"red_solid", "mmc0", HTCPLD_GPIO_LED_RED_SOLID, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"red_flash", NULL, HTCPLD_GPIO_LED_RED_FLASH, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"wifi", NULL, HTCPLD_GPIO_LED_WIFI, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"bt", NULL, HTCPLD_GPIO_LED_BT, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"caps", NULL, HTCPLD_GPIO_LED_CAPS, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, + {"alt", NULL, HTCPLD_GPIO_LED_ALT, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, +}; + +static struct gpio_led_platform_data gpio_leds_data = { + .leds = gpio_leds, + .num_leds = ARRAY_SIZE(gpio_leds), +}; + +static struct platform_device gpio_leds_device = { + .name = "leds-gpio", + .id = 0, + .dev = { + .platform_data = &gpio_leds_data, + }, +}; + +/* HTC PLD chips */ + +static struct resource htcpld_resources[] = { + [0] = { + .start = OMAP_GPIO_IRQ(HTCHERALD_GIRQ_BTNS), + .end = OMAP_GPIO_IRQ(HTCHERALD_GIRQ_BTNS), + .flags = IORESOURCE_IRQ, + }, +}; + +struct htcpld_chip_platform_data htcpld_chips[] = { + [0] = { + .addr = 0x03, + .reset = 0x04, + .num_gpios = 8, + .gpio_out_base = HTCPLD_BASE(0, 0), + .gpio_in_base = HTCPLD_BASE(4, 0), + }, + [1] = { + .addr = 0x04, + .reset = 0x8e, + .num_gpios = 8, + .gpio_out_base = HTCPLD_BASE(1, 0), + .gpio_in_base = HTCPLD_BASE(5, 0), + }, + [2] = { + .addr = 0x05, + .reset = 0x80, + .num_gpios = 8, + .gpio_out_base = HTCPLD_BASE(2, 0), + .gpio_in_base = HTCPLD_BASE(6, 0), + .irq_base = HTCPLD_IRQ(0, 0), + .num_irqs = 8, + }, + [3] = { + .addr = 0x06, + .reset = 0x40, + .num_gpios = 8, + .gpio_out_base = HTCPLD_BASE(3, 0), + .gpio_in_base = HTCPLD_BASE(7, 0), + .irq_base = HTCPLD_IRQ(1, 0), + .num_irqs = 8, + }, +}; + +struct htcpld_core_platform_data htcpld_pfdata = { + .int_reset_gpio_hi = HTCPLD_GPIO_INT_RESET_HI, + .int_reset_gpio_lo = HTCPLD_GPIO_INT_RESET_LO, + .i2c_adapter_id = 1, + + .chip = htcpld_chips, + .num_chip = ARRAY_SIZE(htcpld_chips), +}; + +static struct platform_device htcpld_device = { + .name = "i2c-htcpld", + .id = -1, + .resource = htcpld_resources, + .num_resources = ARRAY_SIZE(htcpld_resources), + .dev = { + .platform_data = &htcpld_pfdata, + }, +}; + +/* USB Device */ +static struct omap_usb_config htcherald_usb_config __initdata = { + .otg = 0, + .register_host = 0, + .register_dev = 1, + .hmc_mode = 4, + .pins[0] = 2, +}; + +/* LCD Device resources */ +static struct omap_lcd_config htcherald_lcd_config __initdata = { + .ctrl_name = "internal", +}; + +static struct omap_board_config_kernel htcherald_config[] __initdata = { + { OMAP_TAG_LCD, &htcherald_lcd_config }, +}; + +static struct platform_device lcd_device = { + .name = "lcd_htcherald", + .id = -1, +}; + +/* MMC Card */ +#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) +static struct omap_mmc_platform_data htc_mmc1_data = { + .nr_slots = 1, + .switch_slot = NULL, + .slots[0] = { + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, + .name = "mmcblk", + .nomux = 1, + .wires = 4, + .switch_pin = -1, + }, +}; + +static struct omap_mmc_platform_data *htc_mmc_data[1]; +#endif + + +/* Platform devices for the Herald */ +static struct platform_device *devices[] __initdata = { + &kp_device, + &lcd_device, + &htcpld_device, + &gpio_leds_device, + &herald_gpiokeys_device, +}; + +/* + * Touchscreen + */ +static const struct ads7846_platform_data htcherald_ts_platform_data = { + .model = 7846, + .keep_vref_on = 1, + .x_plate_ohms = 496, + .gpio_pendown = HTCHERALD_GPIO_TS, + .pressure_max = 10000, + .pressure_min = 5000, + .x_min = 528, + .x_max = 3760, + .y_min = 624, + .y_max = 3760, +}; + +static struct spi_board_info __initdata htcherald_spi_board_info[] = { + { + .modalias = "ads7846", + .platform_data = &htcherald_ts_platform_data, + .irq = OMAP_GPIO_IRQ(HTCHERALD_GPIO_TS), + .max_speed_hz = 2500000, + .bus_num = 2, + .chip_select = 1, + } +}; + +/* + * Init functions from here on + */ + +static void __init htcherald_lcd_init(void) +{ + u32 reg; + unsigned int tries = 200; + + /* disable controller if active */ + reg = omap_readl(OMAP_LCDC_CONTROL); + if (reg & OMAP_LCDC_CTRL_LCD_EN) { + reg &= ~OMAP_LCDC_CTRL_LCD_EN; + omap_writel(reg, OMAP_LCDC_CONTROL); + + /* wait for end of frame */ + while (!(omap_readl(OMAP_LCDC_STATUS) & OMAP_LCDC_STAT_DONE)) { + tries--; + if (!tries) + break; + } + if (!tries) + printk(KERN_WARNING "Timeout waiting for end of frame " + "-- LCD may not be available\n"); + + /* turn off DMA */ + reg = omap_readw(OMAP_DMA_LCD_CCR); + reg &= ~(1 << 7); + omap_writew(reg, OMAP_DMA_LCD_CCR); + + reg = omap_readw(OMAP_DMA_LCD_CTRL); + reg &= ~(1 << 8); + omap_writew(reg, OMAP_DMA_LCD_CTRL); + } +} + +static void __init htcherald_map_io(void) +{ + omap1_map_common_io(); + + /* + * The LCD panel must be disabled and DMA turned off here, as doing + * it later causes the LCD never to reinitialize. + */ + htcherald_lcd_init(); + + printk(KERN_INFO "htcherald_map_io done.\n"); +} + +static void __init htcherald_disable_watchdog(void) +{ + /* Disable watchdog if running */ + if (omap_readl(OMAP_WDT_TIMER_MODE) & 0x8000) { + /* + * disable a potentially running watchdog timer before + * it kills us. + */ + printk(KERN_WARNING "OMAP850 Watchdog seems to be activated, disabling it for now.\n"); + omap_writel(0xF5, OMAP_WDT_TIMER_MODE); + omap_writel(0xA0, OMAP_WDT_TIMER_MODE); + } +} + +#define HTCHERALD_GPIO_USB_EN1 33 +#define HTCHERALD_GPIO_USB_EN2 73 +#define HTCHERALD_GPIO_USB_DM 35 +#define HTCHERALD_GPIO_USB_DP 36 + +static void __init htcherald_usb_enable(void) +{ + unsigned int tries = 20; + unsigned int value = 0; + + /* Request the GPIOs we need to control here */ + if (gpio_request(HTCHERALD_GPIO_USB_EN1, "herald_usb") < 0) + goto err1; + + if (gpio_request(HTCHERALD_GPIO_USB_EN2, "herald_usb") < 0) + goto err2; + + if (gpio_request(HTCHERALD_GPIO_USB_DM, "herald_usb") < 0) + goto err3; + + if (gpio_request(HTCHERALD_GPIO_USB_DP, "herald_usb") < 0) + goto err4; + + /* force USB_EN GPIO to 0 */ + do { + /* output low */ + gpio_direction_output(HTCHERALD_GPIO_USB_EN1, 0); + } while ((value = gpio_get_value(HTCHERALD_GPIO_USB_EN1)) == 1 && + --tries); + + if (value == 1) + printk(KERN_WARNING "Unable to reset USB, trying to continue\n"); + + gpio_direction_output(HTCHERALD_GPIO_USB_EN2, 0); /* output low */ + gpio_direction_input(HTCHERALD_GPIO_USB_DM); /* input */ + gpio_direction_input(HTCHERALD_GPIO_USB_DP); /* input */ + + goto done; + +err4: + gpio_free(HTCHERALD_GPIO_USB_DM); +err3: + gpio_free(HTCHERALD_GPIO_USB_EN2); +err2: + gpio_free(HTCHERALD_GPIO_USB_EN1); +err1: + printk(KERN_ERR "Unabled to request GPIO for USB\n"); +done: + printk(KERN_INFO "USB setup complete.\n"); +} + +static void __init htcherald_init(void) +{ + printk(KERN_INFO "HTC Herald init.\n"); + + /* Do board initialization before we register all the devices */ + omap_board_config = htcherald_config; + omap_board_config_size = ARRAY_SIZE(htcherald_config); + platform_add_devices(devices, ARRAY_SIZE(devices)); + + htcherald_disable_watchdog(); + + htcherald_usb_enable(); + omap1_usb_init(&htcherald_usb_config); + + spi_register_board_info(htcherald_spi_board_info, + ARRAY_SIZE(htcherald_spi_board_info)); + + omap_register_i2c_bus(1, 100, NULL, 0); + +#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) + htc_mmc_data[0] = &htc_mmc1_data; + omap1_init_mmc(htc_mmc_data, 1); +#endif +} + +static void __init htcherald_init_irq(void) +{ + printk(KERN_INFO "htcherald_init_irq.\n"); + omap1_init_common_hw(); + omap_init_irq(); +} + +MACHINE_START(HERALD, "HTC Herald") + /* Maintainer: Cory Maccarrone <darkstar6262@gmail.com> */ + /* Maintainer: wing-linux.sourceforge.net */ + .boot_params = 0x10000100, + .map_io = htcherald_map_io, + .reserve = omap_reserve, + .init_irq = htcherald_init_irq, + .init_machine = htcherald_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 2fd98260ea49..a36e6742bf9b 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -22,37 +22,38 @@ #include <linux/delay.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/input.h> +#include <linux/smc91x.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <asm/mach/flash.h> #include <asm/mach/map.h> -#include <mach/mux.h> -#include <mach/fpga.h> +#include <plat/mux.h> +#include <plat/flash.h> +#include <plat/fpga.h> #include <mach/gpio.h> -#include <mach/tc.h> -#include <mach/usb.h> -#include <mach/keypad.h> -#include <mach/common.h> -#include <mach/mmc.h> +#include <plat/tc.h> +#include <plat/usb.h> +#include <plat/keypad.h> +#include <plat/common.h> +#include <plat/mmc.h> /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define INNOVATOR1610_ETHR_START 0x04000300 -static int innovator_keymap[] = { +static const unsigned int innovator_keymap[] = { KEY(0, 0, KEY_F1), - KEY(0, 3, KEY_DOWN), + KEY(3, 0, KEY_DOWN), KEY(1, 1, KEY_F2), - KEY(1, 2, KEY_RIGHT), - KEY(2, 0, KEY_F3), - KEY(2, 1, KEY_F4), + KEY(2, 1, KEY_RIGHT), + KEY(0, 2, KEY_F3), + KEY(1, 2, KEY_F4), KEY(2, 2, KEY_UP), - KEY(3, 2, KEY_ENTER), + KEY(2, 3, KEY_ENTER), KEY(3, 3, KEY_LEFT), - 0 }; static struct mtd_partition innovator_partitions[] = { @@ -93,9 +94,9 @@ static struct mtd_partition innovator_partitions[] = { } }; -static struct flash_platform_data innovator_flash_data = { - .map_name = "cfi_probe", +static struct physmap_flash_data innovator_flash_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = innovator_partitions, .nr_parts = ARRAY_SIZE(innovator_partitions), }; @@ -107,7 +108,7 @@ static struct resource innovator_flash_resource = { }; static struct platform_device innovator_flash_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &innovator_flash_data, @@ -124,11 +125,15 @@ static struct resource innovator_kp_resources[] = { }, }; +static const struct matrix_keymap_data innovator_keymap_data = { + .keymap = innovator_keymap, + .keymap_size = ARRAY_SIZE(innovator_keymap), +}; + static struct omap_kp_platform_data innovator_kp_data = { .rows = 8, .cols = 8, - .keymap = innovator_keymap, - .keymapsize = ARRAY_SIZE(innovator_keymap), + .keymap_data = &innovator_keymap_data, .delay = 4, }; @@ -142,6 +147,11 @@ static struct platform_device innovator_kp_device = { .resource = innovator_kp_resources, }; +static struct smc91x_platdata innovator_smc91x_info = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, + .leda = RPC_LED_100_10, + .ledb = RPC_LED_TX_RX, +}; #ifdef CONFIG_ARCH_OMAP15XX @@ -175,6 +185,9 @@ static struct resource innovator1510_smc91x_resources[] = { static struct platform_device innovator1510_smc91x_device = { .name = "smc91x", .id = 0, + .dev = { + .platform_data = &innovator_smc91x_info, + }, .num_resources = ARRAY_SIZE(innovator1510_smc91x_resources), .resource = innovator1510_smc91x_resources, }; @@ -241,6 +254,9 @@ static struct resource innovator1610_smc91x_resources[] = { static struct platform_device innovator1610_smc91x_device = { .name = "smc91x", .id = 0, + .dev = { + .platform_data = &innovator_smc91x_info, + }, .num_resources = ARRAY_SIZE(innovator1610_smc91x_resources), .resource = innovator1610_smc91x_resources, }; @@ -277,13 +293,6 @@ static void __init innovator_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); -#ifdef CONFIG_ARCH_OMAP15XX - if (cpu_is_omap1510()) { - omap1510_fpga_init_irq(); - } -#endif - innovator_init_smc91x(); } #ifdef CONFIG_ARCH_OMAP15XX @@ -368,19 +377,38 @@ static inline void innovator_mmc_init(void) } #endif -static struct omap_uart_config innovator_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel innovator_config[] = { { OMAP_TAG_LCD, NULL }, - { OMAP_TAG_UART, &innovator_uart_config }, }; static void __init innovator_init(void) { + if (cpu_is_omap1510()) + omap1510_fpga_init_irq(); + innovator_init_smc91x(); + #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap1510()) { + unsigned char reg; + + /* mux pins for uarts */ + omap_cfg_reg(UART1_TX); + omap_cfg_reg(UART1_RTS); + omap_cfg_reg(UART2_TX); + omap_cfg_reg(UART2_RTS); + omap_cfg_reg(UART3_TX); + omap_cfg_reg(UART3_RX); + + reg = fpga_read(OMAP1510_FPGA_POWER); + reg |= OMAP1510_FPGA_PCR_COM1_EN; + fpga_write(reg, OMAP1510_FPGA_POWER); + udelay(10); + + reg = fpga_read(OMAP1510_FPGA_POWER); + reg |= OMAP1510_FPGA_PCR_COM2_EN; + fpga_write(reg, OMAP1510_FPGA_POWER); + udelay(10); + platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices)); spi_register_board_info(innovator1510_boardinfo, ARRAY_SIZE(innovator1510_boardinfo)); @@ -394,13 +422,13 @@ static void __init innovator_init(void) #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap1510()) { - omap_usb_init(&innovator1510_usb_config); + omap1_usb_init(&innovator1510_usb_config); innovator_config[1].data = &innovator1510_lcd_config; } #endif #ifdef CONFIG_ARCH_OMAP16XX if (cpu_is_omap1610()) { - omap_usb_init(&h2_usb_config); + omap1_usb_init(&h2_usb_config); innovator_config[1].data = &innovator1610_lcd_config; } #endif @@ -431,10 +459,9 @@ static void __init innovator_map_io(void) MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = innovator_map_io, + .reserve = omap_reserve, .init_irq = innovator_init_irq, .init_machine = innovator_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index e70fc7c66bbb..d21f09dc78f4 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -14,6 +14,7 @@ #include <linux/platform_device.h> #include <linux/input.h> #include <linux/clk.h> +#include <linux/omapfb.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> @@ -26,18 +27,15 @@ #include <asm/mach/map.h> #include <mach/gpio.h> -#include <mach/mux.h> -#include <mach/usb.h> -#include <mach/board.h> -#include <mach/keypad.h> -#include <mach/common.h> -#include <mach/dsp_common.h> -#include <mach/omapfb.h> -#include <mach/hwa742.h> -#include <mach/lcd_mipid.h> -#include <mach/mmc.h> -#include <mach/usb.h> -#include <mach/clock.h> +#include <plat/mux.h> +#include <plat/usb.h> +#include <plat/board.h> +#include <plat/keypad.h> +#include <plat/common.h> +#include <plat/hwa742.h> +#include <plat/lcd_mipid.h> +#include <plat/mmc.h> +#include <plat/clock.h> #define ADS7846_PENDOWN_GPIO 15 @@ -56,19 +54,18 @@ static void __init omap_nokia770_init_irq(void) omap_init_irq(); } -static int nokia770_keymap[] = { - KEY(0, 1, GROUP_0 | KEY_UP), - KEY(0, 2, GROUP_1 | KEY_F5), - KEY(1, 0, GROUP_0 | KEY_LEFT), +static const unsigned int nokia770_keymap[] = { + KEY(1, 0, GROUP_0 | KEY_UP), + KEY(2, 0, GROUP_1 | KEY_F5), + KEY(0, 1, GROUP_0 | KEY_LEFT), KEY(1, 1, GROUP_0 | KEY_ENTER), - KEY(1, 2, GROUP_0 | KEY_RIGHT), - KEY(2, 0, GROUP_1 | KEY_ESC), - KEY(2, 1, GROUP_0 | KEY_DOWN), + KEY(2, 1, GROUP_0 | KEY_RIGHT), + KEY(0, 2, GROUP_1 | KEY_ESC), + KEY(1, 2, GROUP_0 | KEY_DOWN), KEY(2, 2, GROUP_1 | KEY_F4), - KEY(3, 0, GROUP_2 | KEY_F7), - KEY(3, 1, GROUP_2 | KEY_F8), - KEY(3, 2, GROUP_2 | KEY_F6), - 0 + KEY(0, 3, GROUP_2 | KEY_F7), + KEY(1, 3, GROUP_2 | KEY_F8), + KEY(2, 3, GROUP_2 | KEY_F6), }; static struct resource nokia770_kp_resources[] = { @@ -79,11 +76,15 @@ static struct resource nokia770_kp_resources[] = { }, }; +static const struct matrix_keymap_data nokia770_keymap_data = { + .keymap = nokia770_keymap, + .keymap_size = ARRAY_SIZE(nokia770_keymap), +}; + static struct omap_kp_platform_data nokia770_kp_data = { .rows = 8, .cols = 8, - .keymap = nokia770_keymap, - .keymapsize = ARRAY_SIZE(nokia770_keymap), + .keymap_data = &nokia770_keymap_data, .delay = 4, }; @@ -205,9 +206,11 @@ static int nokia770_mmc_get_cover_state(struct device *dev, int slot) static struct omap_mmc_platform_data nokia770_mmc2_data = { .nr_slots = 1, .dma_mask = 0xffffffff, + .max_freq = 12000000, .slots[0] = { .set_power = nokia770_mmc_set_power, .get_cover_state = nokia770_mmc_get_cover_state, + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, .name = "mmcblk", }, }; @@ -241,151 +244,17 @@ static inline void nokia770_mmc_init(void) } #endif -#if defined(CONFIG_OMAP_DSP) -/* - * audio power control - */ -#define HEADPHONE_GPIO 14 -#define AMPLIFIER_CTRL_GPIO 58 - -static struct clk *dspxor_ck; -static DEFINE_MUTEX(audio_pwr_lock); -/* - * audio_pwr_state - * +--+-------------------------+---------------------------------------+ - * |-1|down |power-up request -> 0 | - * +--+-------------------------+---------------------------------------+ - * | 0|up |power-down(1) request -> 1 | - * | | |power-down(2) request -> (ignore) | - * +--+-------------------------+---------------------------------------+ - * | 1|up, |power-up request -> 0 | - * | |received down(1) request |power-down(2) request -> -1 | - * +--+-------------------------+---------------------------------------+ - */ -static int audio_pwr_state = -1; - -static inline void aic23_power_up(void) -{ -} -static inline void aic23_power_down(void) -{ -} - -/* - * audio_pwr_up / down should be called under audio_pwr_lock - */ -static void nokia770_audio_pwr_up(void) -{ - clk_enable(dspxor_ck); - - /* Turn on codec */ - aic23_power_up(); - - if (gpio_get_value(HEADPHONE_GPIO)) - /* HP not connected, turn on amplifier */ - gpio_set_value(AMPLIFIER_CTRL_GPIO, 1); - else - /* HP connected, do not turn on amplifier */ - printk("HP connected\n"); -} - -static void codec_delayed_power_down(struct work_struct *work) -{ - mutex_lock(&audio_pwr_lock); - if (audio_pwr_state == -1) - aic23_power_down(); - clk_disable(dspxor_ck); - mutex_unlock(&audio_pwr_lock); -} - -static DECLARE_DELAYED_WORK(codec_power_down_work, codec_delayed_power_down); - -static void nokia770_audio_pwr_down(void) -{ - /* Turn off amplifier */ - gpio_set_value(AMPLIFIER_CTRL_GPIO, 0); - - /* Turn off codec: schedule delayed work */ - schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */ -} - -static int -nokia770_audio_pwr_up_request(struct dsp_kfunc_device *kdev, int stage) -{ - mutex_lock(&audio_pwr_lock); - if (audio_pwr_state == -1) - nokia770_audio_pwr_up(); - /* force audio_pwr_state = 0, even if it was 1. */ - audio_pwr_state = 0; - mutex_unlock(&audio_pwr_lock); - return 0; -} - -static int -nokia770_audio_pwr_down_request(struct dsp_kfunc_device *kdev, int stage) -{ - mutex_lock(&audio_pwr_lock); - switch (stage) { - case 1: - if (audio_pwr_state == 0) - audio_pwr_state = 1; - break; - case 2: - if (audio_pwr_state == 1) { - nokia770_audio_pwr_down(); - audio_pwr_state = -1; - } - break; - } - mutex_unlock(&audio_pwr_lock); - return 0; -} - -static struct dsp_kfunc_device nokia770_audio_device = { - .name = "audio", - .type = DSP_KFUNC_DEV_TYPE_AUDIO, - .enable = nokia770_audio_pwr_up_request, - .disable = nokia770_audio_pwr_down_request, -}; - -static __init int omap_dsp_init(void) -{ - int ret; - - dspxor_ck = clk_get(0, "dspxor_ck"); - if (IS_ERR(dspxor_ck)) { - printk(KERN_ERR "couldn't acquire dspxor_ck\n"); - return PTR_ERR(dspxor_ck); - } - - ret = dsp_kfunc_device_register(&nokia770_audio_device); - if (ret) { - printk(KERN_ERR - "KFUNC device registration faild: %s\n", - nokia770_audio_device.name); - goto out; - } - return 0; - out: - return ret; -} -#else -#define omap_dsp_init() do {} while (0) -#endif /* CONFIG_OMAP_DSP */ - static void __init omap_nokia770_init(void) { platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); spi_register_board_info(nokia770_spi_board_info, ARRAY_SIZE(nokia770_spi_board_info)); - omap_gpio_init(); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); - omap_dsp_init(); hwa742_dev_init(); ads7846_dev_init(); mipid_dev_init(); - omap_usb_init(&nokia770_usb_config); + omap1_usb_init(&nokia770_usb_config); nokia770_mmc_init(); } @@ -395,10 +264,9 @@ static void __init omap_nokia770_map_io(void) } MACHINE_START(NOKIA770, "Nokia 770") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_nokia770_map_io, + .reserve = omap_reserve, .init_irq = omap_nokia770_init_irq, .init_machine = omap_nokia770_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index cf3247b15f87..7c5e2112c776 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -33,9 +33,11 @@ #include <linux/irq.h> #include <linux/i2c.h> #include <linux/leds.h> +#include <linux/smc91x.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/i2c/tps65010.h> @@ -45,12 +47,12 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <asm/mach/flash.h> -#include <mach/usb.h> -#include <mach/mux.h> -#include <mach/tc.h> -#include <mach/common.h> +#include <plat/flash.h> +#include <plat/usb.h> +#include <plat/mux.h> +#include <plat/tc.h> +#include <plat/common.h> /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ #define OMAP_OSK_ETHR_START 0x04800300 @@ -93,9 +95,9 @@ static struct mtd_partition osk_partitions[] = { } }; -static struct flash_platform_data osk_flash_data = { - .map_name = "cfi_probe", +static struct physmap_flash_data osk_flash_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = osk_partitions, .nr_parts = ARRAY_SIZE(osk_partitions), }; @@ -106,7 +108,7 @@ static struct resource osk_flash_resource = { }; static struct platform_device osk5912_flash_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &osk_flash_data, @@ -115,6 +117,12 @@ static struct platform_device osk5912_flash_device = { .resource = &osk_flash_resource, }; +static struct smc91x_platdata osk5912_smc91x_info = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, + .leda = RPC_LED_100_10, + .ledb = RPC_LED_TX_RX, +}; + static struct resource osk5912_smc91x_resources[] = { [0] = { .start = OMAP_OSK_ETHR_START, /* Physical */ @@ -131,6 +139,9 @@ static struct resource osk5912_smc91x_resources[] = { static struct platform_device osk5912_smc91x_device = { .name = "smc91x", .id = -1, + .dev = { + .platform_data = &osk5912_smc91x_info, + }, .num_resources = ARRAY_SIZE(osk5912_smc91x_resources), .resource = osk5912_smc91x_resources, }; @@ -272,9 +283,6 @@ static void __init osk_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); - osk_init_smc91x(); - osk_init_cf(); } static struct omap_usb_config osk_usb_config __initdata = { @@ -293,10 +301,6 @@ static struct omap_usb_config osk_usb_config __initdata = { .pins[0] = 2, }; -static struct omap_uart_config osk_uart_config __initdata = { - .enabled_uarts = (1 << 0), -}; - #ifdef CONFIG_OMAP_OSK_MISTRAL static struct omap_lcd_config osk_lcd_config __initdata = { .ctrl_name = "internal", @@ -304,7 +308,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = { #endif static struct omap_board_config_kernel osk_config[] __initdata = { - { OMAP_TAG_UART, &osk_uart_config }, #ifdef CONFIG_OMAP_OSK_MISTRAL { OMAP_TAG_LCD, &osk_lcd_config }, #endif @@ -317,7 +320,7 @@ static struct omap_board_config_kernel osk_config[] __initdata = { #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> -#include <mach/keypad.h> +#include <plat/keypad.h> static struct at24_platform_data at24c04 = { .byte_len = SZ_4K / 8, @@ -335,25 +338,28 @@ static struct i2c_board_info __initdata mistral_i2c_board_info[] = { */ }; -static const int osk_keymap[] = { +static const unsigned int osk_keymap[] = { /* KEY(col, row, code) */ KEY(0, 0, KEY_F1), /* SW4 */ - KEY(0, 3, KEY_UP), /* (sw2/up) */ + KEY(3, 0, KEY_UP), /* (sw2/up) */ KEY(1, 1, KEY_LEFTCTRL), /* SW5 */ - KEY(1, 2, KEY_LEFT), /* (sw2/left) */ - KEY(2, 0, KEY_SPACE), /* SW3 */ - KEY(2, 1, KEY_ESC), /* SW6 */ + KEY(2, 1, KEY_LEFT), /* (sw2/left) */ + KEY(0, 2, KEY_SPACE), /* SW3 */ + KEY(1, 2, KEY_ESC), /* SW6 */ KEY(2, 2, KEY_DOWN), /* (sw2/down) */ - KEY(3, 2, KEY_ENTER), /* (sw2/select) */ + KEY(2, 3, KEY_ENTER), /* (sw2/select) */ KEY(3, 3, KEY_RIGHT), /* (sw2/right) */ - 0 +}; + +static const struct matrix_keymap_data osk_keymap_data = { + .keymap = osk_keymap, + .keymap_size = ARRAY_SIZE(osk_keymap), }; static struct omap_kp_platform_data osk_kp_data = { .rows = 8, .cols = 8, - .keymap = (int *) osk_keymap, - .keymapsize = ARRAY_SIZE(osk_keymap), + .keymap_data = &osk_keymap_data, .delay = 9, }; @@ -535,6 +541,9 @@ static void __init osk_init(void) { u32 l; + osk_init_smc91x(); + osk_init_cf(); + /* Workaround for wrong CS3 (NOR flash) timing * There are some U-Boot versions out there which configure * wrong CS3 memory timings. This mainly leads to CRC @@ -554,7 +563,7 @@ static void __init osk_init(void) l |= (3 << 1); omap_writel(l, USB_TRANSCEIVER_CTRL); - omap_usb_init(&osk_usb_config); + omap1_usb_init(&osk_usb_config); /* irq for tps65010 chip */ /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */ @@ -574,10 +583,9 @@ static void __init osk_map_io(void) MACHINE_START(OMAP_OSK, "TI-OSK") /* Maintainer: Dirk Behme <dirk.behme@de.bosch.com> */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = osk_map_io, + .reserve = omap_reserve, .init_irq = osk_init_irq, .init_machine = osk_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 886b4c0569bd..fb51ce6123d8 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -23,6 +23,7 @@ #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/spi/spi.h> #include <linux/interrupt.h> #include <linux/apm-emulation.h> @@ -31,17 +32,17 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <asm/mach/flash.h> #include <mach/gpio.h> -#include <mach/mux.h> -#include <mach/usb.h> -#include <mach/tc.h> -#include <mach/dma.h> -#include <mach/board.h> -#include <mach/irda.h> -#include <mach/keypad.h> -#include <mach/common.h> +#include <plat/flash.h> +#include <plat/mux.h> +#include <plat/usb.h> +#include <plat/tc.h> +#include <plat/dma.h> +#include <plat/board.h> +#include <plat/irda.h> +#include <plat/keypad.h> +#include <plat/common.h> #define PALMTE_USBDETECT_GPIO 0 #define PALMTE_USB_OR_DC_GPIO 1 @@ -62,28 +63,31 @@ static void __init omap_palmte_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); } -static const int palmte_keymap[] = { +static const unsigned int palmte_keymap[] = { KEY(0, 0, KEY_F1), /* Calendar */ - KEY(0, 1, KEY_F2), /* Contacts */ - KEY(0, 2, KEY_F3), /* Tasks List */ - KEY(0, 3, KEY_F4), /* Note Pad */ - KEY(0, 4, KEY_POWER), - KEY(1, 0, KEY_LEFT), + KEY(1, 0, KEY_F2), /* Contacts */ + KEY(2, 0, KEY_F3), /* Tasks List */ + KEY(3, 0, KEY_F4), /* Note Pad */ + KEY(4, 0, KEY_POWER), + KEY(0, 1, KEY_LEFT), KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_UP), - KEY(1, 3, KEY_RIGHT), - KEY(1, 4, KEY_ENTER), - 0, + KEY(2, 1, KEY_UP), + KEY(3, 1, KEY_RIGHT), + KEY(4, 1, KEY_ENTER), +}; + +static const struct matrix_keymap_data palmte_keymap_data = { + .keymap = palmte_keymap, + .keymap_size = ARRAY_SIZE(palmte_keymap), }; static struct omap_kp_platform_data palmte_kp_data = { .rows = 8, .cols = 8, - .keymap = (int *) palmte_keymap, - .rep = 1, + .keymap_data = &palmte_keymap_data, + .rep = true, .delay = 12, }; @@ -126,9 +130,9 @@ static struct mtd_partition palmte_rom_partitions[] = { }, }; -static struct flash_platform_data palmte_rom_data = { - .map_name = "map_rom", +static struct physmap_flash_data palmte_rom_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = palmte_rom_partitions, .nr_parts = ARRAY_SIZE(palmte_rom_partitions), }; @@ -140,7 +144,7 @@ static struct resource palmte_rom_resource = { }; static struct platform_device palmte_rom_device = { - .name = "omapflash", + .name = "physmap-flash", .id = -1, .dev = { .platform_data = &palmte_rom_data, @@ -212,97 +216,8 @@ static struct omap_lcd_config palmte_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_uart_config palmte_uart_config __initdata = { - .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), -}; - -#ifdef CONFIG_APM -/* - * Values measured in 10 minute intervals averaged over 10 samples. - * May differ slightly from device to device but should be accurate - * enough to give basic idea of battery life left and trigger - * potential alerts. - */ -static const int palmte_battery_sample[] = { - 2194, 2157, 2138, 2120, - 2104, 2089, 2075, 2061, - 2048, 2038, 2026, 2016, - 2008, 1998, 1989, 1980, - 1970, 1958, 1945, 1928, - 1910, 1888, 1860, 1827, - 1791, 1751, 1709, 1656, -}; - -#define INTERVAL 10 -#define BATTERY_HIGH_TRESHOLD 66 -#define BATTERY_LOW_TRESHOLD 33 - -static void palmte_get_power_status(struct apm_power_info *info, int *battery) -{ - int charging, batt, hi, lo, mid; - - charging = !gpio_get_value(PALMTE_DC_GPIO); - batt = battery[0]; - if (charging) - batt -= 60; - - hi = ARRAY_SIZE(palmte_battery_sample); - lo = 0; - - info->battery_flag = 0; - info->units = APM_UNITS_MINS; - - if (batt > palmte_battery_sample[lo]) { - info->battery_life = 100; - info->time = INTERVAL * ARRAY_SIZE(palmte_battery_sample); - } else if (batt <= palmte_battery_sample[hi - 1]) { - info->battery_life = 0; - info->time = 0; - } else { - while (hi > lo + 1) { - mid = (hi + lo) >> 1; - if (batt <= palmte_battery_sample[mid]) - lo = mid; - else - hi = mid; - } - - mid = palmte_battery_sample[lo] - palmte_battery_sample[hi]; - hi = palmte_battery_sample[lo] - batt; - info->battery_life = 100 - (100 * lo + 100 * hi / mid) / - ARRAY_SIZE(palmte_battery_sample); - info->time = INTERVAL * (ARRAY_SIZE(palmte_battery_sample) - - lo) - INTERVAL * hi / mid; - } - - if (charging) { - info->ac_line_status = APM_AC_ONLINE; - info->battery_status = APM_BATTERY_STATUS_CHARGING; - info->battery_flag |= APM_BATTERY_FLAG_CHARGING; - } else { - info->ac_line_status = APM_AC_OFFLINE; - if (info->battery_life > BATTERY_HIGH_TRESHOLD) - info->battery_status = APM_BATTERY_STATUS_HIGH; - else if (info->battery_life > BATTERY_LOW_TRESHOLD) - info->battery_status = APM_BATTERY_STATUS_LOW; - else - info->battery_status = APM_BATTERY_STATUS_CRITICAL; - } - - if (info->battery_life > BATTERY_HIGH_TRESHOLD) - info->battery_flag |= APM_BATTERY_FLAG_HIGH; - else if (info->battery_life > BATTERY_LOW_TRESHOLD) - info->battery_flag |= APM_BATTERY_FLAG_LOW; - else - info->battery_flag |= APM_BATTERY_FLAG_CRITICAL; -} -#else -#define palmte_get_power_status NULL -#endif - static struct omap_board_config_kernel palmte_config[] __initdata = { { OMAP_TAG_LCD, &palmte_lcd_config }, - { OMAP_TAG_UART, &palmte_uart_config }, }; static struct spi_board_info palmte_spi_info[] __initdata = { @@ -347,6 +262,14 @@ static void __init palmte_misc_gpio_setup(void) static void __init omap_palmte_init(void) { + /* mux pins for uarts */ + omap_cfg_reg(UART1_TX); + omap_cfg_reg(UART1_RTS); + omap_cfg_reg(UART2_TX); + omap_cfg_reg(UART2_RTS); + omap_cfg_reg(UART3_TX); + omap_cfg_reg(UART3_RX); + omap_board_config = palmte_config; omap_board_config_size = ARRAY_SIZE(palmte_config); @@ -355,7 +278,7 @@ static void __init omap_palmte_init(void) spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); palmte_misc_gpio_setup(); omap_serial_init(); - omap_usb_init(&palmte_usb_config); + omap1_usb_init(&palmte_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); } @@ -365,10 +288,9 @@ static void __init omap_palmte_map_io(void) } MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_palmte_map_io, + .reserve = omap_reserve, .init_irq = omap_palmte_init_irq, .init_machine = omap_palmte_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 4f1b44831d37..f04f2d36e7d3 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -21,24 +21,25 @@ #include <linux/interrupt.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/leds.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <asm/mach/flash.h> -#include <mach/led.h> +#include <plat/led.h> #include <mach/gpio.h> -#include <mach/mux.h> -#include <mach/usb.h> -#include <mach/dma.h> -#include <mach/tc.h> -#include <mach/board.h> -#include <mach/irda.h> -#include <mach/keypad.h> -#include <mach/common.h> +#include <plat/flash.h> +#include <plat/mux.h> +#include <plat/usb.h> +#include <plat/dma.h> +#include <plat/tc.h> +#include <plat/board.h> +#include <plat/irda.h> +#include <plat/keypad.h> +#include <plat/common.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> @@ -50,19 +51,18 @@ #define PALMTT_MMC_WP_GPIO 8 #define PALMTT_HDQ_GPIO 11 -static int palmtt_keymap[] = { +static const unsigned int palmtt_keymap[] = { KEY(0, 0, KEY_ESC), - KEY(0, 1, KEY_SPACE), - KEY(0, 2, KEY_LEFTCTRL), - KEY(0, 3, KEY_TAB), - KEY(0, 4, KEY_ENTER), - KEY(1, 0, KEY_LEFT), + KEY(1, 0, KEY_SPACE), + KEY(2, 0, KEY_LEFTCTRL), + KEY(3, 0, KEY_TAB), + KEY(4, 0, KEY_ENTER), + KEY(0, 1, KEY_LEFT), KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_UP), - KEY(1, 3, KEY_RIGHT), - KEY(2, 0, KEY_SLEEP), - KEY(2, 4, KEY_Y), - 0 + KEY(2, 1, KEY_UP), + KEY(3, 1, KEY_RIGHT), + KEY(0, 2, KEY_SLEEP), + KEY(4, 2, KEY_Y), }; static struct mtd_partition palmtt_partitions[] = { @@ -104,9 +104,9 @@ static struct mtd_partition palmtt_partitions[] = { } }; -static struct flash_platform_data palmtt_flash_data = { - .map_name = "cfi_probe", +static struct physmap_flash_data palmtt_flash_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = palmtt_partitions, .nr_parts = ARRAY_SIZE(palmtt_partitions), }; @@ -118,7 +118,7 @@ static struct resource palmtt_flash_resource = { }; static struct platform_device palmtt_flash_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &palmtt_flash_data, @@ -135,10 +135,15 @@ static struct resource palmtt_kp_resources[] = { }, }; +static const struct matrix_keymap_data palmtt_keymap_data = { + .keymap = palmtt_keymap, + .keymap_size = ARRAY_SIZE(palmtt_keymap), +}; + static struct omap_kp_platform_data palmtt_kp_data = { .rows = 6, .cols = 3, - .keymap = palmtt_keymap, + .keymap_data = &palmtt_keymap_data, }; static struct platform_device palmtt_kp_device = { @@ -274,13 +279,8 @@ static struct omap_lcd_config palmtt_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_uart_config palmtt_uart_config __initdata = { - .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), -}; - static struct omap_board_config_kernel palmtt_config[] __initdata = { { OMAP_TAG_LCD, &palmtt_lcd_config }, - { OMAP_TAG_UART, &palmtt_uart_config }, }; static void __init omap_mpu_wdt_mode(int mode) { @@ -294,6 +294,14 @@ static void __init omap_mpu_wdt_mode(int mode) { static void __init omap_palmtt_init(void) { + /* mux pins for uarts */ + omap_cfg_reg(UART1_TX); + omap_cfg_reg(UART1_RTS); + omap_cfg_reg(UART2_TX); + omap_cfg_reg(UART2_RTS); + omap_cfg_reg(UART3_TX); + omap_cfg_reg(UART3_RX); + omap_mpu_wdt_mode(0); omap_board_config = palmtt_config; @@ -303,7 +311,7 @@ static void __init omap_palmtt_init(void) spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); omap_serial_init(); - omap_usb_init(&palmtt_usb_config); + omap1_usb_init(&palmtt_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); } @@ -313,10 +321,9 @@ static void __init omap_palmtt_map_io(void) } MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_palmtt_map_io, + .reserve = omap_reserve, .init_irq = omap_palmtt_init_irq, .init_machine = omap_palmtt_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 9a55c3c58218..d7bbbe721a75 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -25,23 +25,24 @@ #include <linux/interrupt.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <asm/mach/flash.h> #include <mach/gpio.h> -#include <mach/mux.h> -#include <mach/usb.h> -#include <mach/dma.h> -#include <mach/tc.h> -#include <mach/board.h> -#include <mach/irda.h> -#include <mach/keypad.h> -#include <mach/common.h> -#include <mach/omap-alsa.h> +#include <plat/flash.h> +#include <plat/mux.h> +#include <plat/usb.h> +#include <plat/dma.h> +#include <plat/tc.h> +#include <plat/board.h> +#include <plat/irda.h> +#include <plat/keypad.h> +#include <plat/common.h> +#include <plat/omap-alsa.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> @@ -61,29 +62,32 @@ omap_palmz71_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); } -static int palmz71_keymap[] = { +static const unsigned int palmz71_keymap[] = { KEY(0, 0, KEY_F1), - KEY(0, 1, KEY_F2), - KEY(0, 2, KEY_F3), - KEY(0, 3, KEY_F4), - KEY(0, 4, KEY_POWER), - KEY(1, 0, KEY_LEFT), + KEY(1, 0, KEY_F2), + KEY(2, 0, KEY_F3), + KEY(3, 0, KEY_F4), + KEY(4, 0, KEY_POWER), + KEY(0, 1, KEY_LEFT), KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_UP), - KEY(1, 3, KEY_RIGHT), - KEY(1, 4, KEY_ENTER), - KEY(2, 0, KEY_CAMERA), - 0, + KEY(2, 1, KEY_UP), + KEY(3, 1, KEY_RIGHT), + KEY(4, 1, KEY_ENTER), + KEY(0, 2, KEY_CAMERA), +}; + +static const struct matrix_keymap_data palmz71_keymap_data = { + .keymap = palmz71_keymap, + .keymap_size = ARRAY_SIZE(palmz71_keymap), }; static struct omap_kp_platform_data palmz71_kp_data = { .rows = 8, .cols = 8, - .keymap = palmz71_keymap, - .rep = 1, + .keymap_data = &palmz71_keymap_data, + .rep = true, .delay = 80, }; @@ -126,10 +130,9 @@ static struct mtd_partition palmz71_rom_partitions[] = { }, }; -static struct flash_platform_data palmz71_rom_data = { - .map_name = "map_rom", - .name = "onboardrom", +static struct physmap_flash_data palmz71_rom_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = palmz71_rom_partitions, .nr_parts = ARRAY_SIZE(palmz71_rom_partitions), }; @@ -141,7 +144,7 @@ static struct resource palmz71_rom_resource = { }; static struct platform_device palmz71_rom_device = { - .name = "omapflash", + .name = "physmap-flash", .id = -1, .dev = { .platform_data = &palmz71_rom_data, @@ -244,13 +247,8 @@ static struct omap_lcd_config palmz71_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_uart_config palmz71_uart_config __initdata = { - .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), -}; - static struct omap_board_config_kernel palmz71_config[] __initdata = { {OMAP_TAG_LCD, &palmz71_lcd_config}, - {OMAP_TAG_UART, &palmz71_uart_config}, }; static irqreturn_t @@ -312,6 +310,14 @@ palmz71_gpio_setup(int early) static void __init omap_palmz71_init(void) { + /* mux pins for uarts */ + omap_cfg_reg(UART1_TX); + omap_cfg_reg(UART1_RTS); + omap_cfg_reg(UART2_TX); + omap_cfg_reg(UART2_RTS); + omap_cfg_reg(UART3_TX); + omap_cfg_reg(UART3_RX); + palmz71_gpio_setup(1); omap_mpu_wdt_mode(0); @@ -322,7 +328,7 @@ omap_palmz71_init(void) spi_register_board_info(palmz71_boardinfo, ARRAY_SIZE(palmz71_boardinfo)); - omap_usb_init(&palmz71_usb_config); + omap1_usb_init(&palmz71_usb_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); palmz71_gpio_setup(0); @@ -335,10 +341,10 @@ omap_palmz71_map_io(void) } MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, - .boot_params = 0x10000100,.map_io = omap_palmz71_map_io, - .init_irq = omap_palmz71_init_irq, - .init_machine = omap_palmz71_init, - .timer = &omap_timer, + .boot_params = 0x10000100, + .map_io = omap_palmz71_map_io, + .reserve = omap_reserve, + .init_irq = omap_palmz71_init_irq, + .init_machine = omap_palmz71_init, + .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 3b9f907aa899..3c8ee8489458 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -18,53 +18,59 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/input.h> +#include <linux/smc91x.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <asm/mach/flash.h> #include <asm/mach/map.h> -#include <mach/tc.h> +#include <plat/tc.h> #include <mach/gpio.h> -#include <mach/mux.h> -#include <mach/fpga.h> -#include <mach/nand.h> -#include <mach/keypad.h> -#include <mach/common.h> -#include <mach/board.h> - -static int p2_keymap[] = { - KEY(0,0,KEY_UP), - KEY(0,1,KEY_RIGHT), - KEY(0,2,KEY_LEFT), - KEY(0,3,KEY_DOWN), - KEY(0,4,KEY_ENTER), - KEY(1,0,KEY_F10), - KEY(1,1,KEY_SEND), - KEY(1,2,KEY_END), - KEY(1,3,KEY_VOLUMEDOWN), - KEY(1,4,KEY_VOLUMEUP), - KEY(1,5,KEY_RECORD), - KEY(2,0,KEY_F9), - KEY(2,1,KEY_3), - KEY(2,2,KEY_6), - KEY(2,3,KEY_9), - KEY(2,4,KEY_KPDOT), - KEY(3,0,KEY_BACK), - KEY(3,1,KEY_2), - KEY(3,2,KEY_5), - KEY(3,3,KEY_8), - KEY(3,4,KEY_0), - KEY(3,5,KEY_KPSLASH), - KEY(4,0,KEY_HOME), - KEY(4,1,KEY_1), - KEY(4,2,KEY_4), - KEY(4,3,KEY_7), - KEY(4,4,KEY_KPASTERISK), - KEY(4,5,KEY_POWER), - 0 +#include <plat/mux.h> +#include <plat/fpga.h> +#include <plat/flash.h> +#include <plat/keypad.h> +#include <plat/common.h> +#include <plat/board.h> + +static const unsigned int p2_keymap[] = { + KEY(0, 0, KEY_UP), + KEY(1, 0, KEY_RIGHT), + KEY(2, 0, KEY_LEFT), + KEY(3, 0, KEY_DOWN), + KEY(4, 0, KEY_ENTER), + KEY(0, 1, KEY_F10), + KEY(1, 1, KEY_SEND), + KEY(2, 1, KEY_END), + KEY(3, 1, KEY_VOLUMEDOWN), + KEY(4, 1, KEY_VOLUMEUP), + KEY(5, 1, KEY_RECORD), + KEY(0, 2, KEY_F9), + KEY(1, 2, KEY_3), + KEY(2, 2, KEY_6), + KEY(3, 2, KEY_9), + KEY(4, 2, KEY_KPDOT), + KEY(0, 3, KEY_BACK), + KEY(1, 3, KEY_2), + KEY(2, 3, KEY_5), + KEY(3, 3, KEY_8), + KEY(4, 3, KEY_0), + KEY(5, 3, KEY_KPSLASH), + KEY(0, 4, KEY_HOME), + KEY(1, 4, KEY_1), + KEY(2, 4, KEY_4), + KEY(3, 4, KEY_7), + KEY(4, 4, KEY_KPASTERISK), + KEY(5, 4, KEY_POWER), +}; + +static struct smc91x_platdata smc91x_info = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, + .leda = RPC_LED_100_10, + .ledb = RPC_LED_TX_RX, }; static struct resource smc91x_resources[] = { @@ -74,7 +80,7 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = INT_730_MPU_EXT_NIRQ, + .start = INT_7XX_MPU_EXT_NIRQ, .end = 0, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, @@ -111,9 +117,9 @@ static struct mtd_partition nor_partitions[] = { }, }; -static struct flash_platform_data nor_data = { - .map_name = "cfi_probe", +static struct physmap_flash_data nor_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = nor_partitions, .nr_parts = ARRAY_SIZE(nor_partitions), }; @@ -125,7 +131,7 @@ static struct resource nor_resource = { }; static struct platform_device nor_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &nor_data, @@ -134,8 +140,40 @@ static struct platform_device nor_device = { .resource = &nor_resource, }; -static struct omap_nand_platform_data nand_data = { - .options = NAND_SAMSUNG_LP_OPTIONS, +static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + unsigned long mask; + + if (cmd == NAND_CMD_NONE) + return; + + mask = (ctrl & NAND_CLE) ? 0x02 : 0; + if (ctrl & NAND_ALE) + mask |= 0x04; + writeb(cmd, (unsigned long)this->IO_ADDR_W | mask); +} + +#define P2_NAND_RB_GPIO_PIN 62 + +static int nand_dev_ready(struct mtd_info *mtd) +{ + return gpio_get_value(P2_NAND_RB_GPIO_PIN); +} + +static const char *part_probes[] = { "cmdlinepart", NULL }; + +static struct platform_nand_data nand_data = { + .chip = { + .nr_chips = 1, + .chip_offset = 0, + .options = NAND_SAMSUNG_LP_OPTIONS, + .part_probe_types = part_probes, + }, + .ctrl = { + .cmd_ctrl = nand_cmd_ctl, + .dev_ready = nand_dev_ready, + }, }; static struct resource nand_resource = { @@ -145,7 +183,7 @@ static struct resource nand_resource = { }; static struct platform_device nand_device = { - .name = "omapnand", + .name = "gen_nand", .id = 0, .dev = { .platform_data = &nand_data, @@ -157,25 +195,32 @@ static struct platform_device nand_device = { static struct platform_device smc91x_device = { .name = "smc91x", .id = 0, + .dev = { + .platform_data = &smc91x_info, + }, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, }; static struct resource kp_resources[] = { [0] = { - .start = INT_730_MPUIO_KEYPAD, - .end = INT_730_MPUIO_KEYPAD, + .start = INT_7XX_MPUIO_KEYPAD, + .end = INT_7XX_MPUIO_KEYPAD, .flags = IORESOURCE_IRQ, }, }; +static const struct matrix_keymap_data p2_keymap_data = { + .keymap = p2_keymap, + .keymap_size = ARRAY_SIZE(p2_keymap), +}; + static struct omap_kp_platform_data kp_data = { .rows = 8, .cols = 8, - .keymap = p2_keymap, - .keymapsize = ARRAY_SIZE(p2_keymap), + .keymap_data = &p2_keymap_data, .delay = 4, - .dbounce = 1, + .dbounce = true, }; static struct platform_device kp_device = { @@ -201,35 +246,46 @@ static struct platform_device *devices[] __initdata = { &lcd_device, }; -#define P2_NAND_RB_GPIO_PIN 62 - -static int nand_dev_ready(struct omap_nand_platform_data *data) -{ - return gpio_get_value(P2_NAND_RB_GPIO_PIN); -} - -static struct omap_uart_config perseus2_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1)), -}; - static struct omap_lcd_config perseus2_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel perseus2_config[] __initdata = { - { OMAP_TAG_UART, &perseus2_uart_config }, { OMAP_TAG_LCD, &perseus2_lcd_config }, }; +static void __init perseus2_init_smc91x(void) +{ + fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); + mdelay(50); + fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, + H2P2_DBG_FPGA_LAN_RESET); + mdelay(50); +} + static void __init omap_perseus2_init(void) { + perseus2_init_smc91x(); + if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); - nand_data.dev_ready = nand_dev_ready; + gpio_direction_input(P2_NAND_RB_GPIO_PIN); omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); + /* Mux pins for keypad */ + omap_cfg_reg(E2_7XX_KBR0); + omap_cfg_reg(J7_7XX_KBR1); + omap_cfg_reg(E1_7XX_KBR2); + omap_cfg_reg(F3_7XX_KBR3); + omap_cfg_reg(D2_7XX_KBR4); + omap_cfg_reg(C2_7XX_KBC0); + omap_cfg_reg(D3_7XX_KBC1); + omap_cfg_reg(E4_7XX_KBC2); + omap_cfg_reg(F4_7XX_KBC3); + omap_cfg_reg(E3_7XX_KBC4); + platform_add_devices(devices, ARRAY_SIZE(devices)); omap_board_config = perseus2_config; @@ -238,21 +294,10 @@ static void __init omap_perseus2_init(void) omap_register_i2c_bus(1, 100, NULL, 0); } -static void __init perseus2_init_smc91x(void) -{ - fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); - mdelay(50); - fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, - H2P2_DBG_FPGA_LAN_RESET); - mdelay(50); -} - static void __init omap_perseus2_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); - perseus2_init_smc91x(); } /* Only FPGA needs to be mapped here. All others are done with ioremap */ static struct map_desc omap_perseus2_io_desc[] __initdata = { @@ -275,7 +320,7 @@ static void __init omap_perseus2_map_io(void) /* * Hold GSM Reset until needed */ - omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL); + omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); /* * UARTs -> done automagically by 8250 driver @@ -286,29 +331,28 @@ static void __init omap_perseus2_map_io(void) */ /* Flash: CS0 timings setup */ - omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0); - omap_writel(0x00000088, OMAP730_FLASH_ACFG_0); + omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); + omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); /* * Ethernet support through the debug board * CS1 timings setup */ - omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1); - omap_writel(0x00000000, OMAP730_FLASH_ACFG_1); + omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); + omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); /* * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, * It is used as the Ethernet controller interrupt */ - omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9); + omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9); } MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") /* Maintainer: Kevin Hilman <kjh@hilman.org> */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_perseus2_map_io, + .reserve = omap_reserve, .init_irq = omap_perseus2_init_irq, .init_machine = omap_perseus2_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c index 58a46e4e45c3..e8ddd86e3fda 100644 --- a/arch/arm/mach-omap1/board-sx1-mmc.c +++ b/arch/arm/mach-omap1/board-sx1-mmc.c @@ -15,9 +15,9 @@ #include <linux/platform_device.h> #include <mach/hardware.h> -#include <mach/mmc.h> +#include <plat/mmc.h> #include <mach/gpio.h> -#include <mach/board-sx1.h> +#include <plat/board-sx1.h> #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) @@ -44,8 +44,7 @@ static struct omap_mmc_platform_data mmc1_data = { .nr_slots = 1, .slots[0] = { .set_power = mmc_set_power, - .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 | - MMC_VDD_32_33 | MMC_VDD_33_34, + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, .name = "mmcblk", }, }; diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index c096577695fe..d41fe2d0616a 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -22,6 +22,7 @@ #include <linux/notifier.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/types.h> #include <linux/i2c.h> #include <linux/errno.h> @@ -29,19 +30,19 @@ #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <asm/mach/flash.h> #include <asm/mach/map.h> #include <mach/gpio.h> -#include <mach/mux.h> -#include <mach/dma.h> -#include <mach/irda.h> -#include <mach/usb.h> -#include <mach/tc.h> -#include <mach/board.h> -#include <mach/common.h> -#include <mach/keypad.h> -#include <mach/board-sx1.h> +#include <plat/flash.h> +#include <plat/mux.h> +#include <plat/dma.h> +#include <plat/irda.h> +#include <plat/usb.h> +#include <plat/tc.h> +#include <plat/board.h> +#include <plat/common.h> +#include <plat/keypad.h> +#include <plat/board-sx1.h> /* Write to I2C device */ int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) @@ -163,36 +164,35 @@ EXPORT_SYMBOL(sx1_setusbpower); /*----------- Keypad -------------------------*/ -static int sx1_keymap[] = { - KEY(5, 3, GROUP_0 | 117), /* camera Qt::Key_F17 */ - KEY(0, 4, GROUP_0 | 114), /* voice memo Qt::Key_F14 */ - KEY(1, 4, GROUP_2 | 114), /* voice memo */ - KEY(2, 4, GROUP_3 | 114), /* voice memo */ +static const unsigned int sx1_keymap[] = { + KEY(3, 5, GROUP_0 | 117), /* camera Qt::Key_F17 */ + KEY(4, 0, GROUP_0 | 114), /* voice memo Qt::Key_F14 */ + KEY(4, 1, GROUP_2 | 114), /* voice memo */ + KEY(4, 2, GROUP_3 | 114), /* voice memo */ KEY(0, 0, GROUP_1 | KEY_F12), /* red button Qt::Key_Hangup */ - KEY(4, 3, GROUP_1 | KEY_LEFT), - KEY(2, 3, GROUP_1 | KEY_DOWN), - KEY(1, 3, GROUP_1 | KEY_RIGHT), - KEY(0, 3, GROUP_1 | KEY_UP), + KEY(3, 4, GROUP_1 | KEY_LEFT), + KEY(3, 2, GROUP_1 | KEY_DOWN), + KEY(3, 1, GROUP_1 | KEY_RIGHT), + KEY(3, 0, GROUP_1 | KEY_UP), KEY(3, 3, GROUP_1 | KEY_POWER), /* joystick press or Qt::Key_Select */ - KEY(5, 0, GROUP_1 | KEY_1), - KEY(4, 0, GROUP_1 | KEY_2), - KEY(3, 0, GROUP_1 | KEY_3), - KEY(3, 4, GROUP_1 | KEY_4), + KEY(0, 5, GROUP_1 | KEY_1), + KEY(0, 4, GROUP_1 | KEY_2), + KEY(0, 3, GROUP_1 | KEY_3), + KEY(4, 3, GROUP_1 | KEY_4), KEY(4, 4, GROUP_1 | KEY_5), - KEY(5, 4, GROUP_1 | KEY_KPASTERISK),/* "*" */ - KEY(4, 1, GROUP_1 | KEY_6), - KEY(5, 1, GROUP_1 | KEY_7), - KEY(3, 1, GROUP_1 | KEY_8), - KEY(3, 2, GROUP_1 | KEY_9), - KEY(5, 2, GROUP_1 | KEY_0), - KEY(4, 2, GROUP_1 | 113), /* # F13 Toggle input method Qt::Key_F13 */ - KEY(0, 1, GROUP_1 | KEY_F11), /* green button Qt::Key_Call */ - KEY(1, 2, GROUP_1 | KEY_YEN), /* left soft Qt::Key_Context1 */ + KEY(4, 5, GROUP_1 | KEY_KPASTERISK),/* "*" */ + KEY(1, 4, GROUP_1 | KEY_6), + KEY(1, 5, GROUP_1 | KEY_7), + KEY(1, 3, GROUP_1 | KEY_8), + KEY(2, 3, GROUP_1 | KEY_9), + KEY(2, 5, GROUP_1 | KEY_0), + KEY(2, 4, GROUP_1 | 113), /* # F13 Toggle input method Qt::Key_F13 */ + KEY(1, 0, GROUP_1 | KEY_F11), /* green button Qt::Key_Call */ + KEY(2, 1, GROUP_1 | KEY_YEN), /* left soft Qt::Key_Context1 */ KEY(2, 2, GROUP_1 | KEY_F8), /* right soft Qt::Key_Back */ - KEY(2, 1, GROUP_1 | KEY_LEFTSHIFT), /* shift */ + KEY(1, 2, GROUP_1 | KEY_LEFTSHIFT), /* shift */ KEY(1, 1, GROUP_1 | KEY_BACKSPACE), /* C (clear) */ - KEY(0, 2, GROUP_1 | KEY_F7), /* menu Qt::Key_Menu */ - 0 + KEY(2, 0, GROUP_1 | KEY_F7), /* menu Qt::Key_Menu */ }; static struct resource sx1_kp_resources[] = { @@ -203,11 +203,15 @@ static struct resource sx1_kp_resources[] = { }, }; +static const struct matrix_keymap_data sx1_keymap_data = { + .keymap = sx1_keymap, + .keymap_size = ARRAY_SIZE(sx1_keymap), +}; + static struct omap_kp_platform_data sx1_kp_data = { .rows = 6, .cols = 6, - .keymap = sx1_keymap, - .keymapsize = ARRAY_SIZE(sx1_keymap), + .keymap_data = &sx1_keymap_data, .delay = 80, }; @@ -287,9 +291,9 @@ static struct mtd_partition sx1_partitions[] = { } }; -static struct flash_platform_data sx1_flash_data = { - .map_name = "cfi_probe", +static struct physmap_flash_data sx1_flash_data = { .width = 2, + .set_vpp = omap1_set_vpp, .parts = sx1_partitions, .nr_parts = ARRAY_SIZE(sx1_partitions), }; @@ -310,7 +314,7 @@ static struct resource sx1_old_flash_resource[] = { }; static struct platform_device sx1_flash_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &sx1_flash_data, @@ -327,7 +331,7 @@ static struct resource sx1_new_flash_resource = { }; static struct platform_device sx1_flash_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &sx1_flash_data, @@ -369,26 +373,29 @@ static struct platform_device *sx1_devices[] __initdata = { }; /*-----------------------------------------*/ -static struct omap_uart_config sx1_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel sx1_config[] __initdata = { { OMAP_TAG_LCD, &sx1_lcd_config }, - { OMAP_TAG_UART, &sx1_uart_config }, }; /*-----------------------------------------*/ static void __init omap_sx1_init(void) { + /* mux pins for uarts */ + omap_cfg_reg(UART1_TX); + omap_cfg_reg(UART1_RTS); + omap_cfg_reg(UART2_TX); + omap_cfg_reg(UART2_RTS); + omap_cfg_reg(UART3_TX); + omap_cfg_reg(UART3_RX); + platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices)); omap_board_config = sx1_config; omap_board_config_size = ARRAY_SIZE(sx1_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); - omap_usb_init(&sx1_usb_config); + omap1_usb_init(&sx1_usb_config); sx1_mmc_init(); /* turn on USB power */ @@ -405,7 +412,6 @@ static void __init omap_sx1_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); } /*----------------------------------------*/ @@ -415,11 +421,10 @@ static void __init omap_sx1_map_io(void) } MACHINE_START(SX1, "OMAP310 based Siemens SX1") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_sx1_map_io, - .init_irq = omap_sx1_init_irq, + .reserve = omap_reserve, + .init_irq = omap_sx1_init_irq, .init_machine = omap_sx1_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 98275e03dad1..815a69ce821d 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -18,22 +18,24 @@ #include <linux/irq.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/mtd/physmap.h> #include <linux/notifier.h> #include <linux/reboot.h> #include <linux/serial_8250.h> #include <linux/serial_reg.h> +#include <linux/smc91x.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <asm/mach/flash.h> #include <asm/mach/map.h> -#include <mach/common.h> +#include <plat/common.h> #include <mach/gpio.h> -#include <mach/mux.h> -#include <mach/tc.h> -#include <mach/usb.h> +#include <plat/flash.h> +#include <plat/mux.h> +#include <plat/tc.h> +#include <plat/usb.h> static struct plat_serial8250_port voiceblue_ports[] = { { @@ -81,13 +83,16 @@ static struct platform_device serial_device = { static int __init ext_uart_init(void) { + if (!machine_is_voiceblue()) + return -ENODEV; + return platform_device_register(&serial_device); } arch_initcall(ext_uart_init); -static struct flash_platform_data voiceblue_flash_data = { - .map_name = "cfi_probe", +static struct physmap_flash_data voiceblue_flash_data = { .width = 2, + .set_vpp = omap1_set_vpp, }; static struct resource voiceblue_flash_resource = { @@ -97,7 +102,7 @@ static struct resource voiceblue_flash_resource = { }; static struct platform_device voiceblue_flash_device = { - .name = "omapflash", + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &voiceblue_flash_data, @@ -106,6 +111,12 @@ static struct platform_device voiceblue_flash_device = { .resource = &voiceblue_flash_resource, }; +static struct smc91x_platdata voiceblue_smc91x_info = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, + .leda = RPC_LED_100_10, + .ledb = RPC_LED_TX_RX, +}; + static struct resource voiceblue_smc91x_resources[] = { [0] = { .start = OMAP_CS2_PHYS + 0x300, @@ -122,6 +133,9 @@ static struct resource voiceblue_smc91x_resources[] = { static struct platform_device voiceblue_smc91x_device = { .name = "smc91x", .id = 0, + .dev = { + .platform_data = &voiceblue_smc91x_info, + }, .num_resources = ARRAY_SIZE(voiceblue_smc91x_resources), .resource = voiceblue_smc91x_resources, }; @@ -140,23 +154,25 @@ static struct omap_usb_config voiceblue_usb_config __initdata = { .pins[2] = 6, }; -static struct omap_uart_config voiceblue_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel voiceblue_config[] = { - { OMAP_TAG_UART, &voiceblue_uart_config }, }; static void __init voiceblue_init_irq(void) { omap1_init_common_hw(); omap_init_irq(); - omap_gpio_init(); } static void __init voiceblue_init(void) { + /* mux pins for uarts */ + omap_cfg_reg(UART1_TX); + omap_cfg_reg(UART1_RTS); + omap_cfg_reg(UART2_TX); + omap_cfg_reg(UART2_RTS); + omap_cfg_reg(UART3_TX); + omap_cfg_reg(UART3_RX); + /* Watchdog */ gpio_request(0, "Watchdog"); /* smc91x reset */ @@ -184,7 +200,7 @@ static void __init voiceblue_init(void) omap_board_config = voiceblue_config; omap_board_config_size = ARRAY_SIZE(voiceblue_config); omap_serial_init(); - omap_usb_init(&voiceblue_usb_config); + omap1_usb_init(&voiceblue_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); /* There is a good chance board is going up, so enable power LED @@ -222,6 +238,9 @@ static struct notifier_block panic_block = { static int __init voiceblue_setup(void) { + if (!machine_is_voiceblue()) + return -ENODEV; + /* Setup panic notifier */ atomic_notifier_chain_register(&panic_notifier_list, &panic_block); @@ -269,10 +288,9 @@ EXPORT_SYMBOL(voiceblue_wdt_ping); MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") /* Maintainer: Ladislav Michl <michl@2n.cz> */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = voiceblue_map_io, + .reserve = omap_reserve, .init_irq = voiceblue_init_irq, .init_machine = voiceblue_init, .timer = &omap_timer, diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 436eed22801b..84ef70476b51 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -1,7 +1,7 @@ /* * linux/arch/arm/mach-omap1/clock.c * - * Copyright (C) 2004 - 2005 Nokia corporation + * Copyright (C) 2004 - 2005, 2009-2010 Nokia Corporation * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> * * Modified to use omap shared clock framework by @@ -11,163 +11,39 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/module.h> #include <linux/kernel.h> #include <linux/list.h> #include <linux/errno.h> #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> +#include <linux/clkdev.h> #include <asm/mach-types.h> -#include <asm/clkdev.h> -#include <mach/cpu.h> -#include <mach/usb.h> -#include <mach/clock.h> -#include <mach/sram.h> - -static const struct clkops clkops_generic; -static const struct clkops clkops_uart; -static const struct clkops clkops_dspck; +#include <plat/cpu.h> +#include <plat/usb.h> +#include <plat/clock.h> +#include <plat/sram.h> +#include <plat/clkdev_omap.h> #include "clock.h" - -static int clk_omap1_dummy_enable(struct clk *clk) -{ - return 0; -} - -static void clk_omap1_dummy_disable(struct clk *clk) -{ -} - -static const struct clkops clkops_dummy = { - .enable = clk_omap1_dummy_enable, - .disable = clk_omap1_dummy_disable, -}; - -static struct clk dummy_ck = { - .name = "dummy", - .ops = &clkops_dummy, - .flags = RATE_FIXED, -}; - -struct omap_clk { - u32 cpu; - struct clk_lookup lk; -}; - -#define CLK(dev, con, ck, cp) \ - { \ - .cpu = cp, \ - .lk = { \ - .dev_id = dev, \ - .con_id = con, \ - .clk = ck, \ - }, \ - } - -#define CK_310 (1 << 0) -#define CK_730 (1 << 1) -#define CK_1510 (1 << 2) -#define CK_16XX (1 << 3) - -static struct omap_clk omap_clks[] = { - /* non-ULPD clocks */ - CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), - /* CK_GEN1 clocks */ - CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), - CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), - CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310), - CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), - CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310), - CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310), - CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX), - /* CK_GEN2 clocks */ - CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), - /* CK_GEN3 clocks */ - CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_730), - CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), - CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX), - CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), - CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), - CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), - CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), - CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), - CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), - CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_730), - CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), - /* ULPD clocks */ - CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), - CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), - CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), - CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), - CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), - CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), - CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), - CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), - CLK(NULL, "mclk", &mclk_16xx, CK_16XX), - CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), - CLK(NULL, "bclk", &bclk_16xx, CK_16XX), - CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), - CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), - CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), - /* Virtual clocks */ - CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), - CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310), - CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), - CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), - CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX), - CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX), - CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), -}; - -static int omap1_clk_enable_generic(struct clk * clk); -static int omap1_clk_enable(struct clk *clk); -static void omap1_clk_disable_generic(struct clk * clk); -static void omap1_clk_disable(struct clk *clk); +#include "opp.h" __u32 arm_idlect1_mask; +struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; -/*------------------------------------------------------------------------- +/* * Omap1 specific clock functions - *-------------------------------------------------------------------------*/ - -static unsigned long omap1_watchdog_recalc(struct clk *clk) -{ - return clk->parent->rate / 14; -} + */ -static unsigned long omap1_uart_recalc(struct clk *clk) +unsigned long omap1_uart_recalc(struct clk *clk) { unsigned int val = __raw_readl(clk->enable_reg); return val & clk->enable_bit ? 48000000 : 12000000; } -static unsigned long omap1_sossi_recalc(struct clk *clk) +unsigned long omap1_sossi_recalc(struct clk *clk) { u32 div = omap_readl(MOD_CONF_CTRL_1); @@ -177,64 +53,6 @@ static unsigned long omap1_sossi_recalc(struct clk *clk) return clk->parent->rate / div; } -static int omap1_clk_enable_dsp_domain(struct clk *clk) -{ - int retval; - - retval = omap1_clk_enable(&api_ck.clk); - if (!retval) { - retval = omap1_clk_enable_generic(clk); - omap1_clk_disable(&api_ck.clk); - } - - return retval; -} - -static void omap1_clk_disable_dsp_domain(struct clk *clk) -{ - if (omap1_clk_enable(&api_ck.clk) == 0) { - omap1_clk_disable_generic(clk); - omap1_clk_disable(&api_ck.clk); - } -} - -static const struct clkops clkops_dspck = { - .enable = &omap1_clk_enable_dsp_domain, - .disable = &omap1_clk_disable_dsp_domain, -}; - -static int omap1_clk_enable_uart_functional(struct clk *clk) -{ - int ret; - struct uart_clk *uclk; - - ret = omap1_clk_enable_generic(clk); - if (ret == 0) { - /* Set smart idle acknowledgement mode */ - uclk = (struct uart_clk *)clk; - omap_writeb((omap_readb(uclk->sysc_addr) & ~0x10) | 8, - uclk->sysc_addr); - } - - return ret; -} - -static void omap1_clk_disable_uart_functional(struct clk *clk) -{ - struct uart_clk *uclk; - - /* Set force idle acknowledgement mode */ - uclk = (struct uart_clk *)clk; - omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr); - - omap1_clk_disable_generic(clk); -} - -static const struct clkops clkops_uart = { - .enable = &omap1_clk_enable_uart_functional, - .disable = &omap1_clk_disable_uart_functional, -}; - static void omap1_clk_allow_idle(struct clk *clk) { struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; @@ -342,7 +160,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return dsor_exp; } -static unsigned long omap1_ckctl_recalc(struct clk *clk) +unsigned long omap1_ckctl_recalc(struct clk *clk) { /* Calculate divisor encoded as 2-bit exponent */ int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); @@ -350,7 +168,7 @@ static unsigned long omap1_ckctl_recalc(struct clk *clk) return clk->parent->rate / dsor; } -static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) +unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) { int dsor; @@ -361,28 +179,29 @@ static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) * Note that DSP_CKCTL virt addr = phys addr, so * we must use __raw_readw() instead of omap_readw(). */ - omap1_clk_enable(&api_ck.clk); + omap1_clk_enable(api_ck_p); dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); - omap1_clk_disable(&api_ck.clk); + omap1_clk_disable(api_ck_p); return clk->parent->rate / dsor; } /* MPU virtual clock functions */ -static int omap1_select_table_rate(struct clk * clk, unsigned long rate) +int omap1_select_table_rate(struct clk *clk, unsigned long rate) { /* Find the highest supported frequency <= rate and switch to it */ struct mpu_rate * ptr; + unsigned long dpll1_rate, ref_rate; - if (clk != &virtual_ck_mpu) - return -EINVAL; + dpll1_rate = ck_dpll1_p->rate; + ref_rate = ck_ref_p->rate; - for (ptr = rate_table; ptr->rate; ptr++) { - if (ptr->xtal != ck_ref.rate) + for (ptr = omap1_rate_table; ptr->rate; ptr++) { + if (ptr->xtal != ref_rate) continue; /* DPLL1 cannot be reprogrammed without risking system crash */ - if (likely(ck_dpll1.rate!=0) && ptr->pll_rate != ck_dpll1.rate) + if (likely(dpll1_rate != 0) && ptr->pll_rate != dpll1_rate) continue; /* Can check only after xtal frequency check */ @@ -398,16 +217,18 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate) * Reprogramming the DPLL is tricky, it must be done from SRAM. * (on 730, bit 13 must always be 1) */ - if (cpu_is_omap730()) + if (cpu_is_omap7xx()) omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000); else omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); - ck_dpll1.rate = ptr->pll_rate; + /* XXX Do we need to recalculate the tree below DPLL1 at this point? */ + ck_dpll1_p->rate = ptr->pll_rate; + return 0; } -static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) +int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) { int dsor_exp; u16 regval; @@ -427,7 +248,7 @@ static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) return 0; } -static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) +long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) { int dsor_exp = calc_dsor_exp(clk, rate); if (dsor_exp < 0) @@ -437,7 +258,7 @@ static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) return clk->parent->rate / (1 << dsor_exp); } -static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) +int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) { int dsor_exp; u16 regval; @@ -457,19 +278,19 @@ static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) return 0; } -static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate) +long omap1_round_to_table_rate(struct clk *clk, unsigned long rate) { /* Find the highest supported frequency <= rate */ struct mpu_rate * ptr; - long highest_rate; + long highest_rate; + unsigned long ref_rate; - if (clk != &virtual_ck_mpu) - return -EINVAL; + ref_rate = ck_ref_p->rate; highest_rate = -EINVAL; - for (ptr = rate_table; ptr->rate; ptr++) { - if (ptr->xtal != ck_ref.rate) + for (ptr = omap1_rate_table; ptr->rate; ptr++) { + if (ptr->xtal != ref_rate) continue; highest_rate = ptr->rate; @@ -504,8 +325,8 @@ static unsigned calc_ext_dsor(unsigned long rate) return dsor; } -/* Only needed on 1510 */ -static int omap1_set_uart_rate(struct clk * clk, unsigned long rate) +/* XXX Only needed on 1510 */ +int omap1_set_uart_rate(struct clk *clk, unsigned long rate) { unsigned int val; @@ -523,7 +344,7 @@ static int omap1_set_uart_rate(struct clk * clk, unsigned long rate) } /* External clock (MCLK & BCLK) functions */ -static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate) +int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) { unsigned dsor; __u16 ratio_bits; @@ -541,7 +362,7 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate) return 0; } -static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) +int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) { u32 l; int div; @@ -564,12 +385,12 @@ static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) return 0; } -static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate) +long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate) { return 96000000 / calc_ext_dsor(rate); } -static void omap1_init_ext_clk(struct clk * clk) +void omap1_init_ext_clk(struct clk *clk) { unsigned dsor; __u16 ratio_bits; @@ -587,7 +408,7 @@ static void omap1_init_ext_clk(struct clk * clk) clk-> rate = 96000000 / dsor; } -static int omap1_clk_enable(struct clk *clk) +int omap1_clk_enable(struct clk *clk) { int ret = 0; @@ -615,7 +436,7 @@ err: return ret; } -static void omap1_clk_disable(struct clk *clk) +void omap1_clk_disable(struct clk *clk) { if (clk->usecount > 0 && !(--clk->usecount)) { clk->ops->disable(clk); @@ -670,23 +491,81 @@ static void omap1_clk_disable_generic(struct clk *clk) } } -static const struct clkops clkops_generic = { - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, +const struct clkops clkops_generic = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, +}; + +static int omap1_clk_enable_dsp_domain(struct clk *clk) +{ + int retval; + + retval = omap1_clk_enable(api_ck_p); + if (!retval) { + retval = omap1_clk_enable_generic(clk); + omap1_clk_disable(api_ck_p); + } + + return retval; +} + +static void omap1_clk_disable_dsp_domain(struct clk *clk) +{ + if (omap1_clk_enable(api_ck_p) == 0) { + omap1_clk_disable_generic(clk); + omap1_clk_disable(api_ck_p); + } +} + +const struct clkops clkops_dspck = { + .enable = omap1_clk_enable_dsp_domain, + .disable = omap1_clk_disable_dsp_domain, }; -static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) +/* XXX SYSC register handling does not belong in the clock framework */ +static int omap1_clk_enable_uart_functional_16xx(struct clk *clk) +{ + int ret; + struct uart_clk *uclk; + + ret = omap1_clk_enable_generic(clk); + if (ret == 0) { + /* Set smart idle acknowledgement mode */ + uclk = (struct uart_clk *)clk; + omap_writeb((omap_readb(uclk->sysc_addr) & ~0x10) | 8, + uclk->sysc_addr); + } + + return ret; +} + +/* XXX SYSC register handling does not belong in the clock framework */ +static void omap1_clk_disable_uart_functional_16xx(struct clk *clk) { - if (clk->flags & RATE_FIXED) - return clk->rate; + struct uart_clk *uclk; + + /* Set force idle acknowledgement mode */ + uclk = (struct uart_clk *)clk; + omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr); + + omap1_clk_disable_generic(clk); +} + +/* XXX SYSC register handling does not belong in the clock framework */ +const struct clkops clkops_uart_16xx = { + .enable = omap1_clk_enable_uart_functional_16xx, + .disable = omap1_clk_disable_uart_functional_16xx, +}; +long omap1_clk_round_rate(struct clk *clk, unsigned long rate) +{ if (clk->round_rate != NULL) return clk->round_rate(clk, rate); return clk->rate; } -static int omap1_clk_set_rate(struct clk *clk, unsigned long rate) +int omap1_clk_set_rate(struct clk *clk, unsigned long rate) { int ret = -EINVAL; @@ -695,13 +574,13 @@ static int omap1_clk_set_rate(struct clk *clk, unsigned long rate) return ret; } -/*------------------------------------------------------------------------- +/* * Omap1 clock reset and init functions - *-------------------------------------------------------------------------*/ + */ #ifdef CONFIG_OMAP_RESET_CLOCKS -static void __init omap1_clk_disable_unused(struct clk *clk) +void omap1_clk_disable_unused(struct clk *clk) { __u32 regval32; @@ -722,184 +601,9 @@ static void __init omap1_clk_disable_unused(struct clk *clk) if ((regval32 & (1 << clk->enable_bit)) == 0) return; - /* FIXME: This clock seems to be necessary but no-one - * has asked for its activation. */ - if (clk == &tc2_ck /* FIX: pm.c (SRAM), CCP, Camera */ - || clk == &ck_dpll1out.clk /* FIX: SoSSI, SSR */ - || clk == &arm_gpio_ck /* FIX: GPIO code for 1510 */ - ) { - printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n", - clk->name); - return; - } - printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); clk->ops->disable(clk); printk(" done\n"); } -#else -#define omap1_clk_disable_unused NULL -#endif - -static struct clk_functions omap1_clk_functions = { - .clk_enable = omap1_clk_enable, - .clk_disable = omap1_clk_disable, - .clk_round_rate = omap1_clk_round_rate, - .clk_set_rate = omap1_clk_set_rate, - .clk_disable_unused = omap1_clk_disable_unused, -}; - -int __init omap1_clk_init(void) -{ - struct omap_clk *c; - const struct omap_clock_config *info; - int crystal_type = 0; /* Default 12 MHz */ - u32 reg, cpu_mask; - -#ifdef CONFIG_DEBUG_LL - /* Resets some clocks that may be left on from bootloader, - * but leaves serial clocks on. - */ - omap_writel(0x3 << 29, MOD_CONF_CTRL_0); -#endif - - /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ - reg = omap_readw(SOFT_REQ_REG) & (1 << 4); - omap_writew(reg, SOFT_REQ_REG); - if (!cpu_is_omap15xx()) - omap_writew(0, SOFT_REQ_REG2); - - clk_init(&omap1_clk_functions); - - /* By default all idlect1 clocks are allowed to idle */ - arm_idlect1_mask = ~0; - - for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - clk_preinit(c->lk.clk); - - cpu_mask = 0; - if (cpu_is_omap16xx()) - cpu_mask |= CK_16XX; - if (cpu_is_omap1510()) - cpu_mask |= CK_1510; - if (cpu_is_omap730()) - cpu_mask |= CK_730; - if (cpu_is_omap310()) - cpu_mask |= CK_310; - - for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - if (c->cpu & cpu_mask) { - clkdev_add(&c->lk); - clk_register(c->lk.clk); - } - - info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); - if (info != NULL) { - if (!cpu_is_omap15xx()) - crystal_type = info->system_clock_type; - } - -#if defined(CONFIG_ARCH_OMAP730) - ck_ref.rate = 13000000; -#elif defined(CONFIG_ARCH_OMAP16XX) - if (crystal_type == 2) - ck_ref.rate = 19200000; #endif - - printk("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n", - omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), - omap_readw(ARM_CKCTL)); - - /* We want to be in syncronous scalable mode */ - omap_writew(0x1000, ARM_SYSST); - -#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER - /* Use values set by bootloader. Determine PLL rate and recalculate - * dependent clocks as if kernel had changed PLL or divisors. - */ - { - unsigned pll_ctl_val = omap_readw(DPLL_CTL); - - ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */ - if (pll_ctl_val & 0x10) { - /* PLL enabled, apply multiplier and divisor */ - if (pll_ctl_val & 0xf80) - ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7; - ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1; - } else { - /* PLL disabled, apply bypass divisor */ - switch (pll_ctl_val & 0xc) { - case 0: - break; - case 0x4: - ck_dpll1.rate /= 2; - break; - default: - ck_dpll1.rate /= 4; - break; - } - } - } -#else - /* Find the highest supported frequency and enable it */ - if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { - printk(KERN_ERR "System frequencies not set. Check your config.\n"); - /* Guess sane values (60MHz) */ - omap_writew(0x2290, DPLL_CTL); - omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL); - ck_dpll1.rate = 60000000; - } -#endif - propagate_rate(&ck_dpll1); - /* Cache rates for clocks connected to ck_ref (not dpll1) */ - propagate_rate(&ck_ref); - printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): " - "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", - ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, - ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, - arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); - -#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE) - /* Select slicer output as OMAP input clock */ - omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL); -#endif - - /* Amstrad Delta wants BCLK high when inactive */ - if (machine_is_ams_delta()) - omap_writel(omap_readl(ULPD_CLOCK_CTRL) | - (1 << SDW_MCLK_INV_BIT), - ULPD_CLOCK_CTRL); - - /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ - /* (on 730, bit 13 must not be cleared) */ - if (cpu_is_omap730()) - omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); - else - omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); - - /* Put DSP/MPUI into reset until needed */ - omap_writew(0, ARM_RSTCT1); - omap_writew(1, ARM_RSTCT2); - omap_writew(0x400, ARM_IDLECT1); - - /* - * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8) - * of the ARM_IDLECT2 register must be set to zero. The power-on - * default value of this bit is one. - */ - omap_writew(0x0000, ARM_IDLECT2); /* Turn LCD clock off also */ - - /* - * Only enable those clocks we will need, let the drivers - * enable other clocks as necessary - */ - clk_enable(&armper_ck.clk); - clk_enable(&armxor_ck.clk); - clk_enable(&armtim_ck.clk); /* This should be done by timer code */ - - if (cpu_is_omap15xx()) - clk_enable(&arm_gpio_ck); - - return 0; -} diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 17f874271255..eaf09efb91ca 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -1,7 +1,7 @@ /* * linux/arch/arm/mach-omap1/clock.h * - * Copyright (C) 2004 - 2005 Nokia corporation + * Copyright (C) 2004 - 2005, 2009 Nokia corporation * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc * @@ -13,30 +13,36 @@ #ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H #define __ARCH_ARM_MACH_OMAP1_CLOCK_H -static unsigned long omap1_ckctl_recalc(struct clk *clk); -static unsigned long omap1_watchdog_recalc(struct clk *clk); -static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); -static unsigned long omap1_sossi_recalc(struct clk *clk); -static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); -static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate); -static int omap1_set_uart_rate(struct clk * clk, unsigned long rate); -static unsigned long omap1_uart_recalc(struct clk *clk); -static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate); -static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate); -static void omap1_init_ext_clk(struct clk * clk); -static int omap1_select_table_rate(struct clk * clk, unsigned long rate); -static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate); - -static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); -static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); - -struct mpu_rate { - unsigned long rate; - unsigned long xtal; - unsigned long pll_rate; - __u16 ckctl_val; - __u16 dpllctl_val; -}; +#include <linux/clk.h> + +#include <plat/clock.h> + +extern int __init omap1_clk_init(void); +extern int omap1_clk_enable(struct clk *clk); +extern void omap1_clk_disable(struct clk *clk); +extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); +extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate); +extern unsigned long omap1_ckctl_recalc(struct clk *clk); +extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); +extern unsigned long omap1_sossi_recalc(struct clk *clk); +extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); +extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate); +extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate); +extern unsigned long omap1_uart_recalc(struct clk *clk); +extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate); +extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate); +extern void omap1_init_ext_clk(struct clk *clk); +extern int omap1_select_table_rate(struct clk *clk, unsigned long rate); +extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate); +extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); +extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); +extern unsigned long omap1_watchdog_recalc(struct clk *clk); + +#ifdef CONFIG_OMAP_RESET_CLOCKS +extern void omap1_clk_disable_unused(struct clk *clk); +#else +#define omap1_clk_disable_unused NULL +#endif struct uart_clk { struct clk clk; @@ -96,574 +102,12 @@ struct arm_idlect1_clk { #define SOFT_REQ_REG 0xfffe0834 #define SOFT_REQ_REG2 0xfffe0880 -/*------------------------------------------------------------------------- - * Omap1 MPU rate table - *-------------------------------------------------------------------------*/ -static struct mpu_rate rate_table[] = { - /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL - * NOTE: Comment order here is different from bits in CKCTL value: - * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv - */ -#if defined(CONFIG_OMAP_ARM_216MHZ) - { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */ -#endif -#if defined(CONFIG_OMAP_ARM_195MHZ) - { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */ -#endif -#if defined(CONFIG_OMAP_ARM_192MHZ) - { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ - { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ - { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ - { 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */ - { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ -#endif -#if defined(CONFIG_OMAP_ARM_182MHZ) - { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */ -#endif -#if defined(CONFIG_OMAP_ARM_168MHZ) - { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ -#endif -#if defined(CONFIG_OMAP_ARM_150MHZ) - { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */ -#endif -#if defined(CONFIG_OMAP_ARM_120MHZ) - { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ -#endif -#if defined(CONFIG_OMAP_ARM_96MHZ) - { 96000000, 12000000, 96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */ -#endif -#if defined(CONFIG_OMAP_ARM_60MHZ) - { 60000000, 12000000, 60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */ -#endif -#if defined(CONFIG_OMAP_ARM_30MHZ) - { 30000000, 12000000, 60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */ -#endif - { 0, 0, 0, 0, 0 }, -}; - -/*------------------------------------------------------------------------- - * Omap1 clocks - *-------------------------------------------------------------------------*/ - -static struct clk ck_ref = { - .name = "ck_ref", - .ops = &clkops_null, - .rate = 12000000, -}; - -static struct clk ck_dpll1 = { - .name = "ck_dpll1", - .ops = &clkops_null, - .parent = &ck_ref, -}; - -static struct arm_idlect1_clk ck_dpll1out = { - .clk = { - .name = "ck_dpll1out", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_CKOUT_ARM, - .recalc = &followparent_recalc, - }, - .idlect_shift = 12, -}; - -static struct clk sossi_ck = { - .name = "ck_sossi", - .ops = &clkops_generic, - .parent = &ck_dpll1out.clk, - .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), - .enable_bit = 16, - .recalc = &omap1_sossi_recalc, - .set_rate = &omap1_set_sossi_rate, -}; - -static struct clk arm_ck = { - .name = "arm_ck", - .ops = &clkops_null, - .parent = &ck_dpll1, - .rate_offset = CKCTL_ARMDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, -}; - -static struct arm_idlect1_clk armper_ck = { - .clk = { - .name = "armper_ck", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_PERCK, - .rate_offset = CKCTL_PERDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, - }, - .idlect_shift = 2, -}; - -static struct clk arm_gpio_ck = { - .name = "arm_gpio_ck", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_GPIOCK, - .recalc = &followparent_recalc, -}; - -static struct arm_idlect1_clk armxor_ck = { - .clk = { - .name = "armxor_ck", - .ops = &clkops_generic, - .parent = &ck_ref, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, - }, - .idlect_shift = 1, -}; - -static struct arm_idlect1_clk armtim_ck = { - .clk = { - .name = "armtim_ck", - .ops = &clkops_generic, - .parent = &ck_ref, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_TIMCK, - .recalc = &followparent_recalc, - }, - .idlect_shift = 9, -}; - -static struct arm_idlect1_clk armwdt_ck = { - .clk = { - .name = "armwdt_ck", - .ops = &clkops_generic, - .parent = &ck_ref, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_WDTCK, - .recalc = &omap1_watchdog_recalc, - }, - .idlect_shift = 0, -}; - -static struct clk arminth_ck16xx = { - .name = "arminth_ck", - .ops = &clkops_null, - .parent = &arm_ck, - .recalc = &followparent_recalc, - /* Note: On 16xx the frequency can be divided by 2 by programming - * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 - * - * 1510 version is in TC clocks. - */ -}; - -static struct clk dsp_ck = { - .name = "dsp_ck", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), - .enable_bit = EN_DSPCK, - .rate_offset = CKCTL_DSPDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, -}; - -static struct clk dspmmu_ck = { - .name = "dspmmu_ck", - .ops = &clkops_null, - .parent = &ck_dpll1, - .rate_offset = CKCTL_DSPMMUDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, -}; - -static struct clk dspper_ck = { - .name = "dspper_ck", - .ops = &clkops_dspck, - .parent = &ck_dpll1, - .enable_reg = DSP_IDLECT2, - .enable_bit = EN_PERCK, - .rate_offset = CKCTL_PERDIV_OFFSET, - .recalc = &omap1_ckctl_recalc_dsp_domain, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = &omap1_clk_set_rate_dsp_domain, -}; - -static struct clk dspxor_ck = { - .name = "dspxor_ck", - .ops = &clkops_dspck, - .parent = &ck_ref, - .enable_reg = DSP_IDLECT2, - .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, -}; - -static struct clk dsptim_ck = { - .name = "dsptim_ck", - .ops = &clkops_dspck, - .parent = &ck_ref, - .enable_reg = DSP_IDLECT2, - .enable_bit = EN_DSPTIMCK, - .recalc = &followparent_recalc, -}; - -/* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */ -static struct arm_idlect1_clk tc_ck = { - .clk = { - .name = "tc_ck", - .ops = &clkops_null, - .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL, - .rate_offset = CKCTL_TCDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, - }, - .idlect_shift = 6, -}; - -static struct clk arminth_ck1510 = { - .name = "arminth_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, - /* Note: On 1510 the frequency follows TC_CK - * - * 16xx version is in MPU clocks. - */ -}; - -static struct clk tipb_ck = { - /* No-idle controlled by "tc_ck" */ - .name = "tipb_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk l3_ocpi_ck = { - /* No-idle controlled by "tc_ck" */ - .name = "l3_ocpi_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), - .enable_bit = EN_OCPI_CK, - .recalc = &followparent_recalc, -}; +extern __u32 arm_idlect1_mask; +extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; -static struct clk tc1_ck = { - .name = "tc1_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), - .enable_bit = EN_TC1_CK, - .recalc = &followparent_recalc, -}; - -static struct clk tc2_ck = { - .name = "tc2_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), - .enable_bit = EN_TC2_CK, - .recalc = &followparent_recalc, -}; - -static struct clk dma_ck = { - /* No-idle controlled by "tc_ck" */ - .name = "dma_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk dma_lcdfree_ck = { - .name = "dma_lcdfree_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct arm_idlect1_clk api_ck = { - .clk = { - .name = "api_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_APICK, - .recalc = &followparent_recalc, - }, - .idlect_shift = 8, -}; - -static struct arm_idlect1_clk lb_ck = { - .clk = { - .name = "lb_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_LBCK, - .recalc = &followparent_recalc, - }, - .idlect_shift = 4, -}; - -static struct clk rhea1_ck = { - .name = "rhea1_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk rhea2_ck = { - .name = "rhea2_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk lcd_ck_16xx = { - .name = "lcd_ck", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_LCDCK, - .rate_offset = CKCTL_LCDDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, -}; - -static struct arm_idlect1_clk lcd_ck_1510 = { - .clk = { - .name = "lcd_ck", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_LCDCK, - .rate_offset = CKCTL_LCDDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, - }, - .idlect_shift = 3, -}; - -static struct clk uart1_1510 = { - .name = "uart1_ck", - .ops = &clkops_null, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 12000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, -}; - -static struct uart_clk uart1_16xx = { - .clk = { - .name = "uart1_ck", - .ops = &clkops_uart, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 48000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT | - CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 29, - }, - .sysc_addr = 0xfffb0054, -}; - -static struct clk uart2_ck = { - .name = "uart2_ck", - .ops = &clkops_null, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 12000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, -}; - -static struct clk uart3_1510 = { - .name = "uart3_ck", - .ops = &clkops_null, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 12000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, -}; - -static struct uart_clk uart3_16xx = { - .clk = { - .name = "uart3_ck", - .ops = &clkops_uart, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 48000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT | - CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 31, - }, - .sysc_addr = 0xfffb9854, -}; - -static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ - .name = "usb_clko", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 6000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL), - .enable_bit = USB_MCLK_EN_BIT, -}; - -static struct clk usb_hhc_ck1510 = { - .name = "usb_hhc_ck", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ - .flags = RATE_FIXED | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = USB_HOST_HHC_UHOST_EN, -}; - -static struct clk usb_hhc_ck16xx = { - .name = "usb_hhc_ck", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 48000000, - /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ - .flags = RATE_FIXED | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ - .enable_bit = 8 /* UHOST_EN */, -}; - -static struct clk usb_dc_ck = { - .name = "usb_dc_ck", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 48000000, - .flags = RATE_FIXED, - .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = 4, -}; - -static struct clk mclk_1510 = { - .name = "mclk", - .ops = &clkops_generic, - /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .rate = 12000000, - .flags = RATE_FIXED, - .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = 6, -}; - -static struct clk mclk_16xx = { - .name = "mclk", - .ops = &clkops_generic, - /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), - .enable_bit = COM_ULPD_PLL_CLK_REQ, - .set_rate = &omap1_set_ext_clk_rate, - .round_rate = &omap1_round_ext_clk_rate, - .init = &omap1_init_ext_clk, -}; - -static struct clk bclk_1510 = { - .name = "bclk", - .ops = &clkops_generic, - /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .rate = 12000000, - .flags = RATE_FIXED, -}; - -static struct clk bclk_16xx = { - .name = "bclk", - .ops = &clkops_generic, - /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), - .enable_bit = SWD_ULPD_PLL_CLK_REQ, - .set_rate = &omap1_set_ext_clk_rate, - .round_rate = &omap1_round_ext_clk_rate, - .init = &omap1_init_ext_clk, -}; - -static struct clk mmc1_ck = { - .name = "mmc_ck", - .ops = &clkops_generic, - /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, - .rate = 48000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 23, -}; - -static struct clk mmc2_ck = { - .name = "mmc_ck", - .id = 1, - .ops = &clkops_generic, - /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, - .rate = 48000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 20, -}; - -static struct clk virtual_ck_mpu = { - .name = "mpu", - .ops = &clkops_null, - .parent = &arm_ck, /* Is smarter alias for */ - .recalc = &followparent_recalc, - .set_rate = &omap1_select_table_rate, - .round_rate = &omap1_round_to_table_rate, -}; - -/* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK -remains active during MPU idle whenever this is enabled */ -static struct clk i2c_fck = { - .name = "i2c_fck", - .id = 1, - .ops = &clkops_null, - .flags = CLOCK_NO_IDLE_PARENT, - .parent = &armxor_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk i2c_ick = { - .name = "i2c_ick", - .id = 1, - .ops = &clkops_null, - .flags = CLOCK_NO_IDLE_PARENT, - .parent = &armper_ck.clk, - .recalc = &followparent_recalc, -}; +extern const struct clkops clkops_dspck; +extern const struct clkops clkops_dummy; +extern const struct clkops clkops_uart_16xx; +extern const struct clkops clkops_generic; #endif diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c new file mode 100644 index 000000000000..92400b9eb69f --- /dev/null +++ b/arch/arm/mach-omap1/clock_data.c @@ -0,0 +1,927 @@ +/* + * linux/arch/arm/mach-omap1/clock_data.c + * + * Copyright (C) 2004 - 2005, 2009-2010 Nokia Corporation + * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> + * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * To do: + * - Clocks that are only available on some chips should be marked with the + * chips that they are present on. + */ + +#include <linux/kernel.h> +#include <linux/clk.h> +#include <linux/io.h> + +#include <asm/mach-types.h> /* for machine_is_* */ + +#include <plat/clock.h> +#include <plat/cpu.h> +#include <plat/clkdev_omap.h> +#include <plat/usb.h> /* for OTG_BASE */ + +#include "clock.h" + +/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ +#define IDL_CLKOUT_ARM_SHIFT 12 +#define IDLTIM_ARM_SHIFT 9 +#define IDLAPI_ARM_SHIFT 8 +#define IDLIF_ARM_SHIFT 6 +#define IDLLB_ARM_SHIFT 4 /* undocumented? */ +#define OMAP1510_IDLLCD_ARM_SHIFT 3 /* undocumented? */ +#define IDLPER_ARM_SHIFT 2 +#define IDLXORP_ARM_SHIFT 1 +#define IDLWDT_ARM_SHIFT 0 + +/* Some MOD_CONF_CTRL_0 bit shifts - used in struct clk.enable_bit */ +#define CONF_MOD_UART3_CLK_MODE_R 31 +#define CONF_MOD_UART2_CLK_MODE_R 30 +#define CONF_MOD_UART1_CLK_MODE_R 29 +#define CONF_MOD_MMC_SD_CLK_REQ_R 23 +#define CONF_MOD_MCBSP3_AUXON 20 + +/* Some MOD_CONF_CTRL_1 bit shifts - used in struct clk.enable_bit */ +#define CONF_MOD_SOSSI_CLK_EN_R 16 + +/* Some OTG_SYSCON_2-specific bit fields */ +#define OTG_SYSCON_2_UHOST_EN_SHIFT 8 + +/* Some SOFT_REQ_REG bit fields - used in struct clk.enable_bit */ +#define SOFT_MMC2_DPLL_REQ_SHIFT 13 +#define SOFT_MMC_DPLL_REQ_SHIFT 12 +#define SOFT_UART3_DPLL_REQ_SHIFT 11 +#define SOFT_UART2_DPLL_REQ_SHIFT 10 +#define SOFT_UART1_DPLL_REQ_SHIFT 9 +#define SOFT_USB_OTG_DPLL_REQ_SHIFT 8 +#define SOFT_CAM_DPLL_REQ_SHIFT 7 +#define SOFT_COM_MCKO_REQ_SHIFT 6 +#define SOFT_PERIPH_REQ_SHIFT 5 /* sys_ck gate for UART2 ? */ +#define USB_REQ_EN_SHIFT 4 +#define SOFT_USB_REQ_SHIFT 3 /* sys_ck gate for USB host? */ +#define SOFT_SDW_REQ_SHIFT 2 /* sys_ck gate for Bluetooth? */ +#define SOFT_COM_REQ_SHIFT 1 /* sys_ck gate for com proc? */ +#define SOFT_DPLL_REQ_SHIFT 0 + +/* + * Omap1 clocks + */ + +static struct clk ck_ref = { + .name = "ck_ref", + .ops = &clkops_null, + .rate = 12000000, +}; + +static struct clk ck_dpll1 = { + .name = "ck_dpll1", + .ops = &clkops_null, + .parent = &ck_ref, +}; + +/* + * FIXME: This clock seems to be necessary but no-one has asked for its + * activation. [ FIX: SoSSI, SSR ] + */ +static struct arm_idlect1_clk ck_dpll1out = { + .clk = { + .name = "ck_dpll1out", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT | + ENABLE_ON_INIT, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_CKOUT_ARM, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDL_CLKOUT_ARM_SHIFT, +}; + +static struct clk sossi_ck = { + .name = "ck_sossi", + .ops = &clkops_generic, + .parent = &ck_dpll1out.clk, + .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), + .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, + .recalc = &omap1_sossi_recalc, + .set_rate = &omap1_set_sossi_rate, +}; + +static struct clk arm_ck = { + .name = "arm_ck", + .ops = &clkops_null, + .parent = &ck_dpll1, + .rate_offset = CKCTL_ARMDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, +}; + +static struct arm_idlect1_clk armper_ck = { + .clk = { + .name = "armper_ck", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_PERCK, + .rate_offset = CKCTL_PERDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, + }, + .idlect_shift = IDLPER_ARM_SHIFT, +}; + +/* + * FIXME: This clock seems to be necessary but no-one has asked for its + * activation. [ GPIO code for 1510 ] + */ +static struct clk arm_gpio_ck = { + .name = "ick", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .flags = ENABLE_ON_INIT, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_GPIOCK, + .recalc = &followparent_recalc, +}; + +static struct arm_idlect1_clk armxor_ck = { + .clk = { + .name = "armxor_ck", + .ops = &clkops_generic, + .parent = &ck_ref, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_XORPCK, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDLXORP_ARM_SHIFT, +}; + +static struct arm_idlect1_clk armtim_ck = { + .clk = { + .name = "armtim_ck", + .ops = &clkops_generic, + .parent = &ck_ref, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_TIMCK, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDLTIM_ARM_SHIFT, +}; + +static struct arm_idlect1_clk armwdt_ck = { + .clk = { + .name = "armwdt_ck", + .ops = &clkops_generic, + .parent = &ck_ref, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_WDTCK, + .fixed_div = 14, + .recalc = &omap_fixed_divisor_recalc, + }, + .idlect_shift = IDLWDT_ARM_SHIFT, +}; + +static struct clk arminth_ck16xx = { + .name = "arminth_ck", + .ops = &clkops_null, + .parent = &arm_ck, + .recalc = &followparent_recalc, + /* Note: On 16xx the frequency can be divided by 2 by programming + * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 + * + * 1510 version is in TC clocks. + */ +}; + +static struct clk dsp_ck = { + .name = "dsp_ck", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), + .enable_bit = EN_DSPCK, + .rate_offset = CKCTL_DSPDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, +}; + +static struct clk dspmmu_ck = { + .name = "dspmmu_ck", + .ops = &clkops_null, + .parent = &ck_dpll1, + .rate_offset = CKCTL_DSPMMUDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, +}; + +static struct clk dspper_ck = { + .name = "dspper_ck", + .ops = &clkops_dspck, + .parent = &ck_dpll1, + .enable_reg = DSP_IDLECT2, + .enable_bit = EN_PERCK, + .rate_offset = CKCTL_PERDIV_OFFSET, + .recalc = &omap1_ckctl_recalc_dsp_domain, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = &omap1_clk_set_rate_dsp_domain, +}; + +static struct clk dspxor_ck = { + .name = "dspxor_ck", + .ops = &clkops_dspck, + .parent = &ck_ref, + .enable_reg = DSP_IDLECT2, + .enable_bit = EN_XORPCK, + .recalc = &followparent_recalc, +}; + +static struct clk dsptim_ck = { + .name = "dsptim_ck", + .ops = &clkops_dspck, + .parent = &ck_ref, + .enable_reg = DSP_IDLECT2, + .enable_bit = EN_DSPTIMCK, + .recalc = &followparent_recalc, +}; + +static struct arm_idlect1_clk tc_ck = { + .clk = { + .name = "tc_ck", + .ops = &clkops_null, + .parent = &ck_dpll1, + .flags = CLOCK_IDLE_CONTROL, + .rate_offset = CKCTL_TCDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, + }, + .idlect_shift = IDLIF_ARM_SHIFT, +}; + +static struct clk arminth_ck1510 = { + .name = "arminth_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, + /* Note: On 1510 the frequency follows TC_CK + * + * 16xx version is in MPU clocks. + */ +}; + +static struct clk tipb_ck = { + /* No-idle controlled by "tc_ck" */ + .name = "tipb_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk l3_ocpi_ck = { + /* No-idle controlled by "tc_ck" */ + .name = "l3_ocpi_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), + .enable_bit = EN_OCPI_CK, + .recalc = &followparent_recalc, +}; + +static struct clk tc1_ck = { + .name = "tc1_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), + .enable_bit = EN_TC1_CK, + .recalc = &followparent_recalc, +}; + +/* + * FIXME: This clock seems to be necessary but no-one has asked for its + * activation. [ pm.c (SRAM), CCP, Camera ] + */ +static struct clk tc2_ck = { + .name = "tc2_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .flags = ENABLE_ON_INIT, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), + .enable_bit = EN_TC2_CK, + .recalc = &followparent_recalc, +}; + +static struct clk dma_ck = { + /* No-idle controlled by "tc_ck" */ + .name = "dma_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk dma_lcdfree_ck = { + .name = "dma_lcdfree_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct arm_idlect1_clk api_ck = { + .clk = { + .name = "api_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_APICK, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDLAPI_ARM_SHIFT, +}; + +static struct arm_idlect1_clk lb_ck = { + .clk = { + .name = "lb_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_LBCK, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDLLB_ARM_SHIFT, +}; + +static struct clk rhea1_ck = { + .name = "rhea1_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk rhea2_ck = { + .name = "rhea2_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk lcd_ck_16xx = { + .name = "lcd_ck", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_LCDCK, + .rate_offset = CKCTL_LCDDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, +}; + +static struct arm_idlect1_clk lcd_ck_1510 = { + .clk = { + .name = "lcd_ck", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_LCDCK, + .rate_offset = CKCTL_LCDDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, + }, + .idlect_shift = OMAP1510_IDLLCD_ARM_SHIFT, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX does this need SYSC register handling? + */ +static struct clk uart1_1510 = { + .name = "uart1_ck", + .ops = &clkops_null, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 12000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART1_CLK_MODE_R, + .set_rate = &omap1_set_uart_rate, + .recalc = &omap1_uart_recalc, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX SYSC register handling does not belong in the clock framework + */ +static struct uart_clk uart1_16xx = { + .clk = { + .name = "uart1_ck", + .ops = &clkops_uart_16xx, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART1_CLK_MODE_R, + }, + .sysc_addr = 0xfffb0054, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX does this need SYSC register handling? + */ +static struct clk uart2_ck = { + .name = "uart2_ck", + .ops = &clkops_null, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 12000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART2_CLK_MODE_R, + .set_rate = &omap1_set_uart_rate, + .recalc = &omap1_uart_recalc, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX does this need SYSC register handling? + */ +static struct clk uart3_1510 = { + .name = "uart3_ck", + .ops = &clkops_null, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 12000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART3_CLK_MODE_R, + .set_rate = &omap1_set_uart_rate, + .recalc = &omap1_uart_recalc, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX SYSC register handling does not belong in the clock framework + */ +static struct uart_clk uart3_16xx = { + .clk = { + .name = "uart3_ck", + .ops = &clkops_uart_16xx, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART3_CLK_MODE_R, + }, + .sysc_addr = 0xfffb9854, +}; + +static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ + .name = "usb_clko", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 6000000, + .flags = ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL), + .enable_bit = USB_MCLK_EN_BIT, +}; + +static struct clk usb_hhc_ck1510 = { + .name = "usb_hhc_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ + .flags = ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = USB_HOST_HHC_UHOST_EN, +}; + +static struct clk usb_hhc_ck16xx = { + .name = "usb_hhc_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 48000000, + /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ + .flags = ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ + .enable_bit = OTG_SYSCON_2_UHOST_EN_SHIFT +}; + +static struct clk usb_dc_ck = { + .name = "usb_dc_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 48000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = USB_REQ_EN_SHIFT, +}; + +static struct clk usb_dc_ck7xx = { + .name = "usb_dc_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 48000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, +}; + +static struct clk uart1_7xx = { + .name = "uart1_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = 9, +}; + +static struct clk uart2_7xx = { + .name = "uart2_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = 11, +}; + +static struct clk mclk_1510 = { + .name = "mclk", + .ops = &clkops_generic, + /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, +}; + +static struct clk mclk_16xx = { + .name = "mclk", + .ops = &clkops_generic, + /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), + .enable_bit = COM_ULPD_PLL_CLK_REQ, + .set_rate = &omap1_set_ext_clk_rate, + .round_rate = &omap1_round_ext_clk_rate, + .init = &omap1_init_ext_clk, +}; + +static struct clk bclk_1510 = { + .name = "bclk", + .ops = &clkops_generic, + /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .rate = 12000000, +}; + +static struct clk bclk_16xx = { + .name = "bclk", + .ops = &clkops_generic, + /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), + .enable_bit = SWD_ULPD_PLL_CLK_REQ, + .set_rate = &omap1_set_ext_clk_rate, + .round_rate = &omap1_round_ext_clk_rate, + .init = &omap1_init_ext_clk, +}; + +static struct clk mmc1_ck = { + .name = "mmc1_ck", + .ops = &clkops_generic, + /* Functional clock is direct from ULPD, interface clock is ARMPER */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_MMC_SD_CLK_REQ_R, +}; + +/* + * XXX MOD_CONF_CTRL_0 bit 20 is defined in the 1510 TRM as + * CONF_MOD_MCBSP3_AUXON ?? + */ +static struct clk mmc2_ck = { + .name = "mmc2_ck", + .ops = &clkops_generic, + /* Functional clock is direct from ULPD, interface clock is ARMPER */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = 20, +}; + +static struct clk mmc3_ck = { + .name = "mmc3_ck", + .ops = &clkops_generic, + /* Functional clock is direct from ULPD, interface clock is ARMPER */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, +}; + +static struct clk virtual_ck_mpu = { + .name = "mpu", + .ops = &clkops_null, + .parent = &arm_ck, /* Is smarter alias for */ + .recalc = &followparent_recalc, + .set_rate = &omap1_select_table_rate, + .round_rate = &omap1_round_to_table_rate, +}; + +/* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK +remains active during MPU idle whenever this is enabled */ +static struct clk i2c_fck = { + .name = "i2c_fck", + .ops = &clkops_null, + .flags = CLOCK_NO_IDLE_PARENT, + .parent = &armxor_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk i2c_ick = { + .name = "i2c_ick", + .ops = &clkops_null, + .flags = CLOCK_NO_IDLE_PARENT, + .parent = &armper_ck.clk, + .recalc = &followparent_recalc, +}; + +/* + * clkdev integration + */ + +static struct omap_clk omap_clks[] = { + /* non-ULPD clocks */ + CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX), + /* CK_GEN1 clocks */ + CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), + CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), + CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap_gpio.0", "ick", &arm_gpio_ck, CK_1510 | CK_310), + CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), + CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310), + CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310), + CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX), + /* CK_GEN2 clocks */ + CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), + /* CK_GEN3 clocks */ + CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), + CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX | CK_7XX), + CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), + CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), + CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), + CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), + CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), + CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), + CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_7XX), + CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), + /* ULPD clocks */ + CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), + CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), + CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX), + CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX), + CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), + CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), + CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), + CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), + CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), + CLK(NULL, "usb_dc_ck", &usb_dc_ck7xx, CK_7XX), + CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), + CLK(NULL, "mclk", &mclk_16xx, CK_16XX), + CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), + CLK(NULL, "bclk", &bclk_16xx, CK_16XX), + CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), + CLK("mmci-omap.0", "fck", &mmc3_ck, CK_7XX), + CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), + CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), + /* Virtual clocks */ + CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), + CLK("omap_i2c.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK("omap_i2c.1", "ick", &i2c_ick, CK_16XX), + CLK("omap_i2c.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), + CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX), + CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX), + CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX), + CLK("omap1_spi100k.2", "ick", &dummy_ck, CK_7XX), + CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), + CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX), + CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX), + CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), +}; + +/* + * init + */ + +static struct clk_functions omap1_clk_functions = { + .clk_enable = omap1_clk_enable, + .clk_disable = omap1_clk_disable, + .clk_round_rate = omap1_clk_round_rate, + .clk_set_rate = omap1_clk_set_rate, + .clk_disable_unused = omap1_clk_disable_unused, +}; + +int __init omap1_clk_init(void) +{ + struct omap_clk *c; + const struct omap_clock_config *info; + int crystal_type = 0; /* Default 12 MHz */ + u32 reg, cpu_mask; + +#ifdef CONFIG_DEBUG_LL + /* + * Resets some clocks that may be left on from bootloader, + * but leaves serial clocks on. + */ + omap_writel(0x3 << 29, MOD_CONF_CTRL_0); +#endif + + /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ + reg = omap_readw(SOFT_REQ_REG) & (1 << 4); + omap_writew(reg, SOFT_REQ_REG); + if (!cpu_is_omap15xx()) + omap_writew(0, SOFT_REQ_REG2); + + clk_init(&omap1_clk_functions); + + /* By default all idlect1 clocks are allowed to idle */ + arm_idlect1_mask = ~0; + + for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) + clk_preinit(c->lk.clk); + + cpu_mask = 0; + if (cpu_is_omap16xx()) + cpu_mask |= CK_16XX; + if (cpu_is_omap1510()) + cpu_mask |= CK_1510; + if (cpu_is_omap7xx()) + cpu_mask |= CK_7XX; + if (cpu_is_omap310()) + cpu_mask |= CK_310; + + for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) + if (c->cpu & cpu_mask) { + clkdev_add(&c->lk); + clk_register(c->lk.clk); + } + + /* Pointers to these clocks are needed by code in clock.c */ + api_ck_p = clk_get(NULL, "api_ck"); + ck_dpll1_p = clk_get(NULL, "ck_dpll1"); + ck_ref_p = clk_get(NULL, "ck_ref"); + + info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); + if (info != NULL) { + if (!cpu_is_omap15xx()) + crystal_type = info->system_clock_type; + } + + if (cpu_is_omap7xx()) + ck_ref.rate = 13000000; + if (cpu_is_omap16xx() && crystal_type == 2) + ck_ref.rate = 19200000; + + pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: " + "0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), + omap_readw(ARM_CKCTL)); + + /* We want to be in syncronous scalable mode */ + omap_writew(0x1000, ARM_SYSST); + +#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER + /* Use values set by bootloader. Determine PLL rate and recalculate + * dependent clocks as if kernel had changed PLL or divisors. + */ + { + unsigned pll_ctl_val = omap_readw(DPLL_CTL); + + ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */ + if (pll_ctl_val & 0x10) { + /* PLL enabled, apply multiplier and divisor */ + if (pll_ctl_val & 0xf80) + ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7; + ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1; + } else { + /* PLL disabled, apply bypass divisor */ + switch (pll_ctl_val & 0xc) { + case 0: + break; + case 0x4: + ck_dpll1.rate /= 2; + break; + default: + ck_dpll1.rate /= 4; + break; + } + } + } +#else + /* Find the highest supported frequency and enable it */ + if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { + printk(KERN_ERR "System frequencies not set. Check your config.\n"); + /* Guess sane values (60MHz) */ + omap_writew(0x2290, DPLL_CTL); + omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL); + ck_dpll1.rate = 60000000; + } +#endif + propagate_rate(&ck_dpll1); + /* Cache rates for clocks connected to ck_ref (not dpll1) */ + propagate_rate(&ck_ref); + printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): " + "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", + ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, + ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, + arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); + + if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { + /* Select slicer output as OMAP input clock */ + omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, + OMAP7XX_PCC_UPLD_CTRL); + } + + /* Amstrad Delta wants BCLK high when inactive */ + if (machine_is_ams_delta()) + omap_writel(omap_readl(ULPD_CLOCK_CTRL) | + (1 << SDW_MCLK_INV_BIT), + ULPD_CLOCK_CTRL); + + /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ + /* (on 730, bit 13 must not be cleared) */ + if (cpu_is_omap7xx()) + omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); + else + omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); + + /* Put DSP/MPUI into reset until needed */ + omap_writew(0, ARM_RSTCT1); + omap_writew(1, ARM_RSTCT2); + omap_writew(0x400, ARM_IDLECT1); + + /* + * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8) + * of the ARM_IDLECT2 register must be set to zero. The power-on + * default value of this bit is one. + */ + omap_writew(0x0000, ARM_IDLECT2); /* Turn LCD clock off also */ + + /* + * Only enable those clocks we will need, let the drivers + * enable other clocks as necessary + */ + clk_enable(&armper_ck.clk); + clk_enable(&armxor_ck.clk); + clk_enable(&armtim_ck.clk); /* This should be done by timer code */ + + if (cpu_is_omap15xx()) + clk_enable(&arm_gpio_ck); + + return 0; +} diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index bbbaeb0abcd3..b0f4c231595f 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -9,20 +9,25 @@ * (at your option) any later version. */ +#include <linux/dma-mapping.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/io.h> +#include <linux/spi/spi.h> +#include <mach/camera.h> #include <mach/hardware.h> #include <asm/mach/map.h> -#include <mach/tc.h> -#include <mach/board.h> -#include <mach/mux.h> +#include <plat/tc.h> +#include <plat/board.h> +#include <plat/mux.h> #include <mach/gpio.h> -#include <mach/mmc.h> +#include <plat/mmc.h> +#include <plat/omap7xx.h> +#include <plat/mcbsp.h> /*-------------------------------------------------------------------------*/ @@ -61,44 +66,7 @@ static void omap_init_rtc(void) static inline void omap_init_rtc(void) {} #endif -#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) - -#if defined(CONFIG_ARCH_OMAP15XX) -# define OMAP1_MBOX_SIZE 0x23 -# define INT_DSP_MAILBOX1 INT_1510_DSP_MAILBOX1 -#elif defined(CONFIG_ARCH_OMAP16XX) -# define OMAP1_MBOX_SIZE 0x2f -# define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1 -#endif - -#define OMAP1_MBOX_BASE IO_ADDRESS(OMAP16XX_MAILBOX_BASE) - -static struct resource mbox_resources[] = { - { - .start = OMAP1_MBOX_BASE, - .end = OMAP1_MBOX_BASE + OMAP1_MBOX_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_DSP_MAILBOX1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mbox_device = { - .name = "omap1-mailbox", - .id = -1, - .num_resources = ARRAY_SIZE(mbox_resources), - .resource = mbox_resources, -}; - -static inline void omap_init_mbox(void) -{ - platform_device_register(&mbox_device); -} -#else static inline void omap_init_mbox(void) { } -#endif /*-------------------------------------------------------------------------*/ @@ -108,15 +76,22 @@ static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller, int controller_nr) { if (controller_nr == 0) { - omap_cfg_reg(MMC_CMD); - omap_cfg_reg(MMC_CLK); - omap_cfg_reg(MMC_DAT0); + if (cpu_is_omap7xx()) { + omap_cfg_reg(MMC_7XX_CMD); + omap_cfg_reg(MMC_7XX_CLK); + omap_cfg_reg(MMC_7XX_DAT0); + } else { + omap_cfg_reg(MMC_CMD); + omap_cfg_reg(MMC_CLK); + omap_cfg_reg(MMC_DAT0); + } + if (cpu_is_omap1710()) { omap_cfg_reg(M15_1710_MMC_CLKI); omap_cfg_reg(P19_1710_MMC_CMDDIR); omap_cfg_reg(P20_1710_MMC_DATDIR0); } - if (mmc_controller->slots[0].wires == 4) { + if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) { omap_cfg_reg(MMC_DAT1); /* NOTE: DAT2 can be on W10 (here) or M15 */ if (!mmc_controller->slots[0].nomux) @@ -189,41 +164,104 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, /*-------------------------------------------------------------------------*/ -#if defined(CONFIG_OMAP_STI) +/* OMAP7xx SPI support */ +#if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE) -#define OMAP1_STI_BASE 0xfffea000 -#define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400) +struct platform_device omap_spi1 = { + .name = "omap1_spi100k", + .id = 1, +}; -static struct resource sti_resources[] = { - { - .start = OMAP1_STI_BASE, - .end = OMAP1_STI_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, +struct platform_device omap_spi2 = { + .name = "omap1_spi100k", + .id = 2, +}; + +static void omap_init_spi100k(void) +{ + omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff); + if (omap_spi1.dev.platform_data) + platform_device_register(&omap_spi1); + + omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff); + if (omap_spi2.dev.platform_data) + platform_device_register(&omap_spi2); +} + +#else +static inline void omap_init_spi100k(void) +{ +} +#endif + + +#define OMAP1_CAMERA_BASE 0xfffb6800 +#define OMAP1_CAMERA_IOSIZE 0x1c + +static struct resource omap1_camera_resources[] = { + [0] = { + .start = OMAP1_CAMERA_BASE, + .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1, + .flags = IORESOURCE_MEM, }, - { - .start = OMAP1_STI_CHANNEL_BASE, - .end = OMAP1_STI_CHANNEL_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, + [1] = { + .start = INT_CAMERA, + .flags = IORESOURCE_IRQ, }, - { - .start = INT_1610_STI, - .flags = IORESOURCE_IRQ, - } }; -static struct platform_device sti_device = { - .name = "sti", - .id = -1, - .num_resources = ARRAY_SIZE(sti_resources), - .resource = sti_resources, +static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32); + +static struct platform_device omap1_camera_device = { + .name = "omap1-camera", + .id = 0, /* This is used to put cameras on this interface */ + .dev = { + .dma_mask = &omap1_camera_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(omap1_camera_resources), + .resource = omap1_camera_resources, }; -static inline void omap_init_sti(void) +void __init omap1_camera_init(void *info) { - platform_device_register(&sti_device); + struct platform_device *dev = &omap1_camera_device; + int ret; + + dev->dev.platform_data = info; + + ret = platform_device_register(dev); + if (ret) + dev_err(&dev->dev, "unable to register device: %d\n", ret); } -#else + + +/*-------------------------------------------------------------------------*/ + static inline void omap_init_sti(void) {} + +#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) + +static struct platform_device omap_pcm = { + .name = "omap-pcm-audio", + .id = -1, +}; + +OMAP_MCBSP_PLATFORM_DEVICE(1); +OMAP_MCBSP_PLATFORM_DEVICE(2); +OMAP_MCBSP_PLATFORM_DEVICE(3); + +static void omap_init_audio(void) +{ + platform_device_register(&omap_mcbsp1); + platform_device_register(&omap_mcbsp2); + if (!cpu_is_omap7xx()) + platform_device_register(&omap_mcbsp3); + platform_device_register(&omap_pcm); +} + +#else +static inline void omap_init_audio(void) {} #endif /*-------------------------------------------------------------------------*/ @@ -250,15 +288,46 @@ static inline void omap_init_sti(void) {} */ static int __init omap1_init_devices(void) { + if (!cpu_class_is_omap1()) + return -ENODEV; + /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ omap_init_mbox(); omap_init_rtc(); + omap_init_spi100k(); omap_init_sti(); + omap_init_audio(); return 0; } arch_initcall(omap1_init_devices); +#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) + +static struct resource wdt_resources[] = { + { + .start = 0xfffeb000, + .end = 0xfffeb07F, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device omap_wdt_device = { + .name = "omap_wdt", + .id = -1, + .num_resources = ARRAY_SIZE(wdt_resources), + .resource = wdt_resources, +}; + +static int __init omap_init_wdt(void) +{ + if (!cpu_is_omap16xx()) + return -ENODEV; + + return platform_device_register(&omap_wdt_device); +} +subsys_initcall(omap_init_wdt); +#endif diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c new file mode 100644 index 000000000000..d8559344c6e2 --- /dev/null +++ b/arch/arm/mach-omap1/dma.c @@ -0,0 +1,390 @@ +/* + * OMAP1/OMAP7xx - specific DMA driver + * + * Copyright (C) 2003 - 2008 Nokia Corporation + * Author: Juha Yrjölä <juha.yrjola@nokia.com> + * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com> + * Graphics DMA and LCD DMA graphics tranformations + * by Imre Deak <imre.deak@nokia.com> + * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc. + * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc. + * + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Converted DMA library into platform driver + * - G, Manjunath Kondaiah <manjugk@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/err.h> +#include <linux/io.h> +#include <linux/slab.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/device.h> + +#include <plat/dma.h> +#include <plat/tc.h> +#include <plat/irqs.h> + +#define OMAP1_DMA_BASE (0xfffed800) +#define OMAP1_LOGICAL_DMA_CH_COUNT 17 +#define OMAP1_DMA_STRIDE 0x40 + +static u32 errata; +static u32 enable_1510_mode; +static u8 dma_stride; +static enum omap_reg_offsets dma_common_ch_start, dma_common_ch_end; + +static u16 reg_map[] = { + [GCR] = 0x400, + [GSCR] = 0x404, + [GRST1] = 0x408, + [HW_ID] = 0x442, + [PCH2_ID] = 0x444, + [PCH0_ID] = 0x446, + [PCH1_ID] = 0x448, + [PCHG_ID] = 0x44a, + [PCHD_ID] = 0x44c, + [CAPS_0] = 0x44e, + [CAPS_1] = 0x452, + [CAPS_2] = 0x456, + [CAPS_3] = 0x458, + [CAPS_4] = 0x45a, + [PCH2_SR] = 0x460, + [PCH0_SR] = 0x480, + [PCH1_SR] = 0x482, + [PCHD_SR] = 0x4c0, + + /* Common Registers */ + [CSDP] = 0x00, + [CCR] = 0x02, + [CICR] = 0x04, + [CSR] = 0x06, + [CEN] = 0x10, + [CFN] = 0x12, + [CSFI] = 0x14, + [CSEI] = 0x16, + [CPC] = 0x18, /* 15xx only */ + [CSAC] = 0x18, + [CDAC] = 0x1a, + [CDEI] = 0x1c, + [CDFI] = 0x1e, + [CLNK_CTRL] = 0x28, + + /* Channel specific register offsets */ + [CSSA] = 0x08, + [CDSA] = 0x0c, + [COLOR] = 0x20, + [CCR2] = 0x24, + [LCH_CTRL] = 0x2a, +}; + +static struct resource res[] __initdata = { + [0] = { + .start = OMAP1_DMA_BASE, + .end = OMAP1_DMA_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "0", + .start = INT_DMA_CH0_6, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .name = "1", + .start = INT_DMA_CH1_7, + .flags = IORESOURCE_IRQ, + }, + [3] = { + .name = "2", + .start = INT_DMA_CH2_8, + .flags = IORESOURCE_IRQ, + }, + [4] = { + .name = "3", + .start = INT_DMA_CH3, + .flags = IORESOURCE_IRQ, + }, + [5] = { + .name = "4", + .start = INT_DMA_CH4, + .flags = IORESOURCE_IRQ, + }, + [6] = { + .name = "5", + .start = INT_DMA_CH5, + .flags = IORESOURCE_IRQ, + }, + /* Handled in lcd_dma.c */ + [7] = { + .name = "6", + .start = INT_1610_DMA_CH6, + .flags = IORESOURCE_IRQ, + }, + /* irq's for omap16xx and omap7xx */ + [8] = { + .name = "7", + .start = INT_1610_DMA_CH7, + .flags = IORESOURCE_IRQ, + }, + [9] = { + .name = "8", + .start = INT_1610_DMA_CH8, + .flags = IORESOURCE_IRQ, + }, + [10] = { + .name = "9", + .start = INT_1610_DMA_CH9, + .flags = IORESOURCE_IRQ, + }, + [11] = { + .name = "10", + .start = INT_1610_DMA_CH10, + .flags = IORESOURCE_IRQ, + }, + [12] = { + .name = "11", + .start = INT_1610_DMA_CH11, + .flags = IORESOURCE_IRQ, + }, + [13] = { + .name = "12", + .start = INT_1610_DMA_CH12, + .flags = IORESOURCE_IRQ, + }, + [14] = { + .name = "13", + .start = INT_1610_DMA_CH13, + .flags = IORESOURCE_IRQ, + }, + [15] = { + .name = "14", + .start = INT_1610_DMA_CH14, + .flags = IORESOURCE_IRQ, + }, + [16] = { + .name = "15", + .start = INT_1610_DMA_CH15, + .flags = IORESOURCE_IRQ, + }, + [17] = { + .name = "16", + .start = INT_DMA_LCD, + .flags = IORESOURCE_IRQ, + }, +}; + +static void __iomem *dma_base; +static inline void dma_write(u32 val, int reg, int lch) +{ + u8 stride; + u32 offset; + + stride = (reg >= dma_common_ch_start) ? dma_stride : 0; + offset = reg_map[reg] + (stride * lch); + + __raw_writew(val, dma_base + offset); + if ((reg > CLNK_CTRL && reg < CCEN) || + (reg > PCHD_ID && reg < CAPS_2)) { + u32 offset2 = reg_map[reg] + 2 + (stride * lch); + __raw_writew(val >> 16, dma_base + offset2); + } +} + +static inline u32 dma_read(int reg, int lch) +{ + u8 stride; + u32 offset, val; + + stride = (reg >= dma_common_ch_start) ? dma_stride : 0; + offset = reg_map[reg] + (stride * lch); + + val = __raw_readw(dma_base + offset); + if ((reg > CLNK_CTRL && reg < CCEN) || + (reg > PCHD_ID && reg < CAPS_2)) { + u16 upper; + u32 offset2 = reg_map[reg] + 2 + (stride * lch); + upper = __raw_readw(dma_base + offset2); + val |= (upper << 16); + } + return val; +} + +static void omap1_clear_lch_regs(int lch) +{ + int i = dma_common_ch_start; + + for (; i <= dma_common_ch_end; i += 1) + dma_write(0, i, lch); +} + +static void omap1_clear_dma(int lch) +{ + u32 l; + + l = dma_read(CCR, lch); + l &= ~OMAP_DMA_CCR_EN; + dma_write(l, CCR, lch); + + /* Clear pending interrupts */ + l = dma_read(CSR, lch); +} + +static void omap1_show_dma_caps(void) +{ + if (enable_1510_mode) { + printk(KERN_INFO "DMA support for OMAP15xx initialized\n"); + } else { + u16 w; + printk(KERN_INFO "OMAP DMA hardware version %d\n", + dma_read(HW_ID, 0)); + printk(KERN_INFO "DMA capabilities: %08x:%08x:%04x:%04x:%04x\n", + dma_read(CAPS_0, 0), dma_read(CAPS_1, 0), + dma_read(CAPS_2, 0), dma_read(CAPS_3, 0), + dma_read(CAPS_4, 0)); + + /* Disable OMAP 3.0/3.1 compatibility mode. */ + w = dma_read(GSCR, 0); + w |= 1 << 3; + dma_write(w, GSCR, 0); + } + return; +} + +static u32 configure_dma_errata(void) +{ + + /* + * Erratum 3.2/3.3: sometimes 0 is returned if CSAC/CDAC is + * read before the DMA controller finished disabling the channel. + */ + if (!cpu_is_omap15xx()) + SET_DMA_ERRATA(DMA_ERRATA_3_3); + + return errata; +} + +static int __init omap1_system_dma_init(void) +{ + struct omap_system_dma_plat_info *p; + struct omap_dma_dev_attr *d; + struct platform_device *pdev; + int ret; + + pdev = platform_device_alloc("omap_dma_system", 0); + if (!pdev) { + pr_err("%s: Unable to device alloc for dma\n", + __func__); + return -ENOMEM; + } + + dma_base = ioremap(res[0].start, resource_size(&res[0])); + if (!dma_base) { + pr_err("%s: Unable to ioremap\n", __func__); + return -ENODEV; + } + + ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); + if (ret) { + dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n", + __func__, pdev->name, pdev->id); + goto exit_device_del; + } + + p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL); + if (!p) { + dev_err(&pdev->dev, "%s: Unable to allocate 'p' for %s\n", + __func__, pdev->name); + ret = -ENOMEM; + goto exit_device_put; + } + + d = kzalloc(sizeof(struct omap_dma_dev_attr), GFP_KERNEL); + if (!d) { + dev_err(&pdev->dev, "%s: Unable to allocate 'd' for %s\n", + __func__, pdev->name); + ret = -ENOMEM; + goto exit_release_p; + } + + d->lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; + + /* Valid attributes for omap1 plus processors */ + if (cpu_is_omap15xx()) + d->dev_caps = ENABLE_1510_MODE; + enable_1510_mode = d->dev_caps & ENABLE_1510_MODE; + + d->dev_caps |= SRC_PORT; + d->dev_caps |= DST_PORT; + d->dev_caps |= SRC_INDEX; + d->dev_caps |= DST_INDEX; + d->dev_caps |= IS_BURST_ONLY4; + d->dev_caps |= CLEAR_CSR_ON_READ; + d->dev_caps |= IS_WORD_16; + + + d->chan = kzalloc(sizeof(struct omap_dma_lch) * + (d->lch_count), GFP_KERNEL); + if (!d->chan) { + dev_err(&pdev->dev, "%s: Memory allocation failed" + "for d->chan!!!\n", __func__); + goto exit_release_d; + } + + if (cpu_is_omap15xx()) + d->chan_count = 9; + else if (cpu_is_omap16xx() || cpu_is_omap7xx()) { + if (!(d->dev_caps & ENABLE_1510_MODE)) + d->chan_count = 16; + else + d->chan_count = 9; + } + + p->dma_attr = d; + + p->show_dma_caps = omap1_show_dma_caps; + p->clear_lch_regs = omap1_clear_lch_regs; + p->clear_dma = omap1_clear_dma; + p->dma_write = dma_write; + p->dma_read = dma_read; + p->disable_irq_lch = NULL; + + p->errata = configure_dma_errata(); + + ret = platform_device_add_data(pdev, p, sizeof(*p)); + if (ret) { + dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n", + __func__, pdev->name, pdev->id); + goto exit_release_chan; + } + + ret = platform_device_add(pdev); + if (ret) { + dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n", + __func__, pdev->name, pdev->id); + goto exit_release_chan; + } + + dma_stride = OMAP1_DMA_STRIDE; + dma_common_ch_start = CPC; + dma_common_ch_end = COLOR; + + return ret; + +exit_release_chan: + kfree(d->chan); +exit_release_d: + kfree(d); +exit_release_p: + kfree(p); +exit_device_put: + platform_device_put(pdev); +exit_device_del: + platform_device_del(pdev); + + return ret; +} +arch_initcall(omap1_system_dma_init); diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c new file mode 100644 index 000000000000..acd161666408 --- /dev/null +++ b/arch/arm/mach-omap1/flash.c @@ -0,0 +1,34 @@ +/* + * Flash support for OMAP1 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/mtd/mtd.h> +#include <linux/mtd/map.h> + +#include <plat/io.h> +#include <plat/tc.h> +#include <plat/flash.h> + +void omap1_set_vpp(struct map_info *map, int enable) +{ + static int count; + u32 l; + + if (enable) { + if (count++ == 0) { + l = omap_readl(EMIFS_CONFIG); + l |= OMAP_EMIFS_CONFIG_WP; + omap_writel(l, EMIFS_CONFIG); + } + } else { + if (count && (--count == 0)) { + l = omap_readl(EMIFS_CONFIG); + l &= ~OMAP_EMIFS_CONFIG_WP; + omap_writel(l, EMIFS_CONFIG); + } + } +} diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 4f2b8a7adb19..8780e75cdc3d 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -27,7 +27,7 @@ #include <asm/irq.h> #include <asm/mach/irq.h> -#include <mach/fpga.h> +#include <plat/fpga.h> #include <mach/gpio.h> static void fpga_mask_irq(unsigned int irq) @@ -143,7 +143,7 @@ static struct irq_chip omap_fpga_irq = { */ void omap1510_fpga_init_irq(void) { - int i; + int i, res; __raw_writeb(0, OMAP1510_FPGA_IMR_LO); __raw_writeb(0, OMAP1510_FPGA_IMR_HI); @@ -177,10 +177,12 @@ void omap1510_fpga_init_irq(void) * NOTE: For general GPIO/MPUIO access and interrupts, please see * gpio.[ch] */ - gpio_request(13, "FPGA irq"); + res = gpio_request(13, "FPGA irq"); + if (res) { + pr_err("%s failed to get gpio\n", __func__); + return; + } gpio_direction_input(13); set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); } - -EXPORT_SYMBOL(omap1510_fpga_init_irq); diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c new file mode 100644 index 000000000000..04c4b04cf54e --- /dev/null +++ b/arch/arm/mach-omap1/gpio15xx.c @@ -0,0 +1,99 @@ +/* + * OMAP15xx specific gpio init + * + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * + * Author: + * Charulatha V <charu@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/gpio.h> + +#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE +#define OMAP1510_GPIO_BASE 0xFFFCE000 + +/* gpio1 */ +static struct __initdata resource omap15xx_mpu_gpio_resources[] = { + { + .start = OMAP1_MPUIO_VBASE, + .end = OMAP1_MPUIO_VBASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_MPUIO, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = { + .virtual_irq_start = IH_MPUIO_BASE, + .bank_type = METHOD_MPUIO, + .bank_width = 16, + .bank_stride = 1, +}; + +static struct __initdata platform_device omap15xx_mpu_gpio = { + .name = "omap_gpio", + .id = 0, + .dev = { + .platform_data = &omap15xx_mpu_gpio_config, + }, + .num_resources = ARRAY_SIZE(omap15xx_mpu_gpio_resources), + .resource = omap15xx_mpu_gpio_resources, +}; + +/* gpio2 */ +static struct __initdata resource omap15xx_gpio_resources[] = { + { + .start = OMAP1510_GPIO_BASE, + .end = OMAP1510_GPIO_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_GPIO_BANK1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = { + .virtual_irq_start = IH_GPIO_BASE, + .bank_type = METHOD_GPIO_1510, + .bank_width = 16, +}; + +static struct __initdata platform_device omap15xx_gpio = { + .name = "omap_gpio", + .id = 1, + .dev = { + .platform_data = &omap15xx_gpio_config, + }, + .num_resources = ARRAY_SIZE(omap15xx_gpio_resources), + .resource = omap15xx_gpio_resources, +}; + +/* + * omap15xx_gpio_init needs to be done before + * machine_init functions access gpio APIs. + * Hence omap15xx_gpio_init is a postcore_initcall. + */ +static int __init omap15xx_gpio_init(void) +{ + if (!cpu_is_omap15xx()) + return -EINVAL; + + platform_device_register(&omap15xx_mpu_gpio); + platform_device_register(&omap15xx_gpio); + + gpio_bank_count = 2; + return 0; +} +postcore_initcall(omap15xx_gpio_init); diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c new file mode 100644 index 000000000000..5dd0d4c82b24 --- /dev/null +++ b/arch/arm/mach-omap1/gpio16xx.c @@ -0,0 +1,200 @@ +/* + * OMAP16xx specific gpio init + * + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * + * Author: + * Charulatha V <charu@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/gpio.h> + +#define OMAP1610_GPIO1_BASE 0xfffbe400 +#define OMAP1610_GPIO2_BASE 0xfffbec00 +#define OMAP1610_GPIO3_BASE 0xfffbb400 +#define OMAP1610_GPIO4_BASE 0xfffbbc00 +#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE + +/* mpu gpio */ +static struct __initdata resource omap16xx_mpu_gpio_resources[] = { + { + .start = OMAP1_MPUIO_VBASE, + .end = OMAP1_MPUIO_VBASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_MPUIO, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { + .virtual_irq_start = IH_MPUIO_BASE, + .bank_type = METHOD_MPUIO, + .bank_width = 16, + .bank_stride = 1, +}; + +static struct __initdata platform_device omap16xx_mpu_gpio = { + .name = "omap_gpio", + .id = 0, + .dev = { + .platform_data = &omap16xx_mpu_gpio_config, + }, + .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources), + .resource = omap16xx_mpu_gpio_resources, +}; + +/* gpio1 */ +static struct __initdata resource omap16xx_gpio1_resources[] = { + { + .start = OMAP1610_GPIO1_BASE, + .end = OMAP1610_GPIO1_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_GPIO_BANK1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = { + .virtual_irq_start = IH_GPIO_BASE, + .bank_type = METHOD_GPIO_1610, + .bank_width = 16, +}; + +static struct __initdata platform_device omap16xx_gpio1 = { + .name = "omap_gpio", + .id = 1, + .dev = { + .platform_data = &omap16xx_gpio1_config, + }, + .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources), + .resource = omap16xx_gpio1_resources, +}; + +/* gpio2 */ +static struct __initdata resource omap16xx_gpio2_resources[] = { + { + .start = OMAP1610_GPIO2_BASE, + .end = OMAP1610_GPIO2_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_1610_GPIO_BANK2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = { + .virtual_irq_start = IH_GPIO_BASE + 16, + .bank_type = METHOD_GPIO_1610, + .bank_width = 16, +}; + +static struct __initdata platform_device omap16xx_gpio2 = { + .name = "omap_gpio", + .id = 2, + .dev = { + .platform_data = &omap16xx_gpio2_config, + }, + .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources), + .resource = omap16xx_gpio2_resources, +}; + +/* gpio3 */ +static struct __initdata resource omap16xx_gpio3_resources[] = { + { + .start = OMAP1610_GPIO3_BASE, + .end = OMAP1610_GPIO3_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_1610_GPIO_BANK3, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = { + .virtual_irq_start = IH_GPIO_BASE + 32, + .bank_type = METHOD_GPIO_1610, + .bank_width = 16, +}; + +static struct __initdata platform_device omap16xx_gpio3 = { + .name = "omap_gpio", + .id = 3, + .dev = { + .platform_data = &omap16xx_gpio3_config, + }, + .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources), + .resource = omap16xx_gpio3_resources, +}; + +/* gpio4 */ +static struct __initdata resource omap16xx_gpio4_resources[] = { + { + .start = OMAP1610_GPIO4_BASE, + .end = OMAP1610_GPIO4_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_1610_GPIO_BANK4, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = { + .virtual_irq_start = IH_GPIO_BASE + 48, + .bank_type = METHOD_GPIO_1610, + .bank_width = 16, +}; + +static struct __initdata platform_device omap16xx_gpio4 = { + .name = "omap_gpio", + .id = 4, + .dev = { + .platform_data = &omap16xx_gpio4_config, + }, + .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources), + .resource = omap16xx_gpio4_resources, +}; + +static struct __initdata platform_device * omap16xx_gpio_dev[] = { + &omap16xx_mpu_gpio, + &omap16xx_gpio1, + &omap16xx_gpio2, + &omap16xx_gpio3, + &omap16xx_gpio4, +}; + +/* + * omap16xx_gpio_init needs to be done before + * machine_init functions access gpio APIs. + * Hence omap16xx_gpio_init is a postcore_initcall. + */ +static int __init omap16xx_gpio_init(void) +{ + int i; + + if (!cpu_is_omap16xx()) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) + platform_device_register(omap16xx_gpio_dev[i]); + + gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev); + + return 0; +} +postcore_initcall(omap16xx_gpio_init); diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c new file mode 100644 index 000000000000..1204c8b871af --- /dev/null +++ b/arch/arm/mach-omap1/gpio7xx.c @@ -0,0 +1,262 @@ +/* + * OMAP7xx specific gpio init + * + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * + * Author: + * Charulatha V <charu@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/gpio.h> + +#define OMAP7XX_GPIO1_BASE 0xfffbc000 +#define OMAP7XX_GPIO2_BASE 0xfffbc800 +#define OMAP7XX_GPIO3_BASE 0xfffbd000 +#define OMAP7XX_GPIO4_BASE 0xfffbd800 +#define OMAP7XX_GPIO5_BASE 0xfffbe000 +#define OMAP7XX_GPIO6_BASE 0xfffbe800 +#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE + +/* mpu gpio */ +static struct __initdata resource omap7xx_mpu_gpio_resources[] = { + { + .start = OMAP1_MPUIO_VBASE, + .end = OMAP1_MPUIO_VBASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_7XX_MPUIO, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { + .virtual_irq_start = IH_MPUIO_BASE, + .bank_type = METHOD_MPUIO, + .bank_width = 32, + .bank_stride = 2, +}; + +static struct __initdata platform_device omap7xx_mpu_gpio = { + .name = "omap_gpio", + .id = 0, + .dev = { + .platform_data = &omap7xx_mpu_gpio_config, + }, + .num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources), + .resource = omap7xx_mpu_gpio_resources, +}; + +/* gpio1 */ +static struct __initdata resource omap7xx_gpio1_resources[] = { + { + .start = OMAP7XX_GPIO1_BASE, + .end = OMAP7XX_GPIO1_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_7XX_GPIO_BANK1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = { + .virtual_irq_start = IH_GPIO_BASE, + .bank_type = METHOD_GPIO_7XX, + .bank_width = 32, +}; + +static struct __initdata platform_device omap7xx_gpio1 = { + .name = "omap_gpio", + .id = 1, + .dev = { + .platform_data = &omap7xx_gpio1_config, + }, + .num_resources = ARRAY_SIZE(omap7xx_gpio1_resources), + .resource = omap7xx_gpio1_resources, +}; + +/* gpio2 */ +static struct __initdata resource omap7xx_gpio2_resources[] = { + { + .start = OMAP7XX_GPIO2_BASE, + .end = OMAP7XX_GPIO2_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_7XX_GPIO_BANK2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = { + .virtual_irq_start = IH_GPIO_BASE + 32, + .bank_type = METHOD_GPIO_7XX, + .bank_width = 32, +}; + +static struct __initdata platform_device omap7xx_gpio2 = { + .name = "omap_gpio", + .id = 2, + .dev = { + .platform_data = &omap7xx_gpio2_config, + }, + .num_resources = ARRAY_SIZE(omap7xx_gpio2_resources), + .resource = omap7xx_gpio2_resources, +}; + +/* gpio3 */ +static struct __initdata resource omap7xx_gpio3_resources[] = { + { + .start = OMAP7XX_GPIO3_BASE, + .end = OMAP7XX_GPIO3_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_7XX_GPIO_BANK3, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = { + .virtual_irq_start = IH_GPIO_BASE + 64, + .bank_type = METHOD_GPIO_7XX, + .bank_width = 32, +}; + +static struct __initdata platform_device omap7xx_gpio3 = { + .name = "omap_gpio", + .id = 3, + .dev = { + .platform_data = &omap7xx_gpio3_config, + }, + .num_resources = ARRAY_SIZE(omap7xx_gpio3_resources), + .resource = omap7xx_gpio3_resources, +}; + +/* gpio4 */ +static struct __initdata resource omap7xx_gpio4_resources[] = { + { + .start = OMAP7XX_GPIO4_BASE, + .end = OMAP7XX_GPIO4_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_7XX_GPIO_BANK4, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = { + .virtual_irq_start = IH_GPIO_BASE + 96, + .bank_type = METHOD_GPIO_7XX, + .bank_width = 32, +}; + +static struct __initdata platform_device omap7xx_gpio4 = { + .name = "omap_gpio", + .id = 4, + .dev = { + .platform_data = &omap7xx_gpio4_config, + }, + .num_resources = ARRAY_SIZE(omap7xx_gpio4_resources), + .resource = omap7xx_gpio4_resources, +}; + +/* gpio5 */ +static struct __initdata resource omap7xx_gpio5_resources[] = { + { + .start = OMAP7XX_GPIO5_BASE, + .end = OMAP7XX_GPIO5_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_7XX_GPIO_BANK5, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = { + .virtual_irq_start = IH_GPIO_BASE + 128, + .bank_type = METHOD_GPIO_7XX, + .bank_width = 32, +}; + +static struct __initdata platform_device omap7xx_gpio5 = { + .name = "omap_gpio", + .id = 5, + .dev = { + .platform_data = &omap7xx_gpio5_config, + }, + .num_resources = ARRAY_SIZE(omap7xx_gpio5_resources), + .resource = omap7xx_gpio5_resources, +}; + +/* gpio6 */ +static struct __initdata resource omap7xx_gpio6_resources[] = { + { + .start = OMAP7XX_GPIO6_BASE, + .end = OMAP7XX_GPIO6_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_7XX_GPIO_BANK6, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = { + .virtual_irq_start = IH_GPIO_BASE + 160, + .bank_type = METHOD_GPIO_7XX, + .bank_width = 32, +}; + +static struct __initdata platform_device omap7xx_gpio6 = { + .name = "omap_gpio", + .id = 6, + .dev = { + .platform_data = &omap7xx_gpio6_config, + }, + .num_resources = ARRAY_SIZE(omap7xx_gpio6_resources), + .resource = omap7xx_gpio6_resources, +}; + +static struct __initdata platform_device * omap7xx_gpio_dev[] = { + &omap7xx_mpu_gpio, + &omap7xx_gpio1, + &omap7xx_gpio2, + &omap7xx_gpio3, + &omap7xx_gpio4, + &omap7xx_gpio5, + &omap7xx_gpio6, +}; + +/* + * omap7xx_gpio_init needs to be done before + * machine_init functions access gpio APIs. + * Hence omap7xx_gpio_init is a postcore_initcall. + */ +static int __init omap7xx_gpio_init(void) +{ + int i; + + if (!cpu_is_omap7xx()) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++) + platform_device_register(omap7xx_gpio_dev[i]); + + gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev); + + return 0; +} +postcore_initcall(omap7xx_gpio_init); diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c new file mode 100644 index 000000000000..5446c9912641 --- /dev/null +++ b/arch/arm/mach-omap1/i2c.c @@ -0,0 +1,35 @@ +/* + * Helper module for board specific I2C bus registration + * + * Copyright (C) 2009 Nokia Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <plat/i2c.h> +#include <plat/mux.h> +#include <plat/cpu.h> + +void __init omap1_i2c_mux_pins(int bus_id) +{ + if (cpu_is_omap7xx()) { + omap_cfg_reg(I2C_7XX_SDA); + omap_cfg_reg(I2C_7XX_SCL); + } else { + omap_cfg_reg(I2C_SDA); + omap_cfg_reg(I2C_SCL); + } +} diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index 4ef26faf083e..a0e3560b39db 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c @@ -15,7 +15,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> -#include <mach/cpu.h> +#include <plat/cpu.h> #define OMAP_DIE_ID_0 0xfffe1800 #define OMAP_DIE_ID_1 0xfffe1804 @@ -38,7 +38,7 @@ static struct omap_id omap_ids[] __initdata = { { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000}, { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100}, { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300}, - { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320500, .type = 0x08500000}, + { .jtag_id = 0xb62c, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x08500000}, { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000}, { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000}, { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000}, diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h new file mode 100644 index 000000000000..7a2df29400ca --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h @@ -0,0 +1,79 @@ +/* + * arch/arm/mach-omap1/include/ams-delta-fiq.h + * + * Taken from the original Amstrad modifications to fiq.h + * + * Copyright (c) 2004 Amstrad Plc + * Copyright (c) 2006 Matt Callow + * Copyright (c) 2010 Janusz Krzysztofik + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __AMS_DELTA_FIQ_H +#define __AMS_DELTA_FIQ_H + +#include <plat/irqs.h> + +/* + * Interrupt number used for passing control from FIQ to IRQ. + * IRQ12, described as reserved, has been selected. + */ +#define INT_DEFERRED_FIQ INT_1510_RES12 +/* + * Base address of an interrupt handler that the INT_DEFERRED_FIQ belongs to. + */ +#if (INT_DEFERRED_FIQ < IH2_BASE) +#define DEFERRED_FIQ_IH_BASE OMAP_IH1_BASE +#else +#define DEFERRED_FIQ_IH_BASE OMAP_IH2_BASE +#endif + +/* + * These are the offsets from the begining of the fiq_buffer. They are put here + * since the buffer and header need to be accessed by drivers servicing devices + * which generate GPIO interrupts - e.g. keyboard, modem, hook switch. + */ +#define FIQ_MASK 0 +#define FIQ_STATE 1 +#define FIQ_KEYS_CNT 2 +#define FIQ_TAIL_OFFSET 3 +#define FIQ_HEAD_OFFSET 4 +#define FIQ_BUF_LEN 5 +#define FIQ_KEY 6 +#define FIQ_MISSED_KEYS 7 +#define FIQ_BUFFER_START 8 +#define FIQ_GPIO_INT_MASK 9 +#define FIQ_KEYS_HICNT 10 +#define FIQ_IRQ_PEND 11 +#define FIQ_SIR_CODE_L1 12 +#define IRQ_SIR_CODE_L2 13 + +#define FIQ_CNT_INT_00 14 +#define FIQ_CNT_INT_KEY 15 +#define FIQ_CNT_INT_MDM 16 +#define FIQ_CNT_INT_03 17 +#define FIQ_CNT_INT_HSW 18 +#define FIQ_CNT_INT_05 19 +#define FIQ_CNT_INT_06 20 +#define FIQ_CNT_INT_07 21 +#define FIQ_CNT_INT_08 22 +#define FIQ_CNT_INT_09 23 +#define FIQ_CNT_INT_10 24 +#define FIQ_CNT_INT_11 25 +#define FIQ_CNT_INT_12 26 +#define FIQ_CNT_INT_13 27 +#define FIQ_CNT_INT_14 28 +#define FIQ_CNT_INT_15 29 + +#define FIQ_CIRC_BUFF 30 /*Start of circular buffer */ + +#ifndef __ASSEMBLER__ +extern unsigned int fiq_buffer[]; +extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end; + +extern void __init ams_delta_init_fiq(void); +#endif + +#endif diff --git a/arch/arm/mach-omap1/include/mach/camera.h b/arch/arm/mach-omap1/include/mach/camera.h new file mode 100644 index 000000000000..847d00f0bb0a --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/camera.h @@ -0,0 +1,13 @@ +#ifndef __ASM_ARCH_CAMERA_H_ +#define __ASM_ARCH_CAMERA_H_ + +#include <media/omap1_camera.h> + +void omap1_camera_init(void *); + +static inline void omap1_set_camera_info(struct omap1_cam_platform_data *info) +{ + omap1_camera_init(info); +} + +#endif /* __ASM_ARCH_CAMERA_H_ */ diff --git a/arch/arm/mach-omap1/include/mach/clkdev.h b/arch/arm/mach-omap1/include/mach/clkdev.h new file mode 100644 index 000000000000..ea8640e4603e --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/clkdev.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/clkdev.h + */ + +#include <plat/clkdev.h> diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S new file mode 100644 index 000000000000..6a0fa0462365 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S @@ -0,0 +1,104 @@ +/* arch/arm/mach-omap1/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include <linux/serial_reg.h> + +#include <asm/memory.h> + +#include <plat/serial.h> + + .pushsection .data +omap_uart_phys: .word 0x0 +omap_uart_virt: .word 0x0 + .popsection + + /* + * Note that this code won't work if the bootloader passes + * a wrong machine ID number in r1. To debug, just hardcode + * the desired UART phys and virt addresses temporarily into + * the omap_uart_phys and omap_uart_virt above. + */ + .macro addruart, rp, rv + + /* Use omap_uart_phys/virt if already configured */ +9: mrc p15, 0, \rp, c1, c0 + tst \rp, #1 @ MMU enabled? + ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled + ldrne \rp, =omap_uart_phys @ MMU enabled + add \rv, \rp, #4 @ omap_uart_virt + ldr \rp, [\rp, #0] + ldr \rv, [\rv, #0] + cmp \rp, #0 @ is port configured? + cmpne \rv, #0 + bne 99f @ already configured + + /* Check the debug UART configuration set in uncompress.h */ + mrc p15, 0, \rp, c1, c0 + tst \rp, #1 @ MMU enabled? + ldreq \rp, =OMAP_UART_INFO @ MMU not enabled + ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled + ldr \rp, [\rp, #0] + + /* Select the UART to use based on the UART1 scratchpad value */ +10: cmp \rp, #0 @ no port configured? + beq 11f @ if none, try to use UART1 + cmp \rp, #OMAP1UART1 + beq 11f @ configure OMAP1UART1 + cmp \rp, #OMAP1UART2 + beq 12f @ configure OMAP1UART2 + cmp \rp, #OMAP1UART3 + beq 13f @ configure OMAP2UART3 + + /* Configure the UART offset from the phys/virt base */ +11: mov \rp, #0x00fb0000 @ OMAP1UART1 + b 98f +12: mov \rp, #0x00fb0000 @ OMAP1UART1 + orr \rp, \rp, #0x00000800 @ OMAP1UART2 + b 98f +13: mov \rp, #0x00fb0000 @ OMAP1UART1 + orr \rp, \rp, #0x00000800 @ OMAP1UART2 + orr \rp, \rp, #0x00009000 @ OMAP1UART3 + + /* Store both phys and virt address for the uart */ +98: add \rp, \rp, #0xff000000 @ phys base + mrc p15, 0, \rv, c1, c0 + tst \rv, #1 @ MMU enabled? + ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled + ldrne \rv, =omap_uart_phys @ MMU enabled + str \rp, [\rv, #0] + sub \rp, \rp, #0xff000000 @ phys base + add \rp, \rp, #0xfe000000 @ virt base + add \rv, \rv, #4 @ omap_uart_lsr + str \rp, [\rv, #0] + b 9b +99: + .endm + + .macro senduart,rd,rx + strb \rd, [\rx] + .endm + + .macro busyuart,rd,rx +1001: ldrb \rd, [\rx, #(UART_LSR << OMAP_PORT_SHIFT)] + and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) + teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) + beq 1002f + ldrb \rd, [\rx, #(UART_LSR << OMAP7XX_PORT_SHIFT)] + and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) + teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) + bne 1001b +1002: + .endm + + .macro waituart,rd,rx + .endm diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S new file mode 100644 index 000000000000..c9be6d4d83e2 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/entry-macro.S @@ -0,0 +1,59 @@ +/* + * arch/arm/mach-omap1/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for OMAP-based platforms + * + * Copyright (C) 2009 Texas Instruments + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <mach/hardware.h> +#include <mach/io.h> +#include <mach/irqs.h> +#include <asm/hardware/gic.h> + +/* + * We use __glue to avoid errors with multiple definitions of + * .globl omap_irq_flags as it's included from entry-armv.S but not + * from entry-common.S. + */ +#ifdef __glue + .pushsection .data + .globl omap_irq_flags +omap_irq_flags: + .word 0 + .popsection +#endif + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) + ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] + ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] + mov \irqstat, #0xffffffff + bic \tmp, \irqstat, \tmp + tst \irqnr, \tmp + beq 1510f + + ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET] + ldr \tmp, =omap_irq_flags @ irq flags address + ldr \tmp, [\tmp, #0] @ irq flags value + cmp \irqnr, #0 + ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] + cmpeq \irqnr, \tmp + ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE) + ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] + addeqs \irqnr, \irqnr, #32 +1510: + .endm + diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h new file mode 100644 index 000000000000..e737706a8fe1 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/gpio.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/gpio.h + */ + +#include <plat/gpio.h> diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h new file mode 100644 index 000000000000..a3f6287b2007 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/hardware.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/hardware.h + */ + +#include <plat/hardware.h> diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h new file mode 100644 index 000000000000..57bdf74a3e64 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/io.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/io.h + */ + +#include <plat/io.h> diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/include/mach/irqs.h new file mode 100644 index 000000000000..9292fdc1cb0b --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/irqs.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/irqs.h + */ + +#include <plat/irqs.h> diff --git a/arch/arm/mach-omap1/include/mach/lcd_dma.h b/arch/arm/mach-omap1/include/mach/lcd_dma.h new file mode 100644 index 000000000000..d7a457bbcb7f --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/lcd_dma.h @@ -0,0 +1,78 @@ +/* + * arch/arm/mach-omap1/include/mach/lcd_dma.h + * + * Extracted from arch/arm/plat-omap/include/plat/dma.h + * Copyright (C) 2003 Nokia Corporation + * Author: Juha Yrjölä <juha.yrjola@nokia.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __MACH_OMAP1_LCD_DMA_H__ +#define __MACH_OMAP1_LCD_DMA_H__ + +/* Hardware registers for LCD DMA */ +#define OMAP1510_DMA_LCD_BASE (0xfffedb00) +#define OMAP1510_DMA_LCD_CTRL (OMAP1510_DMA_LCD_BASE + 0x00) +#define OMAP1510_DMA_LCD_TOP_F1_L (OMAP1510_DMA_LCD_BASE + 0x02) +#define OMAP1510_DMA_LCD_TOP_F1_U (OMAP1510_DMA_LCD_BASE + 0x04) +#define OMAP1510_DMA_LCD_BOT_F1_L (OMAP1510_DMA_LCD_BASE + 0x06) +#define OMAP1510_DMA_LCD_BOT_F1_U (OMAP1510_DMA_LCD_BASE + 0x08) + +#define OMAP1610_DMA_LCD_BASE (0xfffee300) +#define OMAP1610_DMA_LCD_CSDP (OMAP1610_DMA_LCD_BASE + 0xc0) +#define OMAP1610_DMA_LCD_CCR (OMAP1610_DMA_LCD_BASE + 0xc2) +#define OMAP1610_DMA_LCD_CTRL (OMAP1610_DMA_LCD_BASE + 0xc4) +#define OMAP1610_DMA_LCD_TOP_B1_L (OMAP1610_DMA_LCD_BASE + 0xc8) +#define OMAP1610_DMA_LCD_TOP_B1_U (OMAP1610_DMA_LCD_BASE + 0xca) +#define OMAP1610_DMA_LCD_BOT_B1_L (OMAP1610_DMA_LCD_BASE + 0xcc) +#define OMAP1610_DMA_LCD_BOT_B1_U (OMAP1610_DMA_LCD_BASE + 0xce) +#define OMAP1610_DMA_LCD_TOP_B2_L (OMAP1610_DMA_LCD_BASE + 0xd0) +#define OMAP1610_DMA_LCD_TOP_B2_U (OMAP1610_DMA_LCD_BASE + 0xd2) +#define OMAP1610_DMA_LCD_BOT_B2_L (OMAP1610_DMA_LCD_BASE + 0xd4) +#define OMAP1610_DMA_LCD_BOT_B2_U (OMAP1610_DMA_LCD_BASE + 0xd6) +#define OMAP1610_DMA_LCD_SRC_EI_B1 (OMAP1610_DMA_LCD_BASE + 0xd8) +#define OMAP1610_DMA_LCD_SRC_FI_B1_L (OMAP1610_DMA_LCD_BASE + 0xda) +#define OMAP1610_DMA_LCD_SRC_EN_B1 (OMAP1610_DMA_LCD_BASE + 0xe0) +#define OMAP1610_DMA_LCD_SRC_FN_B1 (OMAP1610_DMA_LCD_BASE + 0xe4) +#define OMAP1610_DMA_LCD_LCH_CTRL (OMAP1610_DMA_LCD_BASE + 0xea) +#define OMAP1610_DMA_LCD_SRC_FI_B1_U (OMAP1610_DMA_LCD_BASE + 0xf4) + +/* LCD DMA block numbers */ +enum { + OMAP_LCD_DMA_B1_TOP, + OMAP_LCD_DMA_B1_BOTTOM, + OMAP_LCD_DMA_B2_TOP, + OMAP_LCD_DMA_B2_BOTTOM +}; + +/* LCD DMA functions */ +extern int omap_request_lcd_dma(void (*callback)(u16 status, void *data), + void *data); +extern void omap_free_lcd_dma(void); +extern void omap_setup_lcd_dma(void); +extern void omap_enable_lcd_dma(void); +extern void omap_stop_lcd_dma(void); +extern void omap_set_lcd_dma_ext_controller(int external); +extern void omap_set_lcd_dma_single_transfer(int single); +extern void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres, + int data_type); +extern void omap_set_lcd_dma_b1_rotation(int rotate); +extern void omap_set_lcd_dma_b1_vxres(unsigned long vxres); +extern void omap_set_lcd_dma_b1_mirror(int mirror); +extern void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale); + +extern int omap_lcd_dma_running(void); + +#endif /* __MACH_OMAP1_LCD_DMA_H__ */ diff --git a/arch/arm/mach-omap1/include/mach/lcdc.h b/arch/arm/mach-omap1/include/mach/lcdc.h new file mode 100644 index 000000000000..89bd703adaf6 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/lcdc.h @@ -0,0 +1,57 @@ +/* + * arch/arm/mach-omap1/include/mach/lcdc.h + * + * Extracted from drivers/video/omap/lcdc.c + * Copyright (C) 2004 Nokia Corporation + * Author: Imre Deak <imre.deak@nokia.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#ifndef __MACH_LCDC_H__ +#define __MACH_LCDC_H__ + +#define OMAP_LCDC_BASE 0xfffec000 +#define OMAP_LCDC_SIZE 256 +#define OMAP_LCDC_IRQ INT_LCD_CTRL + +#define OMAP_LCDC_CONTROL (OMAP_LCDC_BASE + 0x00) +#define OMAP_LCDC_TIMING0 (OMAP_LCDC_BASE + 0x04) +#define OMAP_LCDC_TIMING1 (OMAP_LCDC_BASE + 0x08) +#define OMAP_LCDC_TIMING2 (OMAP_LCDC_BASE + 0x0c) +#define OMAP_LCDC_STATUS (OMAP_LCDC_BASE + 0x10) +#define OMAP_LCDC_SUBPANEL (OMAP_LCDC_BASE + 0x14) +#define OMAP_LCDC_LINE_INT (OMAP_LCDC_BASE + 0x18) +#define OMAP_LCDC_DISPLAY_STATUS (OMAP_LCDC_BASE + 0x1c) + +#define OMAP_LCDC_STAT_DONE (1 << 0) +#define OMAP_LCDC_STAT_VSYNC (1 << 1) +#define OMAP_LCDC_STAT_SYNC_LOST (1 << 2) +#define OMAP_LCDC_STAT_ABC (1 << 3) +#define OMAP_LCDC_STAT_LINE_INT (1 << 4) +#define OMAP_LCDC_STAT_FUF (1 << 5) +#define OMAP_LCDC_STAT_LOADED_PALETTE (1 << 6) + +#define OMAP_LCDC_CTRL_LCD_EN (1 << 0) +#define OMAP_LCDC_CTRL_LCD_TFT (1 << 7) +#define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL (1 << 10) + +#define OMAP_LCDC_IRQ_VSYNC (1 << 2) +#define OMAP_LCDC_IRQ_DONE (1 << 3) +#define OMAP_LCDC_IRQ_LOADED_PALETTE (1 << 4) +#define OMAP_LCDC_IRQ_LINE_NIRQ (1 << 5) +#define OMAP_LCDC_IRQ_LINE (1 << 6) +#define OMAP_LCDC_IRQ_MASK (((1 << 5) - 1) << 2) + +#endif /* __MACH_LCDC_H__ */ diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h new file mode 100644 index 000000000000..e9b600c113ef --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/memory.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/memory.h + */ + +#include <plat/memory.h> diff --git a/arch/arm/mach-omap1/include/mach/mtd-xip.h b/arch/arm/mach-omap1/include/mach/mtd-xip.h new file mode 100644 index 000000000000..f82a8dcaad94 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/mtd-xip.h @@ -0,0 +1,61 @@ +/* + * MTD primitives for XIP support. Architecture specific functions. + * + * Do not include this file directly. It's included from linux/mtd/xip.h + * + * Author: Vladimir Barinov <vbarinov@embeddedalley.com> + * + * (c) 2005 MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express or + * implied. + */ + +#ifndef __ARCH_OMAP_MTD_XIP_H__ +#define __ARCH_OMAP_MTD_XIP_H__ + +#include <mach/hardware.h> +#define OMAP_MPU_TIMER_BASE (0xfffec500) +#define OMAP_MPU_TIMER_OFFSET 0x100 + +typedef struct { + u32 cntl; /* CNTL_TIMER, R/W */ + u32 load_tim; /* LOAD_TIM, W */ + u32 read_tim; /* READ_TIM, R */ +} xip_omap_mpu_timer_regs_t; + +#define xip_omap_mpu_timer_base(n) \ +((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ + (n)*OMAP_MPU_TIMER_OFFSET)) + +static inline unsigned long xip_omap_mpu_timer_read(int nr) +{ + volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr); + return timer->read_tim; +} + +#define xip_irqpending() \ + (omap_readl(OMAP_IH1_ITR) & ~omap_readl(OMAP_IH1_MIR)) +#define xip_currtime() (~xip_omap_mpu_timer_read(0)) + +/* + * It's permitted to do approxmation for xip_elapsed_since macro + * (see linux/mtd/xip.h) + */ + +#ifdef CONFIG_MACH_OMAP_PERSEUS2 +#define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 7) +#else +#define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 6) +#endif + +/* + * xip_cpu_idle() is used when waiting for a delay equal or larger than + * the system timer tick period. This should put the CPU into idle mode + * to save power and to be woken up only when some interrupts are pending. + * As above, this should not rely upon standard kernel code. + */ + +#define xip_cpu_idle() asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (1)) + +#endif /* __ARCH_OMAP_MTD_XIP_H__ */ diff --git a/arch/arm/mach-omap1/include/mach/smp.h b/arch/arm/mach-omap1/include/mach/smp.h new file mode 100644 index 000000000000..80a371c06e59 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/smp.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/smp.h + */ + +#include <plat/smp.h> diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h new file mode 100644 index 000000000000..a6c1b3a16dfc --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/system.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/system.h + */ + +#include <plat/system.h> diff --git a/arch/arm/mach-omap1/include/mach/timex.h b/arch/arm/mach-omap1/include/mach/timex.h new file mode 100644 index 000000000000..4793790d53cc --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/timex.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/timex.h + */ + +#include <plat/timex.h> diff --git a/arch/arm/mach-omap1/include/mach/uncompress.h b/arch/arm/mach-omap1/include/mach/uncompress.h new file mode 100644 index 000000000000..0ff22dc075c7 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/uncompress.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/uncompress.h + */ + +#include <plat/uncompress.h> diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h new file mode 100644 index 000000000000..22ec4a479577 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/vmalloc.h @@ -0,0 +1,20 @@ +/* + * arch/arm/mach-omap1/include/mach/vmalloc.h + * + * Copyright (C) 2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#define VMALLOC_END 0xd8000000UL diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 3afe540149f7..870886a29594 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -15,13 +15,13 @@ #include <asm/tlb.h> #include <asm/mach/map.h> -#include <mach/mux.h> -#include <mach/tc.h> +#include <plat/mux.h> +#include <plat/tc.h> + +#include "clock.h" -extern int omap1_clk_init(void); extern void omap_check_revision(void); extern void omap_sram_init(void); -extern void omapfb_reserve_sdram(void); /* * The machine specific code may provide the extra mapping besides the @@ -29,40 +29,24 @@ extern void omapfb_reserve_sdram(void); */ static struct map_desc omap_io_desc[] __initdata = { { - .virtual = IO_VIRT, - .pfn = __phys_to_pfn(IO_PHYS), - .length = IO_SIZE, + .virtual = OMAP1_IO_VIRT, + .pfn = __phys_to_pfn(OMAP1_IO_PHYS), + .length = OMAP1_IO_SIZE, .type = MT_DEVICE } }; -#ifdef CONFIG_ARCH_OMAP730 -static struct map_desc omap730_io_desc[] __initdata = { - { - .virtual = OMAP730_DSP_BASE, - .pfn = __phys_to_pfn(OMAP730_DSP_START), - .length = OMAP730_DSP_SIZE, - .type = MT_DEVICE - }, { - .virtual = OMAP730_DSPREG_BASE, - .pfn = __phys_to_pfn(OMAP730_DSPREG_START), - .length = OMAP730_DSPREG_SIZE, - .type = MT_DEVICE - } -}; -#endif - -#ifdef CONFIG_ARCH_OMAP850 -static struct map_desc omap850_io_desc[] __initdata = { +#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) +static struct map_desc omap7xx_io_desc[] __initdata = { { - .virtual = OMAP850_DSP_BASE, - .pfn = __phys_to_pfn(OMAP850_DSP_START), - .length = OMAP850_DSP_SIZE, + .virtual = OMAP7XX_DSP_BASE, + .pfn = __phys_to_pfn(OMAP7XX_DSP_START), + .length = OMAP7XX_DSP_SIZE, .type = MT_DEVICE }, { - .virtual = OMAP850_DSPREG_BASE, - .pfn = __phys_to_pfn(OMAP850_DSPREG_START), - .length = OMAP850_DSPREG_SIZE, + .virtual = OMAP7XX_DSPREG_BASE, + .pfn = __phys_to_pfn(OMAP7XX_DSPREG_START), + .length = OMAP7XX_DSPREG_SIZE, .type = MT_DEVICE } }; @@ -120,18 +104,11 @@ void __init omap1_map_common_io(void) */ omap_check_revision(); -#ifdef CONFIG_ARCH_OMAP730 - if (cpu_is_omap730()) { - iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc)); +#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) + if (cpu_is_omap7xx()) { + iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc)); } #endif - -#ifdef CONFIG_ARCH_OMAP850 - if (cpu_is_omap850()) { - iotable_init(omap850_io_desc, ARRAY_SIZE(omap850_io_desc)); - } -#endif - #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap15xx()) { iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); @@ -144,7 +121,6 @@ void __init omap1_map_common_io(void) #endif omap_sram_init(); - omapfb_reserve_sdram(); } /* @@ -166,3 +142,42 @@ void __init omap1_init_common_hw(void) omap1_mux_init(); } +/* + * NOTE: Please use ioremap + __raw_read/write where possible instead of these + */ + +u8 omap_readb(u32 pa) +{ + return __raw_readb(OMAP1_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_readb); + +u16 omap_readw(u32 pa) +{ + return __raw_readw(OMAP1_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_readw); + +u32 omap_readl(u32 pa) +{ + return __raw_readl(OMAP1_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_readl); + +void omap_writeb(u8 v, u32 pa) +{ + __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_writeb); + +void omap_writew(u16 v, u32 pa) +{ + __raw_writew(v, OMAP1_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_writew); + +void omap_writel(u32 v, u32 pa) +{ + __raw_writel(v, OMAP1_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_writel); diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index de03c8448994..6bddbc869f4c 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -46,7 +46,7 @@ #include <asm/irq.h> #include <asm/mach/irq.h> #include <mach/gpio.h> -#include <mach/cpu.h> +#include <plat/cpu.h> #define IRQ_BANK(irq) ((irq) >> 5) #define IRQ_BIT(irq) ((irq) & 0x1f) @@ -137,16 +137,8 @@ static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger) irq_bank_writel(val, bank, offset); } -#ifdef CONFIG_ARCH_OMAP730 -static struct omap_irq_bank omap730_irq_banks[] = { - { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, - { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, - { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, -}; -#endif - -#ifdef CONFIG_ARCH_OMAP850 -static struct omap_irq_bank omap850_irq_banks[] = { +#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) +static struct omap_irq_bank omap7xx_irq_banks[] = { { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, @@ -184,32 +176,31 @@ static struct irq_chip omap_irq_chip = { void __init omap_init_irq(void) { + extern unsigned int omap_irq_flags; int i, j; -#ifdef CONFIG_ARCH_OMAP730 - if (cpu_is_omap730()) { - irq_banks = omap730_irq_banks; - irq_bank_count = ARRAY_SIZE(omap730_irq_banks); - } -#endif -#ifdef CONFIG_ARCH_OMAP850 - if (cpu_is_omap850()) { - irq_banks = omap850_irq_banks; - irq_bank_count = ARRAY_SIZE(omap850_irq_banks); +#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) + if (cpu_is_omap7xx()) { + omap_irq_flags = INT_7XX_IH2_IRQ; + irq_banks = omap7xx_irq_banks; + irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks); } #endif #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap1510()) { + omap_irq_flags = INT_1510_IH2_IRQ; irq_banks = omap1510_irq_banks; irq_bank_count = ARRAY_SIZE(omap1510_irq_banks); } if (cpu_is_omap310()) { + omap_irq_flags = INT_1510_IH2_IRQ; irq_banks = omap310_irq_banks; irq_bank_count = ARRAY_SIZE(omap310_irq_banks); } #endif #if defined(CONFIG_ARCH_OMAP16XX) if (cpu_is_omap16xx()) { + omap_irq_flags = INT_1510_IH2_IRQ; irq_banks = omap1610_irq_banks; irq_bank_count = ARRAY_SIZE(omap1610_irq_banks); } @@ -247,10 +238,8 @@ void __init omap_init_irq(void) /* Unmask level 2 handler */ - if (cpu_is_omap730()) - omap_unmask_irq(INT_730_IH2_IRQ); - else if (cpu_is_omap850()) - omap_unmask_irq(INT_850_IH2_IRQ); + if (cpu_is_omap7xx()) + omap_unmask_irq(INT_7XX_IH2_IRQ); else if (cpu_is_omap15xx()) omap_unmask_irq(INT_1510_IH2_IRQ); else if (cpu_is_omap16xx()) diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c new file mode 100644 index 000000000000..c9088d85da04 --- /dev/null +++ b/arch/arm/mach-omap1/lcd_dma.c @@ -0,0 +1,451 @@ +/* + * linux/arch/arm/mach-omap1/lcd_dma.c + * + * Extracted from arch/arm/plat-omap/dma.c + * Copyright (C) 2003 - 2008 Nokia Corporation + * Author: Juha Yrjölä <juha.yrjola@nokia.com> + * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com> + * Graphics DMA and LCD DMA graphics tranformations + * by Imre Deak <imre.deak@nokia.com> + * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc. + * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com> + * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc. + * + * Copyright (C) 2009 Texas Instruments + * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> + * + * Support functions for the OMAP internal DMA channels. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/spinlock.h> +#include <linux/interrupt.h> +#include <linux/io.h> + +#include <mach/hardware.h> +#include <mach/lcdc.h> +#include <plat/dma.h> + +int omap_lcd_dma_running(void) +{ + /* + * On OMAP1510, internal LCD controller will start the transfer + * when it gets enabled, so assume DMA running if LCD enabled. + */ + if (cpu_is_omap1510()) + if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN) + return 1; + + /* Check if LCD DMA is running */ + if (cpu_is_omap16xx()) + if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN) + return 1; + + return 0; +} + +static struct lcd_dma_info { + spinlock_t lock; + int reserved; + void (*callback)(u16 status, void *data); + void *cb_data; + + int active; + unsigned long addr, size; + int rotate, data_type, xres, yres; + int vxres; + int mirror; + int xscale, yscale; + int ext_ctrl; + int src_port; + int single_transfer; +} lcd_dma; + +void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres, + int data_type) +{ + lcd_dma.addr = addr; + lcd_dma.data_type = data_type; + lcd_dma.xres = fb_xres; + lcd_dma.yres = fb_yres; +} +EXPORT_SYMBOL(omap_set_lcd_dma_b1); + +void omap_set_lcd_dma_src_port(int port) +{ + lcd_dma.src_port = port; +} + +void omap_set_lcd_dma_ext_controller(int external) +{ + lcd_dma.ext_ctrl = external; +} +EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller); + +void omap_set_lcd_dma_single_transfer(int single) +{ + lcd_dma.single_transfer = single; +} +EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer); + +void omap_set_lcd_dma_b1_rotation(int rotate) +{ + if (cpu_is_omap1510()) { + printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n"); + BUG(); + return; + } + lcd_dma.rotate = rotate; +} +EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation); + +void omap_set_lcd_dma_b1_mirror(int mirror) +{ + if (cpu_is_omap1510()) { + printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n"); + BUG(); + } + lcd_dma.mirror = mirror; +} +EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror); + +void omap_set_lcd_dma_b1_vxres(unsigned long vxres) +{ + if (cpu_is_omap1510()) { + printk(KERN_ERR "DMA virtual resulotion is not supported " + "in 1510 mode\n"); + BUG(); + } + lcd_dma.vxres = vxres; +} +EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres); + +void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale) +{ + if (cpu_is_omap1510()) { + printk(KERN_ERR "DMA scale is not supported in 1510 mode\n"); + BUG(); + } + lcd_dma.xscale = xscale; + lcd_dma.yscale = yscale; +} +EXPORT_SYMBOL(omap_set_lcd_dma_b1_scale); + +static void set_b1_regs(void) +{ + unsigned long top, bottom; + int es; + u16 w; + unsigned long en, fn; + long ei, fi; + unsigned long vxres; + unsigned int xscale, yscale; + + switch (lcd_dma.data_type) { + case OMAP_DMA_DATA_TYPE_S8: + es = 1; + break; + case OMAP_DMA_DATA_TYPE_S16: + es = 2; + break; + case OMAP_DMA_DATA_TYPE_S32: + es = 4; + break; + default: + BUG(); + return; + } + + vxres = lcd_dma.vxres ? lcd_dma.vxres : lcd_dma.xres; + xscale = lcd_dma.xscale ? lcd_dma.xscale : 1; + yscale = lcd_dma.yscale ? lcd_dma.yscale : 1; + BUG_ON(vxres < lcd_dma.xres); + +#define PIXADDR(x, y) (lcd_dma.addr + \ + ((y) * vxres * yscale + (x) * xscale) * es) +#define PIXSTEP(sx, sy, dx, dy) (PIXADDR(dx, dy) - PIXADDR(sx, sy) - es + 1) + + switch (lcd_dma.rotate) { + case 0: + if (!lcd_dma.mirror) { + top = PIXADDR(0, 0); + bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); + /* 1510 DMA requires the bottom address to be 2 more + * than the actual last memory access location. */ + if (cpu_is_omap1510() && + lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32) + bottom += 2; + ei = PIXSTEP(0, 0, 1, 0); + fi = PIXSTEP(lcd_dma.xres - 1, 0, 0, 1); + } else { + top = PIXADDR(lcd_dma.xres - 1, 0); + bottom = PIXADDR(0, lcd_dma.yres - 1); + ei = PIXSTEP(1, 0, 0, 0); + fi = PIXSTEP(0, 0, lcd_dma.xres - 1, 1); + } + en = lcd_dma.xres; + fn = lcd_dma.yres; + break; + case 90: + if (!lcd_dma.mirror) { + top = PIXADDR(0, lcd_dma.yres - 1); + bottom = PIXADDR(lcd_dma.xres - 1, 0); + ei = PIXSTEP(0, 1, 0, 0); + fi = PIXSTEP(0, 0, 1, lcd_dma.yres - 1); + } else { + top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); + bottom = PIXADDR(0, 0); + ei = PIXSTEP(0, 1, 0, 0); + fi = PIXSTEP(1, 0, 0, lcd_dma.yres - 1); + } + en = lcd_dma.yres; + fn = lcd_dma.xres; + break; + case 180: + if (!lcd_dma.mirror) { + top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); + bottom = PIXADDR(0, 0); + ei = PIXSTEP(1, 0, 0, 0); + fi = PIXSTEP(0, 1, lcd_dma.xres - 1, 0); + } else { + top = PIXADDR(0, lcd_dma.yres - 1); + bottom = PIXADDR(lcd_dma.xres - 1, 0); + ei = PIXSTEP(0, 0, 1, 0); + fi = PIXSTEP(lcd_dma.xres - 1, 1, 0, 0); + } + en = lcd_dma.xres; + fn = lcd_dma.yres; + break; + case 270: + if (!lcd_dma.mirror) { + top = PIXADDR(lcd_dma.xres - 1, 0); + bottom = PIXADDR(0, lcd_dma.yres - 1); + ei = PIXSTEP(0, 0, 0, 1); + fi = PIXSTEP(1, lcd_dma.yres - 1, 0, 0); + } else { + top = PIXADDR(0, 0); + bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); + ei = PIXSTEP(0, 0, 0, 1); + fi = PIXSTEP(0, lcd_dma.yres - 1, 1, 0); + } + en = lcd_dma.yres; + fn = lcd_dma.xres; + break; + default: + BUG(); + return; /* Suppress warning about uninitialized vars */ + } + + if (cpu_is_omap1510()) { + omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U); + omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L); + omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U); + omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L); + + return; + } + + /* 1610 regs */ + omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U); + omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L); + omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U); + omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L); + + omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1); + omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1); + + w = omap_readw(OMAP1610_DMA_LCD_CSDP); + w &= ~0x03; + w |= lcd_dma.data_type; + omap_writew(w, OMAP1610_DMA_LCD_CSDP); + + w = omap_readw(OMAP1610_DMA_LCD_CTRL); + /* Always set the source port as SDRAM for now*/ + w &= ~(0x03 << 6); + if (lcd_dma.callback != NULL) + w |= 1 << 1; /* Block interrupt enable */ + else + w &= ~(1 << 1); + omap_writew(w, OMAP1610_DMA_LCD_CTRL); + + if (!(lcd_dma.rotate || lcd_dma.mirror || + lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale)) + return; + + w = omap_readw(OMAP1610_DMA_LCD_CCR); + /* Set the double-indexed addressing mode */ + w |= (0x03 << 12); + omap_writew(w, OMAP1610_DMA_LCD_CCR); + + omap_writew(ei, OMAP1610_DMA_LCD_SRC_EI_B1); + omap_writew(fi >> 16, OMAP1610_DMA_LCD_SRC_FI_B1_U); + omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L); +} + +static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id) +{ + u16 w; + + w = omap_readw(OMAP1610_DMA_LCD_CTRL); + if (unlikely(!(w & (1 << 3)))) { + printk(KERN_WARNING "Spurious LCD DMA IRQ\n"); + return IRQ_NONE; + } + /* Ack the IRQ */ + w |= (1 << 3); + omap_writew(w, OMAP1610_DMA_LCD_CTRL); + lcd_dma.active = 0; + if (lcd_dma.callback != NULL) + lcd_dma.callback(w, lcd_dma.cb_data); + + return IRQ_HANDLED; +} + +int omap_request_lcd_dma(void (*callback)(u16 status, void *data), + void *data) +{ + spin_lock_irq(&lcd_dma.lock); + if (lcd_dma.reserved) { + spin_unlock_irq(&lcd_dma.lock); + printk(KERN_ERR "LCD DMA channel already reserved\n"); + BUG(); + return -EBUSY; + } + lcd_dma.reserved = 1; + spin_unlock_irq(&lcd_dma.lock); + lcd_dma.callback = callback; + lcd_dma.cb_data = data; + lcd_dma.active = 0; + lcd_dma.single_transfer = 0; + lcd_dma.rotate = 0; + lcd_dma.vxres = 0; + lcd_dma.mirror = 0; + lcd_dma.xscale = 0; + lcd_dma.yscale = 0; + lcd_dma.ext_ctrl = 0; + lcd_dma.src_port = 0; + + return 0; +} +EXPORT_SYMBOL(omap_request_lcd_dma); + +void omap_free_lcd_dma(void) +{ + spin_lock(&lcd_dma.lock); + if (!lcd_dma.reserved) { + spin_unlock(&lcd_dma.lock); + printk(KERN_ERR "LCD DMA is not reserved\n"); + BUG(); + return; + } + if (!cpu_is_omap1510()) + omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1, + OMAP1610_DMA_LCD_CCR); + lcd_dma.reserved = 0; + spin_unlock(&lcd_dma.lock); +} +EXPORT_SYMBOL(omap_free_lcd_dma); + +void omap_enable_lcd_dma(void) +{ + u16 w; + + /* + * Set the Enable bit only if an external controller is + * connected. Otherwise the OMAP internal controller will + * start the transfer when it gets enabled. + */ + if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) + return; + + w = omap_readw(OMAP1610_DMA_LCD_CTRL); + w |= 1 << 8; + omap_writew(w, OMAP1610_DMA_LCD_CTRL); + + lcd_dma.active = 1; + + w = omap_readw(OMAP1610_DMA_LCD_CCR); + w |= 1 << 7; + omap_writew(w, OMAP1610_DMA_LCD_CCR); +} +EXPORT_SYMBOL(omap_enable_lcd_dma); + +void omap_setup_lcd_dma(void) +{ + BUG_ON(lcd_dma.active); + if (!cpu_is_omap1510()) { + /* Set some reasonable defaults */ + omap_writew(0x5440, OMAP1610_DMA_LCD_CCR); + omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP); + omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL); + } + set_b1_regs(); + if (!cpu_is_omap1510()) { + u16 w; + + w = omap_readw(OMAP1610_DMA_LCD_CCR); + /* + * If DMA was already active set the end_prog bit to have + * the programmed register set loaded into the active + * register set. + */ + w |= 1 << 11; /* End_prog */ + if (!lcd_dma.single_transfer) + w |= (3 << 8); /* Auto_init, repeat */ + omap_writew(w, OMAP1610_DMA_LCD_CCR); + } +} +EXPORT_SYMBOL(omap_setup_lcd_dma); + +void omap_stop_lcd_dma(void) +{ + u16 w; + + lcd_dma.active = 0; + if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) + return; + + w = omap_readw(OMAP1610_DMA_LCD_CCR); + w &= ~(1 << 7); + omap_writew(w, OMAP1610_DMA_LCD_CCR); + + w = omap_readw(OMAP1610_DMA_LCD_CTRL); + w &= ~(1 << 8); + omap_writew(w, OMAP1610_DMA_LCD_CTRL); +} +EXPORT_SYMBOL(omap_stop_lcd_dma); + +static int __init omap_init_lcd_dma(void) +{ + int r; + + if (!cpu_class_is_omap1()) + return -ENODEV; + + if (cpu_is_omap16xx()) { + u16 w; + + /* this would prevent OMAP sleep */ + w = omap_readw(OMAP1610_DMA_LCD_CTRL); + w &= ~(1 << 8); + omap_writew(w, OMAP1610_DMA_LCD_CTRL); + } + + spin_lock_init(&lcd_dma.lock); + + r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0, + "LCD DMA", NULL); + if (r != 0) + printk(KERN_ERR "unable to request IRQ for LCD DMA " + "(error %d)\n", r); + + return r; +} + +arch_initcall(omap_init_lcd_dma); + diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c index 17c9d0e04216..b4f9be52e1e8 100644 --- a/arch/arm/mach-omap1/leds-h2p2-debug.c +++ b/arch/arm/mach-omap1/leds-h2p2-debug.c @@ -19,7 +19,7 @@ #include <asm/system.h> #include <asm/mach-types.h> -#include <mach/fpga.h> +#include <plat/fpga.h> #include <mach/gpio.h> #include "leds.h" diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c index 8cbf2562dcaa..22eb11dde9e7 100644 --- a/arch/arm/mach-omap1/leds.c +++ b/arch/arm/mach-omap1/leds.c @@ -10,13 +10,16 @@ #include <asm/mach-types.h> #include <mach/gpio.h> -#include <mach/mux.h> +#include <plat/mux.h> #include "leds.h" static int __init omap_leds_init(void) { + if (!cpu_class_is_omap1()) + return -ENODEV; + if (machine_is_omap_innovator()) leds_event = innovator_leds_event; diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c index 0af4d6c85b47..c0e1f48aa119 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/arch/arm/mach-omap1/mailbox.c @@ -1,5 +1,5 @@ /* - * Mailbox reservation modules for DSP + * Mailbox reservation modules for OMAP1 * * Copyright (C) 2006-2009 Nokia Corporation * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> @@ -9,13 +9,10 @@ * for more details. */ -#include <linux/kernel.h> -#include <linux/resource.h> #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/io.h> -#include <mach/mailbox.h> -#include <mach/irqs.h> +#include <plat/mailbox.h> #define MAILBOX_ARM2DSP1 0x00 #define MAILBOX_ARM2DSP1b 0x04 @@ -83,7 +80,7 @@ static int omap1_mbox_fifo_full(struct omap_mbox *mbox) struct omap_mbox1_fifo *fifo = &((struct omap_mbox1_priv *)mbox->priv)->rx_fifo; - return (mbox_read_reg(fifo->flag)); + return mbox_read_reg(fifo->flag); } /* irq */ @@ -136,47 +133,41 @@ static struct omap_mbox1_priv omap1_mbox_dsp_priv = { }, }; -struct omap_mbox mbox_dsp_info = { +static struct omap_mbox mbox_dsp_info = { .name = "dsp", .ops = &omap1_mbox_ops, .priv = &omap1_mbox_dsp_priv, }; -EXPORT_SYMBOL(mbox_dsp_info); + +static struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL }; static int __devinit omap1_mbox_probe(struct platform_device *pdev) { - struct resource *res; - int ret = 0; - - if (pdev->num_resources != 2) { - dev_err(&pdev->dev, "invalid number of resources: %d\n", - pdev->num_resources); - return -ENODEV; - } - - /* MBOX base */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (unlikely(!res)) { - dev_err(&pdev->dev, "invalid mem resource\n"); - return -ENODEV; + struct resource *mem; + int ret; + struct omap_mbox **list; + + list = omap1_mboxes; + list[0]->irq = platform_get_irq_byname(pdev, "dsp"); + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + mbox_base = ioremap(mem->start, resource_size(mem)); + if (!mbox_base) + return -ENOMEM; + + ret = omap_mbox_register(&pdev->dev, list); + if (ret) { + iounmap(mbox_base); + return ret; } - mbox_base = res->start; - /* DSP IRQ */ - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (unlikely(!res)) { - dev_err(&pdev->dev, "invalid irq resource\n"); - return -ENODEV; - } - mbox_dsp_info.irq = res->start; - - return omap_mbox_register(&pdev->dev, &mbox_dsp_info); + return 0; } static int __devexit omap1_mbox_remove(struct platform_device *pdev) { - omap_mbox_unregister(&mbox_dsp_info); - + omap_mbox_unregister(); + iounmap(mbox_base); return 0; } @@ -184,7 +175,7 @@ static struct platform_driver omap1_mbox_driver = { .probe = omap1_mbox_probe, .remove = __devexit_p(omap1_mbox_remove), .driver = { - .name = "omap1-mailbox", + .name = "omap-mailbox", }, }; @@ -203,5 +194,5 @@ module_exit(omap1_mbox_exit); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("omap mailbox: omap1 architecture specific functions"); -MODULE_AUTHOR("Hiroshi DOYU" <Hiroshi.DOYU@nokia.com>); +MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>"); MODULE_ALIAS("platform:omap1-mailbox"); diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index a2d7814896be..820973666f34 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -16,14 +16,13 @@ #include <linux/err.h> #include <linux/io.h> #include <linux/platform_device.h> +#include <linux/slab.h> #include <mach/irqs.h> -#include <mach/dma.h> -#include <mach/irqs.h> -#include <mach/mux.h> -#include <mach/cpu.h> -#include <mach/mcbsp.h> -#include <mach/dsp_common.h> +#include <plat/dma.h> +#include <plat/mux.h> +#include <plat/cpu.h> +#include <plat/mcbsp.h> #define DPS_RSTCT2_PER_EN (1 << 0) #define DSP_RSTCT2_WD_PER_EN (1 << 1) @@ -46,7 +45,6 @@ static void omap1_mcbsp_request(unsigned int id) clk_enable(api_clk); clk_enable(dsp_clk); - omap_dsp_request_mem(); /* * DSP external peripheral reset * FIXME: This should be moved to dsp code @@ -62,7 +60,6 @@ static void omap1_mcbsp_free(unsigned int id) { if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { if (--dsp_use == 0) { - omap_dsp_release_mem(); if (!IS_ERR(api_clk)) { clk_disable(api_clk); clk_put(api_clk); @@ -80,29 +77,31 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { .free = omap1_mcbsp_free, }; -#ifdef CONFIG_ARCH_OMAP730 -static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { +#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) +static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = { { - .phys_base = OMAP730_MCBSP1_BASE, + .phys_base = OMAP7XX_MCBSP1_BASE, .dma_rx_sync = OMAP_DMA_MCBSP1_RX, .dma_tx_sync = OMAP_DMA_MCBSP1_TX, - .rx_irq = INT_730_McBSP1RX, - .tx_irq = INT_730_McBSP1TX, + .rx_irq = INT_7XX_McBSP1RX, + .tx_irq = INT_7XX_McBSP1TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP730_MCBSP2_BASE, + .phys_base = OMAP7XX_MCBSP2_BASE, .dma_rx_sync = OMAP_DMA_MCBSP3_RX, .dma_tx_sync = OMAP_DMA_MCBSP3_TX, - .rx_irq = INT_730_McBSP2RX, - .tx_irq = INT_730_McBSP2TX, + .rx_irq = INT_7XX_McBSP2RX, + .tx_irq = INT_7XX_McBSP2TX, .ops = &omap1_mcbsp_ops, }, }; -#define OMAP730_MCBSP_PDATA_SZ ARRAY_SIZE(omap730_mcbsp_pdata) +#define OMAP7XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap7xx_mcbsp_pdata) +#define OMAP7XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) #else -#define omap730_mcbsp_pdata NULL -#define OMAP730_MCBSP_PDATA_SZ 0 +#define omap7xx_mcbsp_pdata NULL +#define OMAP7XX_MCBSP_PDATA_SZ 0 +#define OMAP7XX_MCBSP_REG_NUM 0 #endif #ifdef CONFIG_ARCH_OMAP15XX @@ -133,9 +132,11 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { }, }; #define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) +#define OMAP15XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) #else #define omap15xx_mcbsp_pdata NULL #define OMAP15XX_MCBSP_PDATA_SZ 0 +#define OMAP15XX_MCBSP_REG_NUM 0 #endif #ifdef CONFIG_ARCH_OMAP16XX @@ -166,28 +167,37 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { }, }; #define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) +#define OMAP16XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) #else #define omap16xx_mcbsp_pdata NULL #define OMAP16XX_MCBSP_PDATA_SZ 0 +#define OMAP16XX_MCBSP_REG_NUM 0 #endif -int __init omap1_mcbsp_init(void) +static int __init omap1_mcbsp_init(void) { - if (cpu_is_omap730()) - omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; - if (cpu_is_omap15xx()) + if (!cpu_class_is_omap1()) + return -ENODEV; + + if (cpu_is_omap7xx()) { + omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ; + omap_mcbsp_cache_size = OMAP7XX_MCBSP_REG_NUM * sizeof(u16); + } else if (cpu_is_omap15xx()) { omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; - if (cpu_is_omap16xx()) + omap_mcbsp_cache_size = OMAP15XX_MCBSP_REG_NUM * sizeof(u16); + } else if (cpu_is_omap16xx()) { omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ; + omap_mcbsp_cache_size = OMAP16XX_MCBSP_REG_NUM * sizeof(u16); + } mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), GFP_KERNEL); if (!mcbsp_ptr) return -ENOMEM; - if (cpu_is_omap730()) - omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata, - OMAP730_MCBSP_PDATA_SZ); + if (cpu_is_omap7xx()) + omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata, + OMAP7XX_MCBSP_PDATA_SZ); if (cpu_is_omap15xx()) omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata, diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 721e0d9d8b1d..5fdef7a34828 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -29,53 +29,57 @@ #include <asm/system.h> -#include <mach/mux.h> +#include <plat/mux.h> #ifdef CONFIG_OMAP_MUX static struct omap_mux_cfg arch_mux_cfg; -#ifdef CONFIG_ARCH_OMAP730 -static struct pin_config __initdata_or_module omap730_pins[] = { -MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 20, 1, 0) -MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 24, 1, 0) -MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 28, 1, 0) -MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 1, 0) -MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 4, 1, 0) -MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 8, 1, 0) -MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 12, 1, 0) -MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 16, 1, 0) -MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 20, 1, 0) -MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 24, 1, 0) - -MUX_CFG_730("AA17_730_USB_DM", 2, 21, 0, 20, 0, 0) -MUX_CFG_730("W16_730_USB_PU_EN", 2, 25, 0, 24, 0, 0) -MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0) +#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) +static struct pin_config __initdata_or_module omap7xx_pins[] = { +MUX_CFG_7XX("E2_7XX_KBR0", 12, 21, 0, 20, 1, 0) +MUX_CFG_7XX("J7_7XX_KBR1", 12, 25, 0, 24, 1, 0) +MUX_CFG_7XX("E1_7XX_KBR2", 12, 29, 0, 28, 1, 0) +MUX_CFG_7XX("F3_7XX_KBR3", 13, 1, 0, 0, 1, 0) +MUX_CFG_7XX("D2_7XX_KBR4", 13, 5, 0, 4, 1, 0) +MUX_CFG_7XX("C2_7XX_KBC0", 13, 9, 0, 8, 1, 0) +MUX_CFG_7XX("D3_7XX_KBC1", 13, 13, 0, 12, 1, 0) +MUX_CFG_7XX("E4_7XX_KBC2", 13, 17, 0, 16, 1, 0) +MUX_CFG_7XX("F4_7XX_KBC3", 13, 21, 0, 20, 1, 0) +MUX_CFG_7XX("E3_7XX_KBC4", 13, 25, 0, 24, 1, 0) + +MUX_CFG_7XX("AA17_7XX_USB_DM", 2, 21, 0, 20, 0, 0) +MUX_CFG_7XX("W16_7XX_USB_PU_EN", 2, 25, 0, 24, 0, 0) +MUX_CFG_7XX("W17_7XX_USB_VBUSI", 2, 29, 6, 28, 1, 0) +MUX_CFG_7XX("W18_7XX_USB_DMCK_OUT",3, 3, 1, 2, 0, 0) +MUX_CFG_7XX("W19_7XX_USB_DCRST", 3, 7, 1, 6, 0, 0) + +/* MMC Pins */ +MUX_CFG_7XX("MMC_7XX_CMD", 2, 9, 0, 8, 1, 0) +MUX_CFG_7XX("MMC_7XX_CLK", 2, 13, 0, 12, 1, 0) +MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0) + +/* I2C interface */ +MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0) +MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0) + +/* SPI pins */ +MUX_CFG_7XX("SPI_7XX_1", 6, 5, 4, 4, 1, 0) +MUX_CFG_7XX("SPI_7XX_2", 6, 9, 4, 8, 1, 0) +MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0) +MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0) +MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0) +MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0) + +/* UART pins */ +MUX_CFG_7XX("UART_7XX_1", 3, 21, 0, 20, 0, 0) +MUX_CFG_7XX("UART_7XX_2", 8, 1, 6, 0, 0, 0) }; -#define OMAP730_PINS_SZ ARRAY_SIZE(omap730_pins) +#define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) #else -#define omap730_pins NULL -#define OMAP730_PINS_SZ 0 -#endif /* CONFIG_ARCH_OMAP730 */ - -#ifdef CONFIG_ARCH_OMAP850 -struct pin_config __initdata_or_module omap850_pins[] = { -MUX_CFG_850("E2_850_KBR0", 12, 21, 0, 20, 1, 0) -MUX_CFG_850("J7_850_KBR1", 12, 25, 0, 24, 1, 0) -MUX_CFG_850("E1_850_KBR2", 12, 29, 0, 28, 1, 0) -MUX_CFG_850("F3_850_KBR3", 13, 1, 0, 0, 1, 0) -MUX_CFG_850("D2_850_KBR4", 13, 5, 0, 4, 1, 0) -MUX_CFG_850("C2_850_KBC0", 13, 9, 0, 8, 1, 0) -MUX_CFG_850("D3_850_KBC1", 13, 13, 0, 12, 1, 0) -MUX_CFG_850("E4_850_KBC2", 13, 17, 0, 16, 1, 0) -MUX_CFG_850("F4_850_KBC3", 13, 21, 0, 20, 1, 0) -MUX_CFG_850("E3_850_KBC4", 13, 25, 0, 24, 1, 0) - -MUX_CFG_850("AA17_850_USB_DM", 2, 21, 0, 20, 0, 0) -MUX_CFG_850("W16_850_USB_PU_EN", 2, 25, 0, 24, 0, 0) -MUX_CFG_850("W17_850_USB_VBUSI", 2, 29, 0, 28, 0, 0) -}; -#endif +#define omap7xx_pins NULL +#define OMAP7XX_PINS_SZ 0 +#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) static struct pin_config __initdata_or_module omap1xxx_pins[] = { @@ -339,7 +343,7 @@ MUX_CFG("Y14_1610_CCP_DATAM", 9, 21, 6, 2, 3, 1, 2, 0, 0) #define OMAP1XXX_PINS_SZ 0 #endif /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */ -int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) +static int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) { static DEFINE_SPINLOCK(mux_spin_lock); unsigned long flags; @@ -438,14 +442,9 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", cfg->pull_name, cfg->pull_reg, pull_orig, pull); } - -#ifdef CONFIG_ARCH_OMAP850 - omap_mux_register(omap850_pins, ARRAY_SIZE(omap850_pins)); -#endif - #endif -#ifdef CONFIG_OMAP_MUX_ERRORS +#ifdef CONFIG_OMAP_MUX_WARNINGS return warn ? -ETXTBSY : 0; #else return 0; @@ -454,9 +453,9 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) int __init omap1_mux_init(void) { - if (cpu_is_omap730()) { - arch_mux_cfg.pins = omap730_pins; - arch_mux_cfg.size = OMAP730_PINS_SZ; + if (cpu_is_omap7xx()) { + arch_mux_cfg.pins = omap7xx_pins; + arch_mux_cfg.size = OMAP7XX_PINS_SZ; arch_mux_cfg.cfg_reg = omap1_cfg_reg; } diff --git a/arch/arm/mach-omap1/opp.h b/arch/arm/mach-omap1/opp.h new file mode 100644 index 000000000000..07074d79adce --- /dev/null +++ b/arch/arm/mach-omap1/opp.h @@ -0,0 +1,28 @@ +/* + * linux/arch/arm/mach-omap1/opp.h + * + * Copyright (C) 2004 - 2005 Nokia corporation + * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> + * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_OMAP1_OPP_H +#define __ARCH_ARM_MACH_OMAP1_OPP_H + +#include <linux/types.h> + +struct mpu_rate { + unsigned long rate; + unsigned long xtal; + unsigned long pll_rate; + __u16 ckctl_val; + __u16 dpllctl_val; +}; + +extern struct mpu_rate omap1_rate_table[]; + +#endif diff --git a/arch/arm/mach-omap1/opp_data.c b/arch/arm/mach-omap1/opp_data.c new file mode 100644 index 000000000000..75a546514994 --- /dev/null +++ b/arch/arm/mach-omap1/opp_data.c @@ -0,0 +1,59 @@ +/* + * linux/arch/arm/mach-omap1/opp_data.c + * + * Copyright (C) 2004 - 2005 Nokia corporation + * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> + * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "opp.h" + +/*------------------------------------------------------------------------- + * Omap1 MPU rate table + *-------------------------------------------------------------------------*/ +struct mpu_rate omap1_rate_table[] = { + /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL + * NOTE: Comment order here is different from bits in CKCTL value: + * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv + */ +#if defined(CONFIG_OMAP_ARM_216MHZ) + { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */ +#endif +#if defined(CONFIG_OMAP_ARM_195MHZ) + { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */ +#endif +#if defined(CONFIG_OMAP_ARM_192MHZ) + { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ + { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ + { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ + { 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */ + { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ +#endif +#if defined(CONFIG_OMAP_ARM_182MHZ) + { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */ +#endif +#if defined(CONFIG_OMAP_ARM_168MHZ) + { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ +#endif +#if defined(CONFIG_OMAP_ARM_150MHZ) + { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */ +#endif +#if defined(CONFIG_OMAP_ARM_120MHZ) + { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ +#endif +#if defined(CONFIG_OMAP_ARM_96MHZ) + { 96000000, 12000000, 96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */ +#endif +#if defined(CONFIG_OMAP_ARM_60MHZ) + { 60000000, 12000000, 60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */ +#endif +#if defined(CONFIG_OMAP_ARM_30MHZ) + { 30000000, 12000000, 60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */ +#endif + { 0, 0, 0, 0, 0 }, +}; + diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 5218943c91c0..0cca23a85175 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -48,21 +48,21 @@ #include <asm/mach/time.h> #include <asm/mach/irq.h> -#include <mach/cpu.h> +#include <plat/cpu.h> #include <mach/irqs.h> -#include <mach/clock.h> -#include <mach/sram.h> -#include <mach/tc.h> -#include <mach/mux.h> -#include <mach/dma.h> -#include <mach/dmtimer.h> +#include <plat/clock.h> +#include <plat/sram.h> +#include <plat/tc.h> +#include <plat/mux.h> +#include <plat/dma.h> +#include <plat/dmtimer.h> #include "pm.h" static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; -static unsigned int mpui730_sleep_save[MPUI730_SLEEP_SAVE_SIZE]; +static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE]; static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; @@ -183,9 +183,9 @@ static void omap_pm_wakeup_setup(void) * drivers must still separately call omap_set_gpio_wakeup() to * wake up to a GPIO interrupt. */ - if (cpu_is_omap730()) - level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) | - OMAP_IRQ_BIT(INT_730_IH2_IRQ); + if (cpu_is_omap7xx()) + level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) | + OMAP_IRQ_BIT(INT_7XX_IH2_IRQ); else if (cpu_is_omap15xx()) level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | OMAP_IRQ_BIT(INT_1510_IH2_IRQ); @@ -195,10 +195,10 @@ static void omap_pm_wakeup_setup(void) omap_writel(~level1_wake, OMAP_IH1_MIR); - if (cpu_is_omap730()) { + if (cpu_is_omap7xx()) { omap_writel(~level2_wake, OMAP_IH2_0_MIR); - omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) | - OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)), + omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) | + OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)), OMAP_IH2_1_MIR); } else if (cpu_is_omap15xx()) { level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); @@ -253,15 +253,15 @@ void omap1_pm_suspend(void) * Save interrupt, MPUI, ARM and UPLD control registers. */ - if (cpu_is_omap730()) { - MPUI730_SAVE(OMAP_IH1_MIR); - MPUI730_SAVE(OMAP_IH2_0_MIR); - MPUI730_SAVE(OMAP_IH2_1_MIR); - MPUI730_SAVE(MPUI_CTRL); - MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); - MPUI730_SAVE(MPUI_DSP_API_CONFIG); - MPUI730_SAVE(EMIFS_CONFIG); - MPUI730_SAVE(EMIFF_SDRAM_CONFIG); + if (cpu_is_omap7xx()) { + MPUI7XX_SAVE(OMAP_IH1_MIR); + MPUI7XX_SAVE(OMAP_IH2_0_MIR); + MPUI7XX_SAVE(OMAP_IH2_1_MIR); + MPUI7XX_SAVE(MPUI_CTRL); + MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); + MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); + MPUI7XX_SAVE(EMIFS_CONFIG); + MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); } else if (cpu_is_omap15xx()) { MPUI1510_SAVE(OMAP_IH1_MIR); @@ -306,7 +306,7 @@ void omap1_pm_suspend(void) omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); /* shut down dsp_ck */ - if (!cpu_is_omap730()) + if (!cpu_is_omap7xx()) omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); /* temporarily enabling api_ck to access DSP registers */ @@ -383,12 +383,12 @@ void omap1_pm_suspend(void) ULPD_RESTORE(ULPD_CLOCK_CTRL); ULPD_RESTORE(ULPD_STATUS_REQ); - if (cpu_is_omap730()) { - MPUI730_RESTORE(EMIFS_CONFIG); - MPUI730_RESTORE(EMIFF_SDRAM_CONFIG); - MPUI730_RESTORE(OMAP_IH1_MIR); - MPUI730_RESTORE(OMAP_IH2_0_MIR); - MPUI730_RESTORE(OMAP_IH2_1_MIR); + if (cpu_is_omap7xx()) { + MPUI7XX_RESTORE(EMIFS_CONFIG); + MPUI7XX_RESTORE(EMIFF_SDRAM_CONFIG); + MPUI7XX_RESTORE(OMAP_IH1_MIR); + MPUI7XX_RESTORE(OMAP_IH2_0_MIR); + MPUI7XX_RESTORE(OMAP_IH2_1_MIR); } else if (cpu_is_omap15xx()) { MPUI1510_RESTORE(MPUI_CTRL); MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); @@ -461,13 +461,13 @@ static int omap_pm_read_proc( ULPD_SAVE(ULPD_DPLL_CTRL); ULPD_SAVE(ULPD_POWER_CTRL); - if (cpu_is_omap730()) { - MPUI730_SAVE(MPUI_CTRL); - MPUI730_SAVE(MPUI_DSP_STATUS); - MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); - MPUI730_SAVE(MPUI_DSP_API_CONFIG); - MPUI730_SAVE(EMIFF_SDRAM_CONFIG); - MPUI730_SAVE(EMIFS_CONFIG); + if (cpu_is_omap7xx()) { + MPUI7XX_SAVE(MPUI_CTRL); + MPUI7XX_SAVE(MPUI_DSP_STATUS); + MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); + MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); + MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); + MPUI7XX_SAVE(EMIFS_CONFIG); } else if (cpu_is_omap15xx()) { MPUI1510_SAVE(MPUI_CTRL); MPUI1510_SAVE(MPUI_DSP_STATUS); @@ -517,20 +517,20 @@ static int omap_pm_read_proc( ULPD_SHOW(ULPD_STATUS_REQ), ULPD_SHOW(ULPD_POWER_CTRL)); - if (cpu_is_omap730()) { + if (cpu_is_omap7xx()) { my_buffer_offset += sprintf(my_base + my_buffer_offset, - "MPUI730_CTRL_REG 0x%-8x \n" - "MPUI730_DSP_STATUS_REG: 0x%-8x \n" - "MPUI730_DSP_BOOT_CONFIG_REG: 0x%-8x \n" - "MPUI730_DSP_API_CONFIG_REG: 0x%-8x \n" - "MPUI730_SDRAM_CONFIG_REG: 0x%-8x \n" - "MPUI730_EMIFS_CONFIG_REG: 0x%-8x \n", - MPUI730_SHOW(MPUI_CTRL), - MPUI730_SHOW(MPUI_DSP_STATUS), - MPUI730_SHOW(MPUI_DSP_BOOT_CONFIG), - MPUI730_SHOW(MPUI_DSP_API_CONFIG), - MPUI730_SHOW(EMIFF_SDRAM_CONFIG), - MPUI730_SHOW(EMIFS_CONFIG)); + "MPUI7XX_CTRL_REG 0x%-8x \n" + "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n" + "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n" + "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n" + "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n" + "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n", + MPUI7XX_SHOW(MPUI_CTRL), + MPUI7XX_SHOW(MPUI_DSP_STATUS), + MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG), + MPUI7XX_SHOW(MPUI_DSP_API_CONFIG), + MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG), + MPUI7XX_SHOW(EMIFS_CONFIG)); } else if (cpu_is_omap15xx()) { my_buffer_offset += sprintf(my_base + my_buffer_offset, "MPUI1510_CTRL_REG 0x%-8x \n" @@ -661,6 +661,9 @@ static int __init omap_pm_init(void) int error; #endif + if (!cpu_class_is_omap1()) + return -ENODEV; + printk("Power Management for TI OMAP.\n"); /* @@ -668,9 +671,9 @@ static int __init omap_pm_init(void) * These routines need to be in SRAM as that's the only * memory the MPU can see when it wakes up. */ - if (cpu_is_omap730()) { - omap_sram_suspend = omap_sram_push(omap730_cpu_suspend, - omap730_cpu_suspend_sz); + if (cpu_is_omap7xx()) { + omap_sram_suspend = omap_sram_push(omap7xx_cpu_suspend, + omap7xx_cpu_suspend_sz); } else if (cpu_is_omap15xx()) { omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, omap1510_cpu_suspend_sz); @@ -686,8 +689,8 @@ static int __init omap_pm_init(void) pm_idle = omap1_pm_idle; - if (cpu_is_omap730()) - setup_irq(INT_730_WAKE_UP_REQ, &omap_wakeup_irq); + if (cpu_is_omap7xx()) + setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); else if (cpu_is_omap16xx()) setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq); @@ -700,8 +703,8 @@ static int __init omap_pm_init(void) omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL); /* Configure IDLECT3 */ - if (cpu_is_omap730()) - omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3); + if (cpu_is_omap7xx()) + omap_writel(OMAP7XX_IDLECT3_VAL, OMAP7XX_IDLECT3); else if (cpu_is_omap16xx()) omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h index 9ed5e2c1de4d..56a647986ae9 100644 --- a/arch/arm/mach-omap1/pm.h +++ b/arch/arm/mach-omap1/pm.h @@ -39,11 +39,11 @@ * Register and offset definitions to be used in PM assembler code * ---------------------------------------------------------------------------- */ -#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00) +#define CLKGEN_REG_ASM_BASE OMAP1_IO_ADDRESS(0xfffece00) #define ARM_IDLECT1_ASM_OFFSET 0x04 #define ARM_IDLECT2_ASM_OFFSET 0x08 -#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00) +#define TCMIF_ASM_BASE OMAP1_IO_ADDRESS(0xfffecc00) #define EMIFS_CONFIG_ASM_OFFSET 0x0c #define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 @@ -98,13 +98,14 @@ #define OMAP1610_IDLECT3 0xfffece24 #define OMAP1610_IDLE_LOOP_REQUEST 0x0400 -#define OMAP730_IDLECT1_SLEEP_VAL 0x16c7 -#define OMAP730_IDLECT2_SLEEP_VAL 0x09c7 -#define OMAP730_IDLECT3_VAL 0x3f -#define OMAP730_IDLECT3 0xfffece24 -#define OMAP730_IDLE_LOOP_REQUEST 0x0C00 +#define OMAP7XX_IDLECT1_SLEEP_VAL 0x16c7 +#define OMAP7XX_IDLECT2_SLEEP_VAL 0x09c7 +#define OMAP7XX_IDLECT3_VAL 0x3f +#define OMAP7XX_IDLECT3 0xfffece24 +#define OMAP7XX_IDLE_LOOP_REQUEST 0x0C00 #if !defined(CONFIG_ARCH_OMAP730) && \ + !defined(CONFIG_ARCH_OMAP850) && \ !defined(CONFIG_ARCH_OMAP15XX) && \ !defined(CONFIG_ARCH_OMAP16XX) #warning "Power management for this processor not implemented yet" @@ -122,17 +123,17 @@ extern void allow_idle_sleep(void); extern void omap1_pm_idle(void); extern void omap1_pm_suspend(void); -extern void omap730_cpu_suspend(unsigned short, unsigned short); +extern void omap7xx_cpu_suspend(unsigned short, unsigned short); extern void omap1510_cpu_suspend(unsigned short, unsigned short); extern void omap1610_cpu_suspend(unsigned short, unsigned short); -extern void omap730_idle_loop_suspend(void); +extern void omap7xx_idle_loop_suspend(void); extern void omap1510_idle_loop_suspend(void); extern void omap1610_idle_loop_suspend(void); -extern unsigned int omap730_cpu_suspend_sz; +extern unsigned int omap7xx_cpu_suspend_sz; extern unsigned int omap1510_cpu_suspend_sz; extern unsigned int omap1610_cpu_suspend_sz; -extern unsigned int omap730_idle_loop_suspend_sz; +extern unsigned int omap7xx_idle_loop_suspend_sz; extern unsigned int omap1510_idle_loop_suspend_sz; extern unsigned int omap1610_idle_loop_suspend_sz; @@ -155,9 +156,9 @@ extern void omap_serial_wake_trigger(int enable); #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] -#define MPUI730_SAVE(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] = omap_readl(x) -#define MPUI730_RESTORE(x) omap_writel((mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]), (x)) -#define MPUI730_SHOW(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] +#define MPUI7XX_SAVE(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] = omap_readl(x) +#define MPUI7XX_RESTORE(x) omap_writel((mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x]), (x)) +#define MPUI7XX_SHOW(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] #define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) #define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) @@ -232,24 +233,24 @@ enum mpui1510_save_state { #endif }; -enum mpui730_save_state { - MPUI730_SLEEP_SAVE_START = 0, +enum mpui7xx_save_state { + MPUI7XX_SLEEP_SAVE_START = 0, /* * MPUI registers 32 bits */ - MPUI730_SLEEP_SAVE_MPUI_CTRL, - MPUI730_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, - MPUI730_SLEEP_SAVE_MPUI_DSP_API_CONFIG, - MPUI730_SLEEP_SAVE_MPUI_DSP_STATUS, - MPUI730_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, - MPUI730_SLEEP_SAVE_EMIFS_CONFIG, - MPUI730_SLEEP_SAVE_OMAP_IH1_MIR, - MPUI730_SLEEP_SAVE_OMAP_IH2_0_MIR, - MPUI730_SLEEP_SAVE_OMAP_IH2_1_MIR, -#if defined(CONFIG_ARCH_OMAP730) - MPUI730_SLEEP_SAVE_SIZE + MPUI7XX_SLEEP_SAVE_MPUI_CTRL, + MPUI7XX_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, + MPUI7XX_SLEEP_SAVE_MPUI_DSP_API_CONFIG, + MPUI7XX_SLEEP_SAVE_MPUI_DSP_STATUS, + MPUI7XX_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, + MPUI7XX_SLEEP_SAVE_EMIFS_CONFIG, + MPUI7XX_SLEEP_SAVE_OMAP_IH1_MIR, + MPUI7XX_SLEEP_SAVE_OMAP_IH2_0_MIR, + MPUI7XX_SLEEP_SAVE_OMAP_IH2_1_MIR, +#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) + MPUI7XX_SLEEP_SAVE_SIZE #else - MPUI730_SLEEP_SAVE_SIZE = 0 + MPUI7XX_SLEEP_SAVE_SIZE = 0 #endif }; diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c new file mode 100644 index 000000000000..6588c22b8a64 --- /dev/null +++ b/arch/arm/mach-omap1/pm_bus.c @@ -0,0 +1,100 @@ +/* + * Runtime PM support code for OMAP1 + * + * Author: Kevin Hilman, Deep Root Systems, LLC + * + * Copyright (C) 2010 Texas Instruments, Inc. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/io.h> +#include <linux/pm_runtime.h> +#include <linux/platform_device.h> +#include <linux/mutex.h> +#include <linux/clk.h> +#include <linux/err.h> + +#include <plat/omap_device.h> +#include <plat/omap-pm.h> + +#ifdef CONFIG_PM_RUNTIME +static int omap1_pm_runtime_suspend(struct device *dev) +{ + struct clk *iclk, *fclk; + int ret = 0; + + dev_dbg(dev, "%s\n", __func__); + + ret = pm_generic_runtime_suspend(dev); + + fclk = clk_get(dev, "fck"); + if (!IS_ERR(fclk)) { + clk_disable(fclk); + clk_put(fclk); + } + + iclk = clk_get(dev, "ick"); + if (!IS_ERR(iclk)) { + clk_disable(iclk); + clk_put(iclk); + } + + return 0; +}; + +static int omap1_pm_runtime_resume(struct device *dev) +{ + struct clk *iclk, *fclk; + + dev_dbg(dev, "%s\n", __func__); + + iclk = clk_get(dev, "ick"); + if (!IS_ERR(iclk)) { + clk_enable(iclk); + clk_put(iclk); + } + + fclk = clk_get(dev, "fck"); + if (!IS_ERR(fclk)) { + clk_enable(fclk); + clk_put(fclk); + } + + return pm_generic_runtime_resume(dev); +}; + +static int __init omap1_pm_runtime_init(void) +{ + const struct dev_pm_ops *pm; + struct dev_pm_ops *omap_pm; + + if (!cpu_class_is_omap1()) + return -ENODEV; + + pm = platform_bus_get_pm_ops(); + if (!pm) { + pr_err("%s: unable to get dev_pm_ops from platform_bus\n", + __func__); + return -ENODEV; + } + + omap_pm = kmemdup(pm, sizeof(struct dev_pm_ops), GFP_KERNEL); + if (!omap_pm) { + pr_err("%s: unable to alloc memory for new dev_pm_ops\n", + __func__); + return -ENOMEM; + } + + omap_pm->runtime_suspend = omap1_pm_runtime_suspend; + omap_pm->runtime_resume = omap1_pm_runtime_resume; + + platform_bus_set_pm_ops(omap_pm); + + return 0; +} +core_initcall(omap1_pm_runtime_init); +#endif /* CONFIG_PM_RUNTIME */ diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index f754cee4f3c3..550ca9d9991d 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -22,10 +22,12 @@ #include <asm/mach-types.h> -#include <mach/board.h> -#include <mach/mux.h> +#include <plat/board.h> +#include <plat/mux.h> #include <mach/gpio.h> -#include <mach/fpga.h> +#include <plat/fpga.h> + +#include "pm.h" static struct clk * uart1_ck; static struct clk * uart2_ck; @@ -52,9 +54,11 @@ static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset, */ static void __init omap_serial_reset(struct plat_serial8250_port *p) { - omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */ + omap_serial_outp(p, UART_OMAP_MDR1, + UART_OMAP_MDR1_DISABLE); /* disable UART */ omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ - omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ + omap_serial_outp(p, UART_OMAP_MDR1, + UART_OMAP_MDR1_16X_MODE); /* enable UART */ if (!cpu_is_omap15xx()) { omap_serial_outp(p, UART_OMAP_SYSC, 0x01); @@ -64,8 +68,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) static struct plat_serial8250_port serial_platform_data[] = { { - .membase = IO_ADDRESS(OMAP_UART1_BASE), - .mapbase = OMAP_UART1_BASE, + .mapbase = OMAP1_UART1_BASE, .irq = INT_UART1, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -73,8 +76,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = IO_ADDRESS(OMAP_UART2_BASE), - .mapbase = OMAP_UART2_BASE, + .mapbase = OMAP1_UART2_BASE, .irq = INT_UART2, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -82,8 +84,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = IO_ADDRESS(OMAP_UART3_BASE), - .mapbase = OMAP_UART3_BASE, + .mapbase = OMAP1_UART3_BASE, .irq = INT_UART3, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -109,20 +110,12 @@ static struct platform_device serial_device = { void __init omap_serial_init(void) { int i; - const struct omap_uart_config *info; - if (cpu_is_omap730()) { + if (cpu_is_omap7xx()) { serial_platform_data[0].regshift = 0; serial_platform_data[1].regshift = 0; - serial_platform_data[0].irq = INT_730_UART_MODEM_1; - serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; - } - - if (cpu_is_omap850()) { - serial_platform_data[0].regshift = 0; - serial_platform_data[1].regshift = 0; - serial_platform_data[0].irq = INT_850_UART_MODEM_1; - serial_platform_data[1].irq = INT_850_UART_MODEM_IRDA_2; + serial_platform_data[0].irq = INT_7XX_UART_MODEM_1; + serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2; } if (cpu_is_omap15xx()) { @@ -131,19 +124,22 @@ void __init omap_serial_init(void) serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; } - info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); - if (info == NULL) - return; - - for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { - unsigned char reg; + for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) { - if (!((1 << i) & info->enabled_uarts)) { + /* Don't look at UARTs higher than 2 for omap7xx */ + if (cpu_is_omap7xx() && i > 1) { serial_platform_data[i].membase = NULL; serial_platform_data[i].mapbase = 0; continue; } + /* Static mapping, never released */ + serial_platform_data[i].membase = + ioremap(serial_platform_data[i].mapbase, SZ_2K); + if (!serial_platform_data[i].membase) { + printk(KERN_ERR "Could not ioremap uart%i\n", i); + continue; + } switch (i) { case 0: uart1_ck = clk_get(NULL, "uart1_ck"); @@ -154,16 +150,6 @@ void __init omap_serial_init(void) if (cpu_is_omap15xx()) clk_set_rate(uart1_ck, 12000000); } - if (cpu_is_omap15xx()) { - omap_cfg_reg(UART1_TX); - omap_cfg_reg(UART1_RTS); - if (machine_is_omap_innovator()) { - reg = fpga_read(OMAP1510_FPGA_POWER); - reg |= OMAP1510_FPGA_PCR_COM1_EN; - fpga_write(reg, OMAP1510_FPGA_POWER); - udelay(10); - } - } break; case 1: uart2_ck = clk_get(NULL, "uart2_ck"); @@ -176,16 +162,6 @@ void __init omap_serial_init(void) else clk_set_rate(uart2_ck, 48000000); } - if (cpu_is_omap15xx()) { - omap_cfg_reg(UART2_TX); - omap_cfg_reg(UART2_RTS); - if (machine_is_omap_innovator()) { - reg = fpga_read(OMAP1510_FPGA_POWER); - reg |= OMAP1510_FPGA_PCR_COM2_EN; - fpga_write(reg, OMAP1510_FPGA_POWER); - udelay(10); - } - } break; case 2: uart3_ck = clk_get(NULL, "uart3_ck"); @@ -196,10 +172,6 @@ void __init omap_serial_init(void) if (cpu_is_omap15xx()) clk_set_rate(uart3_ck, 12000000); } - if (cpu_is_omap15xx()) { - omap_cfg_reg(UART3_TX); - omap_cfg_reg(UART3_RX); - } break; } omap_serial_reset(&serial_platform_data[i]); @@ -286,6 +258,9 @@ late_initcall(omap_serial_wakeup_init); static int __init omap_init(void) { + if (!cpu_class_is_omap1()) + return -ENODEV; + return platform_device_register(&serial_device); } arch_initcall(omap_init); diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index 22e8568339b0..ef771ce8b030 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S @@ -1,7 +1,7 @@ /* * linux/arch/arm/mach-omap1/sleep.S * - * Low-level OMAP730/1510/1610 sleep/wakeUp support + * Low-level OMAP7XX/1510/1610 sleep/wakeUp support * * Initial SA1110 code: * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com> @@ -57,8 +57,8 @@ * */ -#if defined(CONFIG_ARCH_OMAP730) -ENTRY(omap730_cpu_suspend) +#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) +ENTRY(omap7xx_cpu_suspend) @ save registers on stack stmfd sp!, {r0 - r12, lr} @@ -91,13 +91,13 @@ ENTRY(omap730_cpu_suspend) @ turn off clock domains @ do not disable PERCK (0x04) - mov r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff - orr r5, r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff00 + mov r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff + orr r5, r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff00 strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] @ request ARM idle - mov r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff - orr r3, r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff00 + mov r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff + orr r3, r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff00 strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] @ disable instruction cache @@ -113,7 +113,7 @@ ENTRY(omap730_cpu_suspend) mov r2, #0 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt /* - * omap730_cpu_suspend()'s resume point. + * omap7xx_cpu_suspend()'s resume point. * * It will just start executing here, so we'll restore stuff from the * stack. @@ -132,9 +132,9 @@ ENTRY(omap730_cpu_suspend) @ restore regs and return ldmfd sp!, {r0 - r12, pc} -ENTRY(omap730_cpu_suspend_sz) - .word . - omap730_cpu_suspend -#endif /* CONFIG_ARCH_OMAP730 */ +ENTRY(omap7xx_cpu_suspend_sz) + .word . - omap7xx_cpu_suspend +#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ #ifdef CONFIG_ARCH_OMAP15XX ENTRY(omap1510_cpu_suspend) diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S index 261cdc48228b..7724e520d07c 100644 --- a/arch/arm/mach-omap1/sram.S +++ b/arch/arm/mach-omap1/sram.S @@ -21,13 +21,13 @@ ENTRY(omap1_sram_reprogram_clock) stmfd sp!, {r0 - r12, lr} @ save registers on stack - mov r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000 - orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000 - orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00 + mov r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000 + orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000 + orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00 - mov r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000 - orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 - orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 + mov r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000 + orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 + orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 tst r0, #1 << 4 @ want lock mode? beq newck @ nope diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 4d56408d3cff..ed7a61ff916a 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -52,6 +52,7 @@ #include <asm/mach/irq.h> #include <asm/mach/time.h> +#include <plat/common.h> #define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE #define OMAP_MPU_TIMER_OFFSET 0x100 @@ -62,8 +63,8 @@ typedef struct { u32 read_tim; /* READ_TIM, R */ } omap_mpu_timer_regs_t; -#define omap_mpu_timer_base(n) \ -((volatile omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ +#define omap_mpu_timer_base(n) \ +((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ (n)*OMAP_MPU_TIMER_OFFSET)) static inline unsigned long omap_mpu_timer_read(int nr) @@ -208,7 +209,6 @@ static struct clocksource clocksource_mpu = { .rating = 300, .read = mpu_read, .mask = CLOCKSOURCE_MASK(32), - .shift = 24, .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -217,13 +217,10 @@ static void __init omap_init_clocksource(unsigned long rate) static char err[] __initdata = KERN_ERR "%s: can't register clocksource!\n"; - clocksource_mpu.mult - = clocksource_khz2mult(rate/1000, clocksource_mpu.shift); - setup_irq(INT_TIMER2, &omap_mpu_timer2_irq); omap_mpu_timer_start(1, ~0, 1); - if (clocksource_register(&clocksource_mpu)) + if (clocksource_register_hz(&clocksource_mpu, rate)) printk(err, clocksource_mpu.name); } diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index fd3f7396e162..20cfbcc6c60c 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -52,7 +52,7 @@ #include <asm/irq.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> -#include <mach/dmtimer.h> +#include <plat/dmtimer.h> struct sys_timer omap_timer; @@ -68,12 +68,6 @@ struct sys_timer omap_timer; * --------------------------------------------------------------------------- */ -#if defined(CONFIG_ARCH_OMAP16XX) -#define TIMER_32K_SYNCHRONIZED 0xfffbc410 -#else -#error OMAP 32KHz timer does not currently work on 15XX! -#endif - /* 16xx specific defines */ #define OMAP1_32K_TIMER_BASE 0xfffb9000 #define OMAP1_32K_TIMER_CR 0x08 @@ -150,15 +144,6 @@ static struct clock_event_device clockevent_32k_timer = { .set_mode = omap_32k_timer_set_mode, }; -/* - * The 32KHz synchronized timer is an additional timer on 16xx. - * It is always running. - */ -static inline unsigned long omap_32k_sync_timer_read(void) -{ - return omap_readl(TIMER_32K_SYNCHRONIZED); -} - static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *evt = &clockevent_32k_timer; diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c new file mode 100644 index 000000000000..19de03b074e3 --- /dev/null +++ b/arch/arm/mach-omap1/usb.c @@ -0,0 +1,530 @@ +/* + * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx + * + * Copyright (C) 2004 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/io.h> + +#include <asm/irq.h> + +#include <plat/mux.h> +#include <plat/usb.h> + +/* These routines should handle the standard chip-specific modes + * for usb0/1/2 ports, covering basic mux and transceiver setup. + * + * Some board-*.c files will need to set up additional mux options, + * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup. + */ + +/* TESTED ON: + * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables + * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables + * - 5912 OSK UDC, with *nonstandard* A-to-A cable + * - 1510 Innovator UDC with bundled usb0 cable + * - 1510 Innovator OHCI with bundled usb1/usb2 cable + * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS + * - 1710 custom development board using alternate pin group + * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables + */ + +#define INT_USB_IRQ_GEN IH2_BASE + 20 +#define INT_USB_IRQ_NISO IH2_BASE + 30 +#define INT_USB_IRQ_ISO IH2_BASE + 29 +#define INT_USB_IRQ_HGEN INT_USB_HHC_1 +#define INT_USB_IRQ_OTG IH2_BASE + 8 + +#ifdef CONFIG_USB_GADGET_OMAP + +static struct resource udc_resources[] = { + /* order is significant! */ + { /* registers */ + .start = UDC_BASE, + .end = UDC_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { /* general IRQ */ + .start = INT_USB_IRQ_GEN, + .flags = IORESOURCE_IRQ, + }, { /* PIO IRQ */ + .start = INT_USB_IRQ_NISO, + .flags = IORESOURCE_IRQ, + }, { /* SOF IRQ */ + .start = INT_USB_IRQ_ISO, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 udc_dmamask = ~(u32)0; + +static struct platform_device udc_device = { + .name = "omap_udc", + .id = -1, + .dev = { + .dma_mask = &udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(udc_resources), + .resource = udc_resources, +}; + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ + /* IRQ numbers for omap7xx */ + if(cpu_is_omap7xx()) { + udc_resources[1].start = INT_7XX_USB_GENI; + udc_resources[2].start = INT_7XX_USB_NON_ISO; + udc_resources[3].start = INT_7XX_USB_ISO; + } + pdata->udc_device = &udc_device; +} + +#else + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + +/* The dmamask must be set for OHCI to work */ +static u64 ohci_dmamask = ~(u32)0; + +static struct resource ohci_resources[] = { + { + .start = OMAP_OHCI_BASE, + .end = OMAP_OHCI_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_USB_IRQ_HGEN, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ohci_device = { + .name = "ohci", + .id = -1, + .dev = { + .dma_mask = &ohci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(ohci_resources), + .resource = ohci_resources, +}; + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ + if (cpu_is_omap7xx()) + ohci_resources[1].start = INT_7XX_USB_HHC_1; + pdata->ohci_device = &ohci_device; +} + +#else + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) + +static struct resource otg_resources[] = { + /* order is significant! */ + { + .start = OTG_BASE, + .end = OTG_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { + .start = INT_USB_IRQ_OTG, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device otg_device = { + .name = "omap_otg", + .id = -1, + .num_resources = ARRAY_SIZE(otg_resources), + .resource = otg_resources, +}; + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ + if (cpu_is_omap7xx()) + otg_resources[1].start = INT_7XX_USB_OTG; + pdata->otg_device = &otg_device; +} + +#else + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) +{ + u32 syscon1 = 0; + + if (nwires == 0) { + if (!cpu_is_omap15xx()) { + u32 l; + + /* pulldown D+/D- */ + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~(3 << 1); + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + return 0; + } + + if (is_device) { + if (cpu_is_omap7xx()) { + omap_cfg_reg(AA17_7XX_USB_DM); + omap_cfg_reg(W16_7XX_USB_PU_EN); + omap_cfg_reg(W17_7XX_USB_VBUSI); + omap_cfg_reg(W18_7XX_USB_DMCK_OUT); + omap_cfg_reg(W19_7XX_USB_DCRST); + } else + omap_cfg_reg(W4_USB_PUEN); + } + + if (nwires == 2) { + u32 l; + + // omap_cfg_reg(P9_USB_DP); + // omap_cfg_reg(R8_USB_DM); + + if (cpu_is_omap15xx()) { + /* This works on 1510-Innovator */ + return 0; + } + + /* NOTES: + * - peripheral should configure VBUS detection! + * - only peripherals may use the internal D+/D- pulldowns + * - OTG support on this port not yet written + */ + + /* Don't do this for omap7xx -- it causes USB to not work correctly */ + if (!cpu_is_omap7xx()) { + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~(7 << 4); + if (!is_device) + l |= (3 << 1); + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + + return 3 << 16; + } + + /* alternate pin config, external transceiver */ + if (cpu_is_omap15xx()) { + printk(KERN_ERR "no usb0 alt pin config on 15xx\n"); + return 0; + } + + omap_cfg_reg(V6_USB0_TXD); + omap_cfg_reg(W9_USB0_TXEN); + omap_cfg_reg(W5_USB0_SE0); + if (nwires != 3) + omap_cfg_reg(Y5_USB0_RCV); + + /* NOTE: SPEED and SUSP aren't configured here. OTG hosts + * may be able to use I2C requests to set those bits along + * with VBUS switching and overcurrent detection. + */ + + if (nwires != 6) { + u32 l; + + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~CONF_USB2_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + + switch (nwires) { + case 3: + syscon1 = 2; + break; + case 4: + syscon1 = 1; + break; + case 6: + syscon1 = 3; + { + u32 l; + + omap_cfg_reg(AA9_USB0_VP); + omap_cfg_reg(R9_USB0_VM); + l = omap_readl(USB_TRANSCEIVER_CTRL); + l |= CONF_USB2_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + break; + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 0, nwires); + } + + return syscon1 << 16; +} + +u32 __init omap1_usb1_init(unsigned nwires) +{ + u32 syscon1 = 0; + + if (!cpu_is_omap15xx() && nwires != 6) { + u32 l; + + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~CONF_USB1_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + if (nwires == 0) + return 0; + + /* external transceiver */ + omap_cfg_reg(USB1_TXD); + omap_cfg_reg(USB1_TXEN); + if (nwires != 3) + omap_cfg_reg(USB1_RCV); + + if (cpu_is_omap15xx()) { + omap_cfg_reg(USB1_SEO); + omap_cfg_reg(USB1_SPEED); + // SUSP + } else if (cpu_is_omap1610() || cpu_is_omap5912()) { + omap_cfg_reg(W13_1610_USB1_SE0); + omap_cfg_reg(R13_1610_USB1_SPEED); + // SUSP + } else if (cpu_is_omap1710()) { + omap_cfg_reg(R13_1710_USB1_SE0); + // SUSP + } else { + pr_debug("usb%d cpu unrecognized\n", 1); + return 0; + } + + switch (nwires) { + case 2: + goto bad; + case 3: + syscon1 = 2; + break; + case 4: + syscon1 = 1; + break; + case 6: + syscon1 = 3; + omap_cfg_reg(USB1_VP); + omap_cfg_reg(USB1_VM); + if (!cpu_is_omap15xx()) { + u32 l; + + l = omap_readl(USB_TRANSCEIVER_CTRL); + l |= CONF_USB1_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + break; + default: +bad: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 1, nwires); + } + + return syscon1 << 20; +} + +u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) +{ + u32 syscon1 = 0; + + /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ + if (alt_pingroup || nwires == 0) + return 0; + + if (!cpu_is_omap15xx() && nwires != 6) { + u32 l; + + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~CONF_USB2_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + + /* external transceiver */ + if (cpu_is_omap15xx()) { + omap_cfg_reg(USB2_TXD); + omap_cfg_reg(USB2_TXEN); + omap_cfg_reg(USB2_SEO); + if (nwires != 3) + omap_cfg_reg(USB2_RCV); + /* there is no USB2_SPEED */ + } else if (cpu_is_omap16xx()) { + omap_cfg_reg(V6_USB2_TXD); + omap_cfg_reg(W9_USB2_TXEN); + omap_cfg_reg(W5_USB2_SE0); + if (nwires != 3) + omap_cfg_reg(Y5_USB2_RCV); + // FIXME omap_cfg_reg(USB2_SPEED); + } else { + pr_debug("usb%d cpu unrecognized\n", 1); + return 0; + } + + // omap_cfg_reg(USB2_SUSP); + + switch (nwires) { + case 2: + goto bad; + case 3: + syscon1 = 2; + break; + case 4: + syscon1 = 1; + break; + case 5: + goto bad; + case 6: + syscon1 = 3; + if (cpu_is_omap15xx()) { + omap_cfg_reg(USB2_VP); + omap_cfg_reg(USB2_VM); + } else { + u32 l; + + omap_cfg_reg(AA9_USB2_VP); + omap_cfg_reg(R9_USB2_VM); + l = omap_readl(USB_TRANSCEIVER_CTRL); + l |= CONF_USB2_UNI_R; + omap_writel(l, USB_TRANSCEIVER_CTRL); + } + break; + default: +bad: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 2, nwires); + } + + return syscon1 << 24; +} + +#ifdef CONFIG_ARCH_OMAP15XX + +/* ULPD_DPLL_CTRL */ +#define DPLL_IOB (1 << 13) +#define DPLL_PLL_ENABLE (1 << 4) +#define DPLL_LOCK (1 << 0) + +/* ULPD_APLL_CTRL */ +#define APLL_NDPLL_SWITCH (1 << 0) + +static void __init omap_1510_usb_init(struct omap_usb_config *config) +{ + unsigned int val; + u16 w; + + config->usb0_init(config->pins[0], is_usb0_device(config)); + config->usb1_init(config->pins[1]); + config->usb2_init(config->pins[2], 0); + + val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1); + val |= (config->hmc_mode << 1); + omap_writel(val, MOD_CONF_CTRL_0); + + printk("USB: hmc %d", config->hmc_mode); + if (config->pins[0]) + printk(", usb0 %d wires%s", config->pins[0], + is_usb0_device(config) ? " (dev)" : ""); + if (config->pins[1]) + printk(", usb1 %d wires", config->pins[1]); + if (config->pins[2]) + printk(", usb2 %d wires", config->pins[2]); + printk("\n"); + + /* use DPLL for 48 MHz function clock */ + pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL), + omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ)); + + w = omap_readw(ULPD_APLL_CTRL); + w &= ~APLL_NDPLL_SWITCH; + omap_writew(w, ULPD_APLL_CTRL); + + w = omap_readw(ULPD_DPLL_CTRL); + w |= DPLL_IOB | DPLL_PLL_ENABLE; + omap_writew(w, ULPD_DPLL_CTRL); + + w = omap_readw(ULPD_SOFT_REQ); + w |= SOFT_UDC_REQ | SOFT_DPLL_REQ; + omap_writew(w, ULPD_SOFT_REQ); + + while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK)) + cpu_relax(); + +#ifdef CONFIG_USB_GADGET_OMAP + if (config->register_dev) { + int status; + + udc_device.dev.platform_data = config; + status = platform_device_register(&udc_device); + if (status) + pr_debug("can't register UDC device, %d\n", status); + /* udc driver gates 48MHz by D+ pullup */ + } +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + if (config->register_host) { + int status; + + ohci_device.dev.platform_data = config; + status = platform_device_register(&ohci_device); + if (status) + pr_debug("can't register OHCI device, %d\n", status); + /* hcd explicitly gates 48MHz */ + } +#endif +} + +#else +static inline void omap_1510_usb_init(struct omap_usb_config *config) {} +#endif + +void __init omap1_usb_init(struct omap_usb_config *pdata) +{ + pdata->usb0_init = omap1_usb0_init; + pdata->usb1_init = omap1_usb1_init; + pdata->usb2_init = omap1_usb2_init; + udc_device_init(pdata); + ohci_device_init(pdata); + otg_device_init(pdata); + + if (cpu_is_omap7xx() || cpu_is_omap16xx()) + omap_otg_init(pdata); + else if (cpu_is_omap15xx()) + omap_1510_usb_init(pdata); + else + printk(KERN_ERR "USB: No init for your chip yet\n"); +} |