diff options
Diffstat (limited to 'arch/arm/mach-omap2')
43 files changed, 971 insertions, 558 deletions
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 618216c8f742..d934169d6553 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -187,7 +187,8 @@ static int __init omap2430_i2c_init(void) { omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo, ARRAY_SIZE(sdp2430_i2c1_boardinfo)); - omap2_pmic_init("twl4030", &sdp2430_twldata); + omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ, + &sdp2430_twldata); return 0; } @@ -243,17 +244,11 @@ static void __init omap_2430sdp_init(void) "Secondary LCD backlight"); } -static void __init omap_2430sdp_map_io(void) -{ - omap2_set_globals_243x(); - omap243x_map_common_io(); -} - MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") /* Maintainer: Syed Khasim - Texas Instruments Inc */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap_2430sdp_map_io, + .map_io = omap243x_map_io, .init_early = omap2430_init_early, .init_irq = omap2_init_irq, .init_machine = omap_2430sdp_init, diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index ab19d305f61e..a97c29a73edd 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -129,7 +129,7 @@ static const int sdp4430_keymap[] = { KEY(7, 6, KEY_OK), KEY(7, 7, KEY_DOWN), }; -static struct omap_device_pad keypad_pads[] __initdata = { +static struct omap_device_pad keypad_pads[] = { { .name = "kpd_col1.kpd_col1", .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1, }, @@ -825,17 +825,11 @@ static void __init omap_4430sdp_init(void) omap_4430sdp_display_init(); } -static void __init omap_4430sdp_map_io(void) -{ - omap2_set_globals_443x(); - omap44xx_map_common_io(); -} - MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap_4430sdp_map_io, + .map_io = omap4_map_io, .init_early = omap4430_init_early, .init_irq = gic_init_irq, .init_machine = omap_4430sdp_init, diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index cf546f86014e..852843638fa9 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -337,17 +337,11 @@ static void __init omap_apollon_init(void) omap_sdrc_init(NULL, NULL); } -static void __init omap_apollon_map_io(void) -{ - omap2_set_globals_242x(); - omap242x_map_common_io(); -} - MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap_apollon_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = omap_apollon_init, diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 4b1f6c68c358..059b74dd9289 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -397,11 +397,6 @@ static struct platform_device keys_gpio = { }, }; -static void __init devkit8000_init_irq(void) -{ - omap3_init_irq(); -} - #define OMAP_DM9000_BASE 0x2c000000 static struct resource omap_dm9000_resources[] = { @@ -665,7 +660,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap35xx_init_early, - .init_irq = devkit8000_init_irq, + .init_irq = omap3_init_irq, .init_machine = devkit8000_init, .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c index aa1b0cbe19d2..30a6f527510c 100644 --- a/arch/arm/mach-omap2/board-flash.c +++ b/arch/arm/mach-omap2/board-flash.c @@ -148,11 +148,6 @@ __init board_nand_init(struct mtd_partition *nand_parts, board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs; gpmc_nand_init(&board_nand_data); } -#else -void -__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, int nand_type) -{ -} #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ /** diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h index c240a3f8d163..d25503a98417 100644 --- a/arch/arm/mach-omap2/board-flash.h +++ b/arch/arm/mach-omap2/board-flash.h @@ -24,7 +24,26 @@ struct flash_partitions { int nr_parts; }; +#if defined(CONFIG_MTD_NAND_OMAP2) || \ + defined(CONFIG_MTD_NAND_OMAP2_MODULE) || \ + defined(CONFIG_MTD_ONENAND_OMAP2) || \ + defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) extern void board_flash_init(struct flash_partitions [], char chip_sel[][GPMC_CS_NUM], int nand_type); +#else +static inline void board_flash_init(struct flash_partitions part[], + char chip_sel[][GPMC_CS_NUM], int nand_type) +{ +} +#endif + +#if defined(CONFIG_MTD_NAND_OMAP2) || \ + defined(CONFIG_MTD_NAND_OMAP2_MODULE) extern void board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, int nand_type); +#else +static inline void board_nand_init(struct mtd_partition *nand_parts, + u8 nr_parts, u8 cs, int nand_type) +{ +} +#endif diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 948fde010c69..8486142dcae7 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -290,11 +290,6 @@ static struct omap_board_config_kernel h4_config[] __initdata = { { OMAP_TAG_LCD, &h4_lcd_config }, }; -static void __init omap_h4_init_irq(void) -{ - omap2_init_irq(); -} - static struct at24_platform_data m24c01 = { .byte_len = SZ_1K / 8, .page_size = 16, @@ -369,19 +364,13 @@ static void __init omap_h4_init(void) h4_init_flash(); } -static void __init omap_h4_map_io(void) -{ - omap2_set_globals_242x(); - omap242x_map_common_io(); -} - MACHINE_START(OMAP_H4, "OMAP2420 H4 board") /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap_h4_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, - .init_irq = omap_h4_init_irq, + .init_irq = omap2_init_irq, .init_machine = omap_h4_init, .timer = &omap2_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 77a4e19222e2..d1f4a0292c42 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -616,12 +616,6 @@ static struct i2c_board_info n810_i2c_board_info_2[] __initdata = { }, }; -static void __init n8x0_map_io(void) -{ - omap2_set_globals_242x(); - omap242x_map_common_io(); -} - #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { /* I2S codec port pins for McBSP block */ @@ -692,7 +686,7 @@ static void __init n8x0_init_machine(void) MACHINE_START(NOKIA_N800, "Nokia N800") .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = n8x0_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, @@ -702,7 +696,7 @@ MACHINE_END MACHINE_START(NOKIA_N810, "Nokia N810") .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = n8x0_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, @@ -712,7 +706,7 @@ MACHINE_END MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = n8x0_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index ce3234d6a344..e085371eb494 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -449,11 +449,6 @@ static void __init omap3_beagle_init_early(void) omap2_init_common_infrastructure(); } -static void __init omap3_beagle_init_irq(void) -{ - omap3_init_irq(); -} - static struct platform_device *omap3_beagle_devices[] __initdata = { &leds_gpio, &keys_gpio, @@ -561,7 +556,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3_beagle_init_early, - .init_irq = omap3_beagle_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3_beagle_init, .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 807c27406792..fa58a0f1584a 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -428,11 +428,6 @@ static int __init omap3_stalker_i2c_init(void) static struct omap_board_config_kernel omap3_stalker_config[] __initdata = { }; -static void __init omap3_stalker_init_irq(void) -{ - omap3_init_irq(); -} - static struct platform_device *omap3_stalker_devices[] __initdata = { &keys_gpio, }; @@ -492,7 +487,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") .boot_params = 0x80000100, .map_io = omap3_map_io, .init_early = omap35xx_init_early, - .init_irq = omap3_stalker_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3_stalker_init, .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index f7f18092f36d..05488fbc20d5 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -326,11 +326,6 @@ static struct omap_board_mux board_mux[] __initdata = { }; #endif -static void __init omap3_touchbook_init_irq(void) -{ - omap3_init_irq(); -} - static struct platform_device *omap3_touchbook_devices[] __initdata = { &omap3_touchbook_lcd_device, &leds_gpio, @@ -403,7 +398,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3430_init_early, - .init_irq = omap3_touchbook_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3_touchbook_init, .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 1bce76589784..e26929049a4d 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -570,17 +570,11 @@ static void __init omap4_panda_init(void) omap4_panda_display_init(); } -static void __init omap4_panda_map_io(void) -{ - omap2_set_globals_443x(); - omap44xx_map_common_io(); -} - MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") /* Maintainer: David Anders - Texas Instruments Inc */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap4_panda_map_io, + .map_io = omap4_map_io, .init_early = omap4430_init_early, .init_irq = gic_init_irq, .init_machine = omap4_panda_init, diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index a3182e846b14..a98db616e0d4 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -143,16 +143,10 @@ static void __init rm680_init(void) rm680_peripherals_init(); } -static void __init rm680_map_io(void) -{ - omap2_set_globals_3xxx(); - omap34xx_map_common_io(); -} - MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = rm680_map_io, + .map_io = omap3_map_io, .init_early = omap3630_init_early, .init_irq = omap3_init_irq, .init_machine = rm680_init, diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 32a79e28379c..8677a06aa4a7 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -139,12 +139,6 @@ static void __init rx51_init(void) platform_device_register(&leds_gpio); } -static void __init rx51_map_io(void) -{ - omap2_set_globals_3xxx(); - omap34xx_map_common_io(); -} - static void __init rx51_reserve(void) { rx51_video_mem_init(); @@ -155,7 +149,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */ .boot_params = 0x80000100, .reserve = rx51_reserve, - .map_io = rx51_map_io, + .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, .init_machine = rx51_init, diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index debc040872f1..14a6277dd184 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -1898,6 +1898,54 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "pka_ick", &pka_ick, CK_242X), CLK(NULL, "usb_fck", &usb_fck, CK_242X), CLK("musb-hdrc", "fck", &osc_ck, CK_242X), + CLK("omap_timer.1", "fck", &gpt1_fck, CK_242X), + CLK("omap_timer.2", "fck", &gpt2_fck, CK_242X), + CLK("omap_timer.3", "fck", &gpt3_fck, CK_242X), + CLK("omap_timer.4", "fck", &gpt4_fck, CK_242X), + CLK("omap_timer.5", "fck", &gpt5_fck, CK_242X), + CLK("omap_timer.6", "fck", &gpt6_fck, CK_242X), + CLK("omap_timer.7", "fck", &gpt7_fck, CK_242X), + CLK("omap_timer.8", "fck", &gpt8_fck, CK_242X), + CLK("omap_timer.9", "fck", &gpt9_fck, CK_242X), + CLK("omap_timer.10", "fck", &gpt10_fck, CK_242X), + CLK("omap_timer.11", "fck", &gpt11_fck, CK_242X), + CLK("omap_timer.12", "fck", &gpt12_fck, CK_242X), + CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X), }; /* diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 96a942e42db1..ea6717cfa3c8 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -1998,6 +1998,54 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X), CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X), + CLK("omap_timer.1", "fck", &gpt1_fck, CK_243X), + CLK("omap_timer.2", "fck", &gpt2_fck, CK_243X), + CLK("omap_timer.3", "fck", &gpt3_fck, CK_243X), + CLK("omap_timer.4", "fck", &gpt4_fck, CK_243X), + CLK("omap_timer.5", "fck", &gpt5_fck, CK_243X), + CLK("omap_timer.6", "fck", &gpt6_fck, CK_243X), + CLK("omap_timer.7", "fck", &gpt7_fck, CK_243X), + CLK("omap_timer.8", "fck", &gpt8_fck, CK_243X), + CLK("omap_timer.9", "fck", &gpt9_fck, CK_243X), + CLK("omap_timer.10", "fck", &gpt10_fck, CK_243X), + CLK("omap_timer.11", "fck", &gpt11_fck, CK_243X), + CLK("omap_timer.12", "fck", &gpt12_fck, CK_243X), + CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X), }; /* diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index dadb8c6c0115..65dd363163bc 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3464,6 +3464,42 @@ static struct omap_clk omap3xxx_clks[] = { CLK("musb-am35x", "fck", &hsotgusb_fck_am35xx, CK_AM35XX), CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX), CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX), + CLK("omap_timer.1", "fck", &gpt1_fck, CK_3XXX), + CLK("omap_timer.2", "fck", &gpt2_fck, CK_3XXX), + CLK("omap_timer.3", "fck", &gpt3_fck, CK_3XXX), + CLK("omap_timer.4", "fck", &gpt4_fck, CK_3XXX), + CLK("omap_timer.5", "fck", &gpt5_fck, CK_3XXX), + CLK("omap_timer.6", "fck", &gpt6_fck, CK_3XXX), + CLK("omap_timer.7", "fck", &gpt7_fck, CK_3XXX), + CLK("omap_timer.8", "fck", &gpt8_fck, CK_3XXX), + CLK("omap_timer.9", "fck", &gpt9_fck, CK_3XXX), + CLK("omap_timer.10", "fck", &gpt10_fck, CK_3XXX), + CLK("omap_timer.11", "fck", &gpt11_fck, CK_3XXX), + CLK("omap_timer.12", "fck", &gpt12_fck, CK_3XXX), + CLK("omap_timer.1", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.2", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.3", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.4", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.5", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.6", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.7", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.8", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.9", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.10", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.11", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.12", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.1", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.2", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.3", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.4", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.5", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.6", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.7", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.8", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.9", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.10", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.11", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.12", "sys_ck", &sys_ck, CK_3XXX), }; diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index c0b6fbda3408..946bf04a956d 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3363,6 +3363,39 @@ static struct omap_clk omap44xx_clks[] = { CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), CLK("omap_wdt", "ick", &dummy_ck, CK_443X), + CLK("omap_timer.1", "fck", &timer1_fck, CK_443X), + CLK("omap_timer.2", "fck", &timer2_fck, CK_443X), + CLK("omap_timer.3", "fck", &timer3_fck, CK_443X), + CLK("omap_timer.4", "fck", &timer4_fck, CK_443X), + CLK("omap_timer.5", "fck", &timer5_fck, CK_443X), + CLK("omap_timer.6", "fck", &timer6_fck, CK_443X), + CLK("omap_timer.7", "fck", &timer7_fck, CK_443X), + CLK("omap_timer.8", "fck", &timer8_fck, CK_443X), + CLK("omap_timer.9", "fck", &timer9_fck, CK_443X), + CLK("omap_timer.10", "fck", &timer10_fck, CK_443X), + CLK("omap_timer.11", "fck", &timer11_fck, CK_443X), + CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.4", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.5", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.6", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.7", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.8", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.9", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.10", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.11", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.1", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.2", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.3", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.4", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.9", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.10", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.11", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.5", "sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.6", "sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.7", "sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.8", "sys_ck", &syc_clk_div_ck, CK_443X), }; int __init omap4xxx_clk_init(void) diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 3f20cbb9967b..de61f15c48e2 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -56,6 +56,12 @@ void __init omap2_set_globals_242x(void) { __omap2_set_globals(&omap242x_globals); } + +void __init omap242x_map_io(void) +{ + omap2_set_globals_242x(); + omap242x_map_common_io(); +} #endif #if defined(CONFIG_SOC_OMAP2430) @@ -74,6 +80,12 @@ void __init omap2_set_globals_243x(void) { __omap2_set_globals(&omap243x_globals); } + +void __init omap243x_map_io(void) +{ + omap2_set_globals_243x(); + omap243x_map_common_io(); +} #endif #if defined(CONFIG_ARCH_OMAP3) @@ -138,5 +150,11 @@ void __init omap2_set_globals_443x(void) omap2_set_globals_control(&omap4_globals); omap2_set_globals_prcm(&omap4_globals); } + +void __init omap4_map_io(void) +{ + omap2_set_globals_443x(); + omap44xx_map_common_io(); +} #endif diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 1077ad663f93..10adf66be7ba 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -44,7 +44,7 @@ static int __init omap3_l3_init(void) { int l; struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; char oh_name[L3_MODULES_MAX_LEN]; /* @@ -61,12 +61,12 @@ static int __init omap3_l3_init(void) if (!oh) pr_err("could not look up %s\n", oh_name); - od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0, + pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0, NULL, 0, 0); - WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); + WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); - return IS_ERR(od) ? PTR_ERR(od) : 0; + return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; } postcore_initcall(omap3_l3_init); @@ -74,7 +74,7 @@ static int __init omap4_l3_init(void) { int l, i; struct omap_hwmod *oh[3]; - struct omap_device *od; + struct platform_device *pdev; char oh_name[L3_MODULES_MAX_LEN]; /* @@ -92,12 +92,12 @@ static int __init omap4_l3_init(void) pr_err("could not look up %s\n", oh_name); } - od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, + pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, 0, NULL, 0, 0); - WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); + WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); - return IS_ERR(od) ? PTR_ERR(od) : 0; + return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; } postcore_initcall(omap4_l3_init); @@ -232,7 +232,7 @@ struct omap_device_pm_latency omap_keyboard_latency[] = { int __init omap4_keyboard_init(struct omap4_keypad_platform_data *sdp4430_keypad_data, struct omap_board_data *bdata) { - struct omap_device *od; + struct platform_device *pdev; struct omap_hwmod *oh; struct omap4_keypad_platform_data *keypad_data; unsigned int id = -1; @@ -247,15 +247,15 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data keypad_data = sdp4430_keypad_data; - od = omap_device_build(name, id, oh, keypad_data, + pdev = omap_device_build(name, id, oh, keypad_data, sizeof(struct omap4_keypad_platform_data), omap_keyboard_latency, ARRAY_SIZE(omap_keyboard_latency), 0); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); - return PTR_ERR(od); + return PTR_ERR(pdev); } oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); @@ -274,7 +274,7 @@ static struct omap_device_pm_latency mbox_latencies[] = { static inline void omap_init_mbox(void) { struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; oh = omap_hwmod_lookup("mailbox"); if (!oh) { @@ -282,10 +282,10 @@ static inline void omap_init_mbox(void) return; } - od = omap_device_build("omap-mailbox", -1, oh, NULL, 0, + pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, mbox_latencies, ARRAY_SIZE(mbox_latencies), 0); - WARN(IS_ERR(od), "%s: could not build device, err %ld\n", - __func__, PTR_ERR(od)); + WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n", + __func__, PTR_ERR(pdev)); } #else static inline void omap_init_mbox(void) { } @@ -344,7 +344,7 @@ struct omap_device_pm_latency omap_mcspi_latency[] = { static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) { - struct omap_device *od; + struct platform_device *pdev; char *name = "omap2_mcspi"; struct omap2_mcspi_platform_config *pdata; static int spi_num; @@ -371,10 +371,10 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) } spi_num++; - od = omap_device_build(name, spi_num, oh, pdata, + pdev = omap_device_build(name, spi_num, oh, pdata, sizeof(*pdata), omap_mcspi_latency, ARRAY_SIZE(omap_mcspi_latency), 0); - WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n", + WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n", name, oh->name); kfree(pdata); return 0; @@ -709,7 +709,7 @@ static struct omap_device_pm_latency omap_wdt_latency[] = { static int __init omap_init_wdt(void) { int id = -1; - struct omap_device *od; + struct platform_device *pdev; struct omap_hwmod *oh; char *oh_name = "wd_timer2"; char *dev_name = "omap_wdt"; @@ -723,10 +723,10 @@ static int __init omap_init_wdt(void) return -EINVAL; } - od = omap_device_build(dev_name, id, oh, NULL, 0, + pdev = omap_device_build(dev_name, id, oh, NULL, 0, omap_wdt_latency, ARRAY_SIZE(omap_wdt_latency), 0); - WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n", + WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", dev_name, oh->name); return 0; } diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index a5b7a236aa5b..18693f6de041 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -78,7 +78,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) { int r = 0; struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; int i, oh_count; struct omap_display_platform_data pdata; const struct omap_dss_hwmod_data *curr_dss_hwmod; @@ -108,13 +108,13 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) return -ENODEV; } - od = omap_device_build(curr_dss_hwmod[i].dev_name, + pdev = omap_device_build(curr_dss_hwmod[i].dev_name, curr_dss_hwmod[i].id, oh, &pdata, sizeof(struct omap_display_platform_data), omap_dss_latency, ARRAY_SIZE(omap_dss_latency), 0); - if (WARN((IS_ERR(od)), "Could not build omap_device for %s\n", + if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n", curr_dss_hwmod[i].oh_name)) return -ENODEV; } diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c index c9ff0e79703d..ae8cb3fb1830 100644 --- a/arch/arm/mach-omap2/dma.c +++ b/arch/arm/mach-omap2/dma.c @@ -228,7 +228,7 @@ static u32 configure_dma_errata(void) /* One time initializations */ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) { - struct omap_device *od; + struct platform_device *pdev; struct omap_system_dma_plat_info *p; struct resource *mem; char *name = "omap_dma_system"; @@ -258,23 +258,23 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) p->errata = configure_dma_errata(); - od = omap_device_build(name, 0, oh, p, sizeof(*p), + pdev = omap_device_build(name, 0, oh, p, sizeof(*p), omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); kfree(p); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, name, oh->name); - return PTR_ERR(od); + return PTR_ERR(pdev); } - mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0); + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!mem) { - dev_err(&od->pdev.dev, "%s: no mem resource\n", __func__); + dev_err(&pdev->dev, "%s: no mem resource\n", __func__); return -EINVAL; } dma_base = ioremap(mem->start, resource_size(mem)); if (!dma_base) { - dev_err(&od->pdev.dev, "%s: ioremap fail\n", __func__); + dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); return -ENOMEM; } @@ -283,7 +283,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) (d->lch_count), GFP_KERNEL); if (!d->chan) { - dev_err(&od->pdev.dev, "%s: kzalloc fail\n", __func__); + dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__); return -ENOMEM; } return 0; diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 2765cdc3152d..652ccc574196 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c @@ -34,7 +34,7 @@ static struct omap_device_pm_latency omap_gpio_latency[] = { static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) { - struct omap_device *od; + struct platform_device *pdev; struct omap_gpio_platform_data *pdata; struct omap_gpio_dev_attr *dev_attr; char *name = "omap_gpio"; @@ -107,19 +107,19 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) return -EINVAL; } - od = omap_device_build(name, id - 1, oh, pdata, + pdev = omap_device_build(name, id - 1, oh, pdata, sizeof(*pdata), omap_gpio_latency, ARRAY_SIZE(omap_gpio_latency), false); kfree(pdata); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); - return PTR_ERR(od); + return PTR_ERR(pdev); } - omap_device_disable_idle_on_suspend(od); + omap_device_disable_idle_on_suspend(pdev); gpio_bank_count++; return 0; diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index a9b45c76e1d3..2dc002a388b3 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -137,8 +137,7 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot, */ reg = omap4_ctrl_pad_readl(control_pbias_offset); reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | - OMAP4_MMC1_PWRDNZ_MASK | - OMAP4_USBC1_ICUSB_PWRDNZ_MASK); + OMAP4_MMC1_PWRDNZ_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); } @@ -156,8 +155,7 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, else reg |= OMAP4_MMC1_PBIASLITE_VMODE_MASK; reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | - OMAP4_MMC1_PWRDNZ_MASK | - OMAP4_USBC1_ICUSB_PWRDNZ_MASK); + OMAP4_MMC1_PWRDNZ_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); timeout = jiffies + msecs_to_jiffies(5); @@ -171,16 +169,14 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK) { pr_err("Pbias Voltage is not same as LDO\n"); /* Caution : On VMODE_ERROR Power Down MMC IO */ - reg &= ~(OMAP4_MMC1_PWRDNZ_MASK | - OMAP4_USBC1_ICUSB_PWRDNZ_MASK); + reg &= ~(OMAP4_MMC1_PWRDNZ_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); } } else { reg = omap4_ctrl_pad_readl(control_pbias_offset); reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | OMAP4_MMC1_PWRDNZ_MASK | - OMAP4_MMC1_PBIASLITE_VMODE_MASK | - OMAP4_USBC1_ICUSB_PWRDNZ_MASK); + OMAP4_MMC1_PBIASLITE_VMODE_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); } } @@ -430,7 +426,7 @@ static struct omap_device_pm_latency omap_hsmmc_latency[] = { void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) { struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; struct omap_device_pm_latency *ohl; char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; struct omap_mmc_platform_data *mmc_data; @@ -471,9 +467,9 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) mmc_data->controller_flags = mmc_dev_attr->flags; } - od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, + pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); kfree(mmc_data->slots[0].name); goto done; @@ -482,7 +478,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) * return device handle to board setup code * required to populate for regulator framework structure */ - hsmmcinfo->dev = &od->pdev.dev; + hsmmcinfo->dev = &pdev->dev; done: kfree(mmc_data); diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c index 06d4a80660a5..0b3ae9d9c3b3 100644 --- a/arch/arm/mach-omap2/hwspinlock.c +++ b/arch/arm/mach-omap2/hwspinlock.c @@ -35,7 +35,7 @@ int __init hwspinlocks_init(void) { int retval = 0; struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; const char *oh_name = "spinlock"; const char *dev_name = "omap_hwspinlock"; @@ -48,13 +48,13 @@ int __init hwspinlocks_init(void) if (oh == NULL) return -EINVAL; - od = omap_device_build(dev_name, 0, oh, NULL, 0, + pdev = omap_device_build(dev_name, 0, oh, NULL, 0, omap_spinlock_latency, ARRAY_SIZE(omap_spinlock_latency), false); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { pr_err("Can't build omap_device for %s:%s\n", dev_name, oh_name); - retval = PTR_ERR(od); + retval = PTR_ERR(pdev); } return retval; diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 3a12f7586a4c..65f1be6a182c 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -165,8 +165,8 @@ static void __init omap_init_irq(u32 base, int nr_irqs) omap_irq_bank_init_one(bank); - for (i = 0, j = 0; i < bank->nr_irqs; i += 32, j += 0x20) - omap_alloc_gc(bank->base_reg + j, i, 32); + for (j = 0; j < bank->nr_irqs; j += 32) + omap_alloc_gc(bank->base_reg + j, j, 32); nr_of_irqs += bank->nr_irqs; nr_banks++; diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 4a6ef6ab8458..5063f253c4b9 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -27,66 +27,69 @@ #include "control.h" -/* McBSP internal signal muxing functions */ +/* + * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle. + * Sidetone needs non-gated ICLK and sidetone autoidle is broken. + */ +#include "cm2xxx_3xxx.h" +#include "cm-regbits-34xx.h" -void omap2_mcbsp1_mux_clkr_src(u8 mux) +/* McBSP internal signal muxing function */ +static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal, + const char *src) { u32 v; v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); - if (mux == CLKR_SRC_CLKR) - v &= ~OMAP2_MCBSP1_CLKR_MASK; - else if (mux == CLKR_SRC_CLKX) - v |= OMAP2_MCBSP1_CLKR_MASK; - omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); -} -EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src); -void omap2_mcbsp1_mux_fsr_src(u8 mux) -{ - u32 v; + if (!strcmp(signal, "clkr")) { + if (!strcmp(src, "clkr")) + v &= ~OMAP2_MCBSP1_CLKR_MASK; + else if (!strcmp(src, "clkx")) + v |= OMAP2_MCBSP1_CLKR_MASK; + else + return -EINVAL; + } else if (!strcmp(signal, "fsr")) { + if (!strcmp(src, "fsr")) + v &= ~OMAP2_MCBSP1_FSR_MASK; + else if (!strcmp(src, "fsx")) + v |= OMAP2_MCBSP1_FSR_MASK; + else + return -EINVAL; + } else { + return -EINVAL; + } - v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); - if (mux == FSR_SRC_FSR) - v &= ~OMAP2_MCBSP1_FSR_MASK; - else if (mux == FSR_SRC_FSX) - v |= OMAP2_MCBSP1_FSR_MASK; omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); + + return 0; } -EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); /* McBSP CLKS source switching function */ - -int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) +static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk, + const char *src) { - struct omap_mcbsp *mcbsp; struct clk *fck_src; char *fck_src_name; int r; - if (!omap_mcbsp_check_valid_id(id)) { - pr_err("%s: Invalid id (%d)\n", __func__, id + 1); - return -EINVAL; - } - mcbsp = id_to_mcbsp_ptr(id); - - if (fck_src_id == MCBSP_CLKS_PAD_SRC) + if (!strcmp(src, "clks_ext")) fck_src_name = "pad_fck"; - else if (fck_src_id == MCBSP_CLKS_PRCM_SRC) + else if (!strcmp(src, "clks_fclk")) fck_src_name = "prcm_fck"; else return -EINVAL; - fck_src = clk_get(mcbsp->dev, fck_src_name); + fck_src = clk_get(dev, fck_src_name); if (IS_ERR_OR_NULL(fck_src)) { pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks", fck_src_name); return -EINVAL; } - pm_runtime_put_sync(mcbsp->dev); + pm_runtime_put_sync(dev); - r = clk_set_parent(mcbsp->fclk, fck_src); + r = clk_set_parent(clk, fck_src); if (IS_ERR_VALUE(r)) { pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n", "clks", fck_src_name); @@ -94,13 +97,30 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) return -EINVAL; } - pm_runtime_get_sync(mcbsp->dev); + pm_runtime_get_sync(dev); clk_put(fck_src); return 0; } -EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); + +static int omap3_enable_st_clock(unsigned int id, bool enable) +{ + unsigned int w; + + /* + * Sidetone uses McBSP ICLK - which must not idle when sidetones + * are enabled or sidetones start sounding ugly. + */ + w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE); + if (enable) + w &= ~(1 << (id - 2)); + else + w |= 1 << (id - 2); + omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE); + + return 0; +} struct omap_device_pm_latency omap2_mcbsp_latency[] = { { @@ -116,7 +136,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) char *name = "omap-mcbsp"; struct omap_hwmod *oh_device[2]; struct omap_mcbsp_platform_data *pdata = NULL; - struct omap_device *od; + struct platform_device *pdev; sscanf(oh->name, "mcbsp%d", &id); @@ -126,7 +146,13 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) return -ENOMEM; } - pdata->mcbsp_config_type = oh->class->rev; + pdata->reg_step = 4; + if (oh->class->rev < MCBSP_CONFIG_TYPE2) { + pdata->reg_size = 2; + } else { + pdata->reg_size = 4; + pdata->has_ccr = true; + } if (oh->class->rev == MCBSP_CONFIG_TYPE3) { if (id == 2) @@ -137,22 +163,29 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) pdata->buffer_size = 0x80; } + if (oh->class->rev >= MCBSP_CONFIG_TYPE3) + pdata->has_wakeup = true; + oh_device[0] = oh; if (oh->dev_attr) { oh_device[1] = omap_hwmod_lookup(( (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); + pdata->enable_st_clock = omap3_enable_st_clock; count++; } - od = omap_device_build_ss(name, id, oh_device, count, pdata, + pdev = omap_device_build_ss(name, id, oh_device, count, pdata, sizeof(*pdata), omap2_mcbsp_latency, ARRAY_SIZE(omap2_mcbsp_latency), false); kfree(pdata); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, name, oh->name); - return PTR_ERR(od); + return PTR_ERR(pdev); } + pdata->set_clk_src = omap2_mcbsp_set_clk_src; + if (id == 1) + pdata->mux_signal = omap2_mcbsp1_mux_rx_clk; omap_mcbsp_count++; return 0; } diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index b6ea69a5c2f8..6d7206213525 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -269,6 +269,16 @@ static struct omap_hwmod omap2420_iva_hwmod = { .masters_cnt = ARRAY_SIZE(omap2420_iva_masters), }; +/* always-on timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { + .timer_capability = OMAP_TIMER_ALWON, +}; + +/* pwm timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { + .timer_capability = OMAP_TIMER_HAS_PWM, +}; + /* timer1 */ static struct omap_hwmod omap2420_timer1_hwmod; @@ -309,6 +319,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -345,6 +356,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -381,6 +393,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -417,6 +430,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -453,6 +467,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -490,6 +505,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -526,6 +542,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -562,6 +579,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -598,6 +616,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -634,6 +653,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -670,6 +690,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -706,6 +727,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), .class = &omap2xxx_timer_hwmod_class, diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 56de8d616313..a2580d01c3ff 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -343,6 +343,16 @@ static struct omap_hwmod omap2430_iva_hwmod = { .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), }; +/* always-on timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { + .timer_capability = OMAP_TIMER_ALWON, +}; + +/* pwm timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { + .timer_capability = OMAP_TIMER_HAS_PWM, +}; + /* timer1 */ static struct omap_hwmod omap2430_timer1_hwmod; @@ -383,6 +393,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -419,6 +430,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -455,6 +467,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -491,6 +504,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -527,6 +541,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -563,6 +578,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -599,6 +615,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -635,6 +652,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -671,6 +689,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2430_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -707,6 +726,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2430_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -743,6 +763,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2430_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -779,6 +800,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2430_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), .class = &omap2xxx_timer_hwmod_class, diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index e787731cf3dc..3008e1672c7a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -564,6 +564,21 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { .rev = OMAP_TIMER_IP_VERSION_1, }; +/* secure timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_secure_dev_attr = { + .timer_capability = OMAP_TIMER_SECURE, +}; + +/* always-on timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { + .timer_capability = OMAP_TIMER_ALWON, +}; + +/* pwm timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { + .timer_capability = OMAP_TIMER_HAS_PWM, +}; + /* timer1 */ static struct omap_hwmod omap3xxx_timer1_hwmod; @@ -604,6 +619,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves), .class = &omap3xxx_timer_1ms_hwmod_class, @@ -649,6 +665,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves), .class = &omap3xxx_timer_1ms_hwmod_class, @@ -694,6 +711,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -739,6 +757,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -784,6 +803,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -829,6 +849,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -874,6 +895,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -919,6 +941,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT8_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap3xxx_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -964,6 +987,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT9_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap3xxx_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -1000,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT10_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap3xxx_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves), .class = &omap3xxx_timer_1ms_hwmod_class, @@ -1036,6 +1061,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT11_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap3xxx_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -1085,6 +1111,7 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT, }, }, + .dev_attr = &capability_secure_dev_attr, .slaves = omap3xxx_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves), .class = &omap3xxx_timer_hwmod_class, diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index caaf40911dd4..393afac9caf6 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -29,6 +29,7 @@ #include <plat/mcbsp.h> #include <plat/mmc.h> #include <plat/i2c.h> +#include <plat/dmtimer.h> #include "omap_hwmod_common_data.h" @@ -4201,6 +4202,16 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = { .sysc = &omap44xx_timer_sysc, }; +/* always-on timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { + .timer_capability = OMAP_TIMER_ALWON, +}; + +/* pwm timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { + .timer_capability = OMAP_TIMER_HAS_PWM, +}; + /* timer1 */ static struct omap_hwmod omap44xx_timer1_hwmod; static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { @@ -4244,6 +4255,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves), }; @@ -4291,6 +4303,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer2_slaves), }; @@ -4338,6 +4351,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer3_slaves), }; @@ -4385,6 +4399,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer4_slaves), }; @@ -4451,6 +4466,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer5_slaves), }; @@ -4518,6 +4534,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer6_slaves), }; @@ -4584,6 +4601,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer7_slaves), }; @@ -4650,6 +4668,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap44xx_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer8_slaves), }; @@ -4697,6 +4716,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap44xx_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer9_slaves), }; @@ -4744,6 +4764,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap44xx_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer10_slaves), }; @@ -4791,6 +4812,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap44xx_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer11_slaves), }; diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index 7b9f1909ddb2..07a3d3ede768 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -1,25 +1,25 @@ /* - * OMAP4XXX L3 Interconnect error handling driver - * - * Copyright (C) 2011 Texas Corporation - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * Sricharan <r.sricharan@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ + * OMAP4XXX L3 Interconnect error handling driver + * + * Copyright (C) 2011 Texas Corporation + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * Sricharan <r.sricharan@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #include <linux/init.h> #include <linux/io.h> #include <linux/platform_device.h> @@ -55,12 +55,12 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) { - struct omap4_l3 *l3 = _l3; - int inttype, i, j; + struct omap4_l3 *l3 = _l3; + int inttype, i, k; int err_src = 0; - u32 std_err_main_addr, std_err_main, err_reg; - u32 base, slave_addr, clear; - char *source_name; + u32 std_err_main, err_reg, clear, masterid; + void __iomem *base, *l3_targ_base; + char *target_name, *master_name = "UN IDENTIFIED"; /* Get the Type of interrupt */ inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; @@ -70,43 +70,50 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) * Read the regerr register of the clock domain * to determine the source */ - base = (u32)l3->l3_base[i]; - err_reg = readl(base + l3_flagmux[i] + (inttype << 3)); + base = l3->l3_base[i]; + err_reg = __raw_readl(base + l3_flagmux[i] + + + L3_FLAGMUX_REGERR0 + (inttype << 3)); /* Get the corresponding error and analyse */ if (err_reg) { /* Identify the source from control status register */ - for (j = 0; !(err_reg & (1 << j)); j++) - ; + err_src = __ffs(err_reg); - err_src = j; /* Read the stderrlog_main_source from clk domain */ - std_err_main_addr = base + *(l3_targ[i] + err_src); - std_err_main = readl(std_err_main_addr); + l3_targ_base = base + *(l3_targ[i] + err_src); + std_err_main = __raw_readl(l3_targ_base + + L3_TARG_STDERRLOG_MAIN); + masterid = __raw_readl(l3_targ_base + + L3_TARG_STDERRLOG_MSTADDR); switch (std_err_main & CUSTOM_ERROR) { case STANDARD_ERROR: - source_name = - l3_targ_stderrlog_main_name[i][err_src]; - - slave_addr = std_err_main_addr + - L3_SLAVE_ADDRESS_OFFSET; - WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n", - source_name, readl(slave_addr)); + target_name = + l3_targ_inst_name[i][err_src]; + WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n", + target_name, + __raw_readl(l3_targ_base + + L3_TARG_STDERRLOG_SLVOFSLSB)); /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; - writel(clear, std_err_main_addr); + writel(clear, l3_targ_base + + L3_TARG_STDERRLOG_MAIN); break; case CUSTOM_ERROR: - source_name = - l3_targ_stderrlog_main_name[i][err_src]; - - WARN(true, "CUSTOM SRESP error with SOURCE:%s\n", - source_name); + target_name = + l3_targ_inst_name[i][err_src]; + for (k = 0; k < NUM_OF_L3_MASTERS; k++) { + if (masterid == l3_masters[k].id) + master_name = + l3_masters[k].name; + } + WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n", + master_name, target_name); /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; - writel(clear, std_err_main_addr); + writel(clear, l3_targ_base + + L3_TARG_STDERRLOG_MAIN); break; default: @@ -122,10 +129,9 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) static int __init omap4_l3_probe(struct platform_device *pdev) { - static struct omap4_l3 *l3; - struct resource *res; - int ret; - int irq; + static struct omap4_l3 *l3; + struct resource *res; + int ret; l3 = kzalloc(sizeof(*l3), GFP_KERNEL); if (!l3) @@ -177,27 +183,25 @@ static int __init omap4_l3_probe(struct platform_device *pdev) /* * Setup interrupt Handlers */ - irq = platform_get_irq(pdev, 0); - ret = request_irq(irq, + l3->debug_irq = platform_get_irq(pdev, 0); + ret = request_irq(l3->debug_irq, l3_interrupt_handler, IRQF_DISABLED, "l3-dbg-irq", l3); if (ret) { pr_crit("L3: request_irq failed to register for 0x%x\n", - OMAP44XX_IRQ_L3_DBG); + OMAP44XX_IRQ_L3_DBG); goto err3; } - l3->debug_irq = irq; - irq = platform_get_irq(pdev, 1); - ret = request_irq(irq, + l3->app_irq = platform_get_irq(pdev, 1); + ret = request_irq(l3->app_irq, l3_interrupt_handler, IRQF_DISABLED, "l3-app-irq", l3); if (ret) { pr_crit("L3: request_irq failed to register for 0x%x\n", - OMAP44XX_IRQ_L3_APP); + OMAP44XX_IRQ_L3_APP); goto err4; } - l3->app_irq = irq; return 0; @@ -216,7 +220,7 @@ err0: static int __exit omap4_l3_remove(struct platform_device *pdev) { - struct omap4_l3 *l3 = platform_get_drvdata(pdev); + struct omap4_l3 *l3 = platform_get_drvdata(pdev); free_irq(l3->app_irq, l3); free_irq(l3->debug_irq, l3); @@ -229,9 +233,9 @@ static int __exit omap4_l3_remove(struct platform_device *pdev) } static struct platform_driver omap4_l3_driver = { - .remove = __exit_p(omap4_l3_remove), - .driver = { - .name = "omap_l3_noc", + .remove = __exit_p(omap4_l3_remove), + .driver = { + .name = "omap_l3_noc", }, }; diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h index 359b83348aed..90b50984cd2e 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.h +++ b/arch/arm/mach-omap2/omap_l3_noc.h @@ -1,132 +1,162 @@ - /* - * OMAP4XXX L3 Interconnect error handling driver header - * - * Copyright (C) 2011 Texas Corporation - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * sricharan <r.sricharan@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ +/* + * OMAP4XXX L3 Interconnect error handling driver header + * + * Copyright (C) 2011 Texas Corporation + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * sricharan <r.sricharan@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H #define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H -/* - * L3 register offsets - */ #define L3_MODULES 3 #define CLEAR_STDERR_LOG (1 << 31) #define CUSTOM_ERROR 0x2 #define STANDARD_ERROR 0x0 #define INBAND_ERROR 0x0 -#define EMIF_KERRLOG_OFFSET 0x10 -#define L3_SLAVE_ADDRESS_OFFSET 0x14 -#define LOGICAL_ADDR_ERRORLOG 0x4 #define L3_APPLICATION_ERROR 0x0 #define L3_DEBUG_ERROR 0x1 -u32 l3_flagmux[L3_MODULES] = { - 0x50C, - 0x100C, - 0X020C +/* L3 TARG register offsets */ +#define L3_TARG_STDERRLOG_MAIN 0x48 +#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c +#define L3_TARG_STDERRLOG_MSTADDR 0x68 +#define L3_FLAGMUX_REGERR0 0xc + +#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0])) + +static u32 l3_flagmux[L3_MODULES] = { + 0x500, + 0x1000, + 0X0200 }; -/* - * L3 Target standard Error register offsets - */ -u32 l3_targ_stderrlog_main_clk1[] = { - 0x148, /* DMM1 */ - 0x248, /* DMM2 */ - 0x348, /* ABE */ - 0x448, /* L4CFG */ - 0x648 /* CLK2 PWR DISC */ +/* L3 Target standard Error register offsets */ +static u32 l3_targ_inst_clk1[] = { + 0x100, /* DMM1 */ + 0x200, /* DMM2 */ + 0x300, /* ABE */ + 0x400, /* L4CFG */ + 0x600 /* CLK2 PWR DISC */ }; -u32 l3_targ_stderrlog_main_clk2[] = { - 0x548, /* CORTEX M3 */ - 0x348, /* DSS */ - 0x148, /* GPMC */ - 0x448, /* ISS */ - 0x748, /* IVAHD */ - 0xD48, /* missing in TRM corresponds to AES1*/ - 0x948, /* L4 PER0*/ - 0x248, /* OCMRAM */ - 0x148, /* missing in TRM corresponds to GPMC sERROR*/ - 0x648, /* SGX */ - 0x848, /* SL2 */ - 0x1648, /* C2C */ - 0x1148, /* missing in TRM corresponds PWR DISC CLK1*/ - 0xF48, /* missing in TRM corrsponds to SHA1*/ - 0xE48, /* missing in TRM corresponds to AES2*/ - 0xC48, /* L4 PER3 */ - 0xA48, /* L4 PER1*/ - 0xB48 /* L4 PER2*/ +static u32 l3_targ_inst_clk2[] = { + 0x500, /* CORTEX M3 */ + 0x300, /* DSS */ + 0x100, /* GPMC */ + 0x400, /* ISS */ + 0x700, /* IVAHD */ + 0xD00, /* missing in TRM corresponds to AES1*/ + 0x900, /* L4 PER0*/ + 0x200, /* OCMRAM */ + 0x100, /* missing in TRM corresponds to GPMC sERROR*/ + 0x600, /* SGX */ + 0x800, /* SL2 */ + 0x1600, /* C2C */ + 0x1100, /* missing in TRM corresponds PWR DISC CLK1*/ + 0xF00, /* missing in TRM corrsponds to SHA1*/ + 0xE00, /* missing in TRM corresponds to AES2*/ + 0xC00, /* L4 PER3 */ + 0xA00, /* L4 PER1*/ + 0xB00 /* L4 PER2*/ }; -u32 l3_targ_stderrlog_main_clk3[] = { - 0x0148 /* EMUSS */ +static u32 l3_targ_inst_clk3[] = { + 0x0100 /* EMUSS */ }; -char *l3_targ_stderrlog_main_name[L3_MODULES][18] = { +static struct l3_masters_data { + u32 id; + char name[10]; +} l3_masters[] = { + { 0x0 , "MPU"}, + { 0x10, "CS_ADP"}, + { 0x14, "xxx"}, + { 0x20, "DSP"}, + { 0x30, "IVAHD"}, + { 0x40, "ISS"}, + { 0x44, "DucatiM3"}, + { 0x48, "FaceDetect"}, + { 0x50, "SDMA_Rd"}, + { 0x54, "SDMA_Wr"}, + { 0x58, "xxx"}, + { 0x5C, "xxx"}, + { 0x60, "SGX"}, + { 0x70, "DSS"}, + { 0x80, "C2C"}, + { 0x88, "xxx"}, + { 0x8C, "xxx"}, + { 0x90, "HSI"}, + { 0xA0, "MMC1"}, + { 0xA4, "MMC2"}, + { 0xA8, "MMC6"}, + { 0xB0, "UNIPRO1"}, + { 0xC0, "USBHOSTHS"}, + { 0xC4, "USBOTGHS"}, + { 0xC8, "USBHOSTFS"} +}; + +static char *l3_targ_inst_name[L3_MODULES][18] = { { - "DMM1", - "DMM2", - "ABE", - "L4CFG", - "CLK2 PWR DISC", + "DMM1", + "DMM2", + "ABE", + "L4CFG", + "CLK2 PWR DISC", }, { - "CORTEX M3" , - "DSS ", - "GPMC ", - "ISS ", - "IVAHD ", - "AES1", - "L4 PER0", - "OCMRAM ", - "GPMC sERROR", - "SGX ", - "SL2 ", - "C2C ", - "PWR DISC CLK1", - "SHA1", - "AES2", - "L4 PER3", - "L4 PER1", - "L4 PER2", + "CORTEX M3" , + "DSS ", + "GPMC ", + "ISS ", + "IVAHD ", + "AES1", + "L4 PER0", + "OCMRAM ", + "GPMC sERROR", + "SGX ", + "SL2 ", + "C2C ", + "PWR DISC CLK1", + "SHA1", + "AES2", + "L4 PER3", + "L4 PER1", + "L4 PER2", }, { - "EMUSS", + "EMUSS", }, }; -u32 *l3_targ[L3_MODULES] = { - l3_targ_stderrlog_main_clk1, - l3_targ_stderrlog_main_clk2, - l3_targ_stderrlog_main_clk3, +static u32 *l3_targ[L3_MODULES] = { + l3_targ_inst_clk1, + l3_targ_inst_clk2, + l3_targ_inst_clk3, }; struct omap4_l3 { - struct device *dev; - struct clk *ick; + struct device *dev; + struct clk *ick; /* memory base */ - void __iomem *l3_base[4]; + void __iomem *l3_base[L3_MODULES]; - int debug_irq; - int app_irq; + int debug_irq; + int app_irq; }; - #endif diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c index 873c0e33b512..a05a62f9ee5b 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.c +++ b/arch/arm/mach-omap2/omap_l3_smx.c @@ -1,26 +1,26 @@ - /* - * OMAP3XXX L3 Interconnect Driver - * - * Copyright (C) 2011 Texas Corporation - * Felipe Balbi <balbi@ti.com> - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * Sricharan <r.sricharan@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ +/* + * OMAP3XXX L3 Interconnect Driver + * + * Copyright (C) 2011 Texas Corporation + * Felipe Balbi <balbi@ti.com> + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * Sricharan <r.sricharan@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #include <linux/kernel.h> #include <linux/slab.h> @@ -135,7 +135,7 @@ static char *omap3_l3_initiator_string(u8 initid) } } -/** +/* * omap3_l3_block_irq - handles a register block's irq * @l3: struct omap3_l3 * * @base: register block base address @@ -150,30 +150,29 @@ static char *omap3_l3_initiator_string(u8 initid) static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3, u64 error, int error_addr) { - u8 code = omap3_l3_decode_error_code(error); - u8 initid = omap3_l3_decode_initid(error); - u8 multi = error & L3_ERROR_LOG_MULTI; - u32 address = omap3_l3_decode_addr(error_addr); + u8 code = omap3_l3_decode_error_code(error); + u8 initid = omap3_l3_decode_initid(error); + u8 multi = error & L3_ERROR_LOG_MULTI; + u32 address = omap3_l3_decode_addr(error_addr); WARN(true, "%s seen by %s %s at address %x\n", - omap3_l3_code_string(code), - omap3_l3_initiator_string(initid), - multi ? "Multiple Errors" : "", - address); + omap3_l3_code_string(code), + omap3_l3_initiator_string(initid), + multi ? "Multiple Errors" : "", address); return IRQ_HANDLED; } static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) { - struct omap3_l3 *l3 = _l3; - u64 status, clear; - u64 error; - u64 error_addr; - u64 err_source = 0; - void __iomem *base; - int int_type; - irqreturn_t ret = IRQ_NONE; + struct omap3_l3 *l3 = _l3; + u64 status, clear; + u64 error; + u64 error_addr; + u64 err_source = 0; + void __iomem *base; + int int_type; + irqreturn_t ret = IRQ_NONE; int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; if (!int_type) { @@ -191,14 +190,12 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) } /* identify the error source */ - for (err_source = 0; !(status & (1 << err_source)); err_source++) - ; + err_source = __ffs(status); - base = l3->rt + *(omap3_l3_bases[int_type] + err_source); + base = l3->rt + omap3_l3_bases[int_type][err_source]; error = omap3_l3_readll(base, L3_ERROR_LOG); if (error) { error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR); - ret |= omap3_l3_block_irq(l3, error, error_addr); } @@ -215,9 +212,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) static int __init omap3_l3_probe(struct platform_device *pdev) { - struct omap3_l3 *l3; - struct resource *res; - int ret; + struct omap3_l3 *l3; + struct resource *res; + int ret; l3 = kzalloc(sizeof(*l3), GFP_KERNEL); if (!l3) diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h index ba2ed9a850cc..4f3cebca4179 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.h +++ b/arch/arm/mach-omap2/omap_l3_smx.h @@ -1,26 +1,26 @@ - /* - * OMAP3XXX L3 Interconnect Driver header - * - * Copyright (C) 2011 Texas Corporation - * Felipe Balbi <balbi@ti.com> - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * sricharan <r.sricharan@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ +/* + * OMAP3XXX L3 Interconnect Driver header + * + * Copyright (C) 2011 Texas Corporation + * Felipe Balbi <balbi@ti.com> + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * sricharan <r.sricharan@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H #define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H @@ -40,7 +40,7 @@ #define L3_SI_CONTROL 0x020 #define L3_SI_FLAG_STATUS_0 0x510 -const u64 shift = 1; +static const u64 shift = 1; #define L3_STATUS_0_MPUIA_BRST (shift << 0) #define L3_STATUS_0_MPUIA_RSP (shift << 1) @@ -78,32 +78,32 @@ const u64 shift = 1; #define L3_STATUS_0_L4EMUTA_REQ (shift << 60) #define L3_STATUS_0_MAD2DTA_REQ (shift << 61) -#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \ - | L3_STATUS_0_MPUIA_RSP \ - | L3_STATUS_0_IVAIA_BRST \ - | L3_STATUS_0_IVAIA_RSP \ - | L3_STATUS_0_SGXIA_BRST \ - | L3_STATUS_0_SGXIA_RSP \ - | L3_STATUS_0_CAMIA_BRST \ - | L3_STATUS_0_CAMIA_RSP \ - | L3_STATUS_0_DISPIA_BRST \ - | L3_STATUS_0_DISPIA_RSP \ - | L3_STATUS_0_DMARDIA_BRST \ - | L3_STATUS_0_DMARDIA_RSP \ - | L3_STATUS_0_DMAWRIA_BRST \ - | L3_STATUS_0_DMAWRIA_RSP \ - | L3_STATUS_0_USBOTGIA_BRST \ - | L3_STATUS_0_USBOTGIA_RSP \ - | L3_STATUS_0_USBHOSTIA_BRST \ - | L3_STATUS_0_SMSTA_REQ \ - | L3_STATUS_0_GPMCTA_REQ \ - | L3_STATUS_0_OCMRAMTA_REQ \ - | L3_STATUS_0_OCMROMTA_REQ \ - | L3_STATUS_0_IVATA_REQ \ - | L3_STATUS_0_SGXTA_REQ \ - | L3_STATUS_0_L4CORETA_REQ \ - | L3_STATUS_0_L4PERTA_REQ \ - | L3_STATUS_0_L4EMUTA_REQ \ +#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \ + | L3_STATUS_0_MPUIA_RSP \ + | L3_STATUS_0_IVAIA_BRST \ + | L3_STATUS_0_IVAIA_RSP \ + | L3_STATUS_0_SGXIA_BRST \ + | L3_STATUS_0_SGXIA_RSP \ + | L3_STATUS_0_CAMIA_BRST \ + | L3_STATUS_0_CAMIA_RSP \ + | L3_STATUS_0_DISPIA_BRST \ + | L3_STATUS_0_DISPIA_RSP \ + | L3_STATUS_0_DMARDIA_BRST \ + | L3_STATUS_0_DMARDIA_RSP \ + | L3_STATUS_0_DMAWRIA_BRST \ + | L3_STATUS_0_DMAWRIA_RSP \ + | L3_STATUS_0_USBOTGIA_BRST \ + | L3_STATUS_0_USBOTGIA_RSP \ + | L3_STATUS_0_USBHOSTIA_BRST \ + | L3_STATUS_0_SMSTA_REQ \ + | L3_STATUS_0_GPMCTA_REQ \ + | L3_STATUS_0_OCMRAMTA_REQ \ + | L3_STATUS_0_OCMROMTA_REQ \ + | L3_STATUS_0_IVATA_REQ \ + | L3_STATUS_0_SGXTA_REQ \ + | L3_STATUS_0_L4CORETA_REQ \ + | L3_STATUS_0_L4PERTA_REQ \ + | L3_STATUS_0_L4EMUTA_REQ \ | L3_STATUS_0_MAD2DTA_REQ) #define L3_SI_FLAG_STATUS_1 0x530 @@ -137,19 +137,19 @@ const u64 shift = 1; enum omap3_l3_initiator_id { /* LCD has 1 ID */ - OMAP_L3_LCD = 29, + OMAP_L3_LCD = 29, /* SAD2D has 1 ID */ - OMAP_L3_SAD2D = 28, + OMAP_L3_SAD2D = 28, /* MPU has 5 IDs */ - OMAP_L3_IA_MPU_SS_1 = 27, - OMAP_L3_IA_MPU_SS_2 = 26, - OMAP_L3_IA_MPU_SS_3 = 25, - OMAP_L3_IA_MPU_SS_4 = 24, - OMAP_L3_IA_MPU_SS_5 = 23, + OMAP_L3_IA_MPU_SS_1 = 27, + OMAP_L3_IA_MPU_SS_2 = 26, + OMAP_L3_IA_MPU_SS_3 = 25, + OMAP_L3_IA_MPU_SS_4 = 24, + OMAP_L3_IA_MPU_SS_5 = 23, /* IVA2.2 SS has 3 IDs*/ - OMAP_L3_IA_IVA_SS_1 = 22, - OMAP_L3_IA_IVA_SS_2 = 21, - OMAP_L3_IA_IVA_SS_3 = 20, + OMAP_L3_IA_IVA_SS_1 = 22, + OMAP_L3_IA_IVA_SS_2 = 21, + OMAP_L3_IA_IVA_SS_3 = 20, /* IVA 2.2 SS DMA has 6 IDS */ OMAP_L3_IA_IVA_SS_DMA_1 = 19, OMAP_L3_IA_IVA_SS_DMA_2 = 18, @@ -158,25 +158,25 @@ enum omap3_l3_initiator_id { OMAP_L3_IA_IVA_SS_DMA_5 = 15, OMAP_L3_IA_IVA_SS_DMA_6 = 14, /* SGX has 1 ID */ - OMAP_L3_IA_SGX = 13, + OMAP_L3_IA_SGX = 13, /* CAM has 3 ID */ - OMAP_L3_IA_CAM_1 = 12, - OMAP_L3_IA_CAM_2 = 11, - OMAP_L3_IA_CAM_3 = 10, + OMAP_L3_IA_CAM_1 = 12, + OMAP_L3_IA_CAM_2 = 11, + OMAP_L3_IA_CAM_3 = 10, /* DAP has 1 ID */ - OMAP_L3_IA_DAP = 9, + OMAP_L3_IA_DAP = 9, /* SDMA WR has 2 IDs */ - OMAP_L3_SDMA_WR_1 = 8, - OMAP_L3_SDMA_WR_2 = 7, + OMAP_L3_SDMA_WR_1 = 8, + OMAP_L3_SDMA_WR_2 = 7, /* SDMA RD has 4 IDs */ - OMAP_L3_SDMA_RD_1 = 6, - OMAP_L3_SDMA_RD_2 = 5, - OMAP_L3_SDMA_RD_3 = 4, - OMAP_L3_SDMA_RD_4 = 3, + OMAP_L3_SDMA_RD_1 = 6, + OMAP_L3_SDMA_RD_2 = 5, + OMAP_L3_SDMA_RD_3 = 4, + OMAP_L3_SDMA_RD_4 = 3, /* HSUSB OTG has 1 ID */ - OMAP_L3_USBOTG = 2, + OMAP_L3_USBOTG = 2, /* HSUSB HOST has 1 ID */ - OMAP_L3_USBHOST = 1, + OMAP_L3_USBHOST = 1, }; enum omap3_l3_code { @@ -192,21 +192,21 @@ enum omap3_l3_code { }; struct omap3_l3 { - struct device *dev; - struct clk *ick; + struct device *dev; + struct clk *ick; /* memory base*/ - void __iomem *rt; + void __iomem *rt; - int debug_irq; - int app_irq; + int debug_irq; + int app_irq; /* true when and inband functional error occurs */ - unsigned inband:1; + unsigned inband:1; }; /* offsets for l3 agents in order with the Flag status register */ -unsigned int __iomem omap3_l3_app_bases[] = { +static unsigned int omap3_l3_app_bases[] = { /* MPU IA */ 0x1400, 0x1400, @@ -305,7 +305,7 @@ unsigned int __iomem omap3_l3_app_bases[] = { 0, }; -unsigned int __iomem omap3_l3_debug_bases[] = { +static unsigned int omap3_l3_debug_bases[] = { /* MPU DATA IA */ 0x1400, /* RESERVED */ @@ -321,7 +321,7 @@ unsigned int __iomem omap3_l3_debug_bases[] = { /* REST RESERVED */ }; -u32 *omap3_l3_bases[] = { +static u32 *omap3_l3_bases[] = { omap3_l3_app_bases, omap3_l3_debug_bases, }; diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c index ab8b35b780b5..9262a6b47702 100644 --- a/arch/arm/mach-omap2/opp.c +++ b/arch/arm/mach-omap2/opp.c @@ -69,7 +69,7 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def, opp_def->hwmod_name, i); return -EINVAL; } - dev = &oh->od->pdev.dev; + dev = &oh->od->pdev->dev; r = opp_add(dev, opp_def->freq, opp_def->u_volt); if (r) { diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index d34fc5206b4a..0844e2ecfb4a 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -60,19 +60,19 @@ EXPORT_SYMBOL(omap4_get_dsp_device); static int _init_omap_device(char *name, struct device **new_dev) { struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; oh = omap_hwmod_lookup(name); if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", __func__, name)) return -ENODEV; - od = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false); - if (WARN(IS_ERR(od), "%s: could not build omap_device for %s\n", + pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false); + if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n", __func__, name)) return -ENODEV; - *new_dev = &od->pdev.dev; + *new_dev = &pdev->dev; return 0; } @@ -136,8 +136,8 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) ret = pwrdm_set_next_pwrst(pwrdm, state); if (ret) { - printk(KERN_ERR "Unable to set state of powerdomain: %s\n", - pwrdm->name); + pr_err("%s: unable to set state of powerdomain: %s\n", + __func__, pwrdm->name); goto err; } @@ -161,11 +161,11 @@ err: } /* - * This API is to be called during init to put the various voltage + * This API is to be called during init to set the various voltage * domains to the voltage as per the opp table. Typically we boot up * at the nominal voltage. So this function finds out the rate of * the clock associated with the voltage domain, finds out the correct - * opp entry and puts the voltage domain to the voltage specifies + * opp entry and sets the voltage domain to the voltage specified * in the opp entry */ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, @@ -177,21 +177,20 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, unsigned long freq, bootup_volt; if (!vdd_name || !clk_name || !dev) { - printk(KERN_ERR "%s: Invalid parameters!\n", __func__); + pr_err("%s: invalid parameters\n", __func__); goto exit; } voltdm = voltdm_lookup(vdd_name); if (IS_ERR(voltdm)) { - printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", + pr_err("%s: unable to get vdd pointer for vdd_%s\n", __func__, vdd_name); goto exit; } clk = clk_get(NULL, clk_name); if (IS_ERR(clk)) { - printk(KERN_ERR "%s: unable to get clk %s\n", - __func__, clk_name); + pr_err("%s: unable to get clk %s\n", __func__, clk_name); goto exit; } @@ -200,14 +199,14 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, opp = opp_find_freq_ceil(dev, &freq); if (IS_ERR(opp)) { - printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n", + pr_err("%s: unable to find boot up OPP for vdd_%s\n", __func__, vdd_name); goto exit; } bootup_volt = opp_get_voltage(opp); if (!bootup_volt) { - printk(KERN_ERR "%s: unable to find voltage corresponding" + pr_err("%s: unable to find voltage corresponding " "to the bootup OPP for vdd_%s\n", __func__, vdd_name); goto exit; } @@ -216,8 +215,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, return 0; exit: - printk(KERN_ERR "%s: Unable to put vdd_%s to its init voltage\n\n", - __func__, vdd_name); + pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name); return -EINVAL; } diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index bf089e743ed9..cf0c216132ab 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -53,8 +53,6 @@ #include "powerdomain.h" #include "clockdomain.h" -static int omap2_pm_debug; - #ifdef CONFIG_SUSPEND static suspend_state_t suspend_state = PM_SUSPEND_ON; static inline bool is_suspending(void) @@ -96,7 +94,6 @@ static int omap2_fclks_active(void) static void omap2_enter_full_retention(void) { u32 l; - struct timespec ts_preidle, ts_postidle, ts_idle; /* There is 1 reference hold for all children of the oscillator * clock, the following will remove it. If no one else uses the @@ -124,10 +121,6 @@ static void omap2_enter_full_retention(void) omap2_gpio_prepare_for_idle(0); - if (omap2_pm_debug) { - getnstimeofday(&ts_preidle); - } - /* One last check for pending IRQs to avoid extra latency due * to sleeping unnecessarily. */ if (omap_irq_pending()) @@ -155,13 +148,6 @@ static void omap2_enter_full_retention(void) console_unlock(); no_sleep: - if (omap2_pm_debug) { - unsigned long long tmp; - - getnstimeofday(&ts_postidle); - ts_idle = timespec_sub(ts_postidle, ts_preidle); - tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC; - } omap2_gpio_resume_after_idle(); clk_enable(osc_ck); @@ -219,7 +205,6 @@ static int omap2_allow_mpu_retention(void) static void omap2_enter_mpu_retention(void) { int only_idle = 0; - struct timespec ts_preidle, ts_postidle, ts_idle; /* Putting MPU into the WFI state while a transfer is active * seems to cause the I2C block to timeout. Why? Good question. */ @@ -246,19 +231,7 @@ static void omap2_enter_mpu_retention(void) only_idle = 1; } - if (omap2_pm_debug) { - getnstimeofday(&ts_preidle); - } - omap2_sram_idle(); - - if (omap2_pm_debug) { - unsigned long long tmp; - - getnstimeofday(&ts_postidle); - ts_idle = timespec_sub(ts_postidle, ts_preidle); - tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC; - } } static int omap2_can_sleep(void) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 7255d9bce868..c8cbd00a41af 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -55,7 +55,7 @@ static suspend_state_t suspend_state = PM_SUSPEND_ON; static inline bool is_suspending(void) { - return (suspend_state != PM_SUSPEND_ON); + return (suspend_state != PM_SUSPEND_ON) && console_suspend_enabled; } #else static inline bool is_suspending(void) diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 466fc722fa0f..3d1c1d393f8f 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -711,7 +711,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) { struct omap_uart_state *uart; struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; void *pdata = NULL; u32 pdata_size = 0; char *name; @@ -799,20 +799,20 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) if (WARN_ON(!oh)) return; - od = omap_device_build(name, uart->num, oh, pdata, pdata_size, + pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size, omap_uart_latency, ARRAY_SIZE(omap_uart_latency), false); - WARN(IS_ERR(od), "Could not build omap_device for %s: %s.\n", + WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n", name, oh->name); - omap_device_disable_idle_on_suspend(od); + omap_device_disable_idle_on_suspend(pdev); oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); uart->irq = oh->mpu_irqs[0].irq; uart->regshift = 2; uart->mapbase = oh->slaves[0]->addr->pa_start; uart->membase = omap_hwmod_get_mpu_rt_va(oh); - uart->pdev = &od->pdev; + uart->pdev = pdev; oh->dev_attr = uart; @@ -846,8 +846,8 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) if ((cpu_is_omap34xx() && uart->padconf) || (uart->wk_en && uart->wk_mask)) { - device_init_wakeup(&od->pdev.dev, true); - DEV_CREATE_FILE(&od->pdev.dev, &dev_attr_sleep_timeout); + device_init_wakeup(&pdev->dev, true); + DEV_CREATE_FILE(&pdev->dev, &dev_attr_sleep_timeout); } /* Enable the MDR1 errata for OMAP3 */ diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index 2782d3f604ca..eba9f9a8ab65 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -80,7 +80,7 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data, static int sr_dev_init(struct omap_hwmod *oh, void *user) { struct omap_sr_data *sr_data; - struct omap_device *od; + struct platform_device *pdev; struct omap_volt_data *volt_data; char *name = "smartreflex"; static int i; @@ -120,10 +120,10 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user) sr_data->enable_on_init = sr_enable_on_init; - od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data), + pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data), omap_sr_latency, ARRAY_SIZE(omap_sr_latency), 0); - if (IS_ERR(od)) + if (IS_ERR(pdev)) pr_warning("%s: Could not build omap_device for %s: %s.\n\n", __func__, name, oh->name); exit: diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index cf1de7d2630d..e49fc7be2229 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -35,6 +35,7 @@ #include <linux/irq.h> #include <linux/clocksource.h> #include <linux/clockchips.h> +#include <linux/slab.h> #include <asm/mach/time.h> #include <plat/dmtimer.h> @@ -42,6 +43,10 @@ #include <asm/sched_clock.h> #include <plat/common.h> #include <plat/omap_hwmod.h> +#include <plat/omap_device.h> +#include <plat/omap-pm.h> + +#include "powerdomain.h" /* Parent clocks, eventually these will come from the clock framework */ @@ -67,7 +72,7 @@ /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ #define MAX_GPTIMER_ID 12 -u32 sys_timer_reserved; +static u32 sys_timer_reserved; /* Clockevent code */ @@ -78,7 +83,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *evt = &clockevent_gpt; - __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); + __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW); evt->event_handler(evt); return IRQ_HANDLED; @@ -93,7 +98,7 @@ static struct irqaction omap2_gp_timer_irq = { static int omap2_gp_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) { - __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, + __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST, 0xffffffff - cycles, 1); return 0; @@ -104,16 +109,16 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, { u32 period; - __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); + __omap_dm_timer_stop(&clkev, 1, clkev.rate); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: period = clkev.rate / HZ; period -= 1; /* Looks like we need to first set the load value separately */ - __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, + __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG, 0xffffffff - period, 1); - __omap_dm_timer_load_start(clkev.io_base, + __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, 0xffffffff - period, 1); break; @@ -189,7 +194,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, clk_put(src); } } - __omap_dm_timer_reset(timer->io_base, 1, 1); + __omap_dm_timer_init_regs(timer); + __omap_dm_timer_reset(timer, 1, 1); timer->posted = 1; timer->rate = clk_get_rate(timer->fclk); @@ -210,7 +216,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, omap2_gp_timer_irq.dev_id = (void *)&clkev; setup_irq(clkev.irq, &omap2_gp_timer_irq); - __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); + __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, clockevent_gpt.shift); @@ -251,7 +257,7 @@ static struct omap_dm_timer clksrc; static DEFINE_CLOCK_DATA(cd); static cycle_t clocksource_read_cycles(struct clocksource *cs) { - return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); + return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1); } static struct clocksource clocksource_gpt = { @@ -266,7 +272,7 @@ static void notrace dmtimer_update_sched_clock(void) { u32 cyc; - cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); + cyc = __omap_dm_timer_read_counter(&clksrc, 1); update_sched_clock(&cd, cyc, (u32)~0); } @@ -276,7 +282,7 @@ unsigned long long notrace sched_clock(void) u32 cyc = 0; if (clksrc.reserved) - cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); + cyc = __omap_dm_timer_read_counter(&clksrc, 1); return cyc_to_sched_clock(&cd, cyc, (u32)~0); } @@ -293,7 +299,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id, pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", gptimer_id, clksrc.rate); - __omap_dm_timer_load_start(clksrc.io_base, + __omap_dm_timer_load_start(&clksrc, OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); @@ -341,3 +347,167 @@ static void __init omap4_timer_init(void) } OMAP_SYS_TIMER(4) #endif + +/** + * omap2_dm_timer_set_src - change the timer input clock source + * @pdev: timer platform device pointer + * @source: array index of parent clock source + */ +static int omap2_dm_timer_set_src(struct platform_device *pdev, int source) +{ + int ret; + struct dmtimer_platform_data *pdata = pdev->dev.platform_data; + struct clk *fclk, *parent; + char *parent_name = NULL; + + fclk = clk_get(&pdev->dev, "fck"); + if (IS_ERR_OR_NULL(fclk)) { + dev_err(&pdev->dev, "%s: %d: clk_get() FAILED\n", + __func__, __LINE__); + return -EINVAL; + } + + switch (source) { + case OMAP_TIMER_SRC_SYS_CLK: + parent_name = "sys_ck"; + break; + + case OMAP_TIMER_SRC_32_KHZ: + parent_name = "32k_ck"; + break; + + case OMAP_TIMER_SRC_EXT_CLK: + if (pdata->timer_ip_version == OMAP_TIMER_IP_VERSION_1) { + parent_name = "alt_ck"; + break; + } + dev_err(&pdev->dev, "%s: %d: invalid clk src.\n", + __func__, __LINE__); + clk_put(fclk); + return -EINVAL; + } + + parent = clk_get(&pdev->dev, parent_name); + if (IS_ERR_OR_NULL(parent)) { + dev_err(&pdev->dev, "%s: %d: clk_get() %s FAILED\n", + __func__, __LINE__, parent_name); + clk_put(fclk); + return -EINVAL; + } + + ret = clk_set_parent(fclk, parent); + if (IS_ERR_VALUE(ret)) { + dev_err(&pdev->dev, "%s: clk_set_parent() to %s FAILED\n", + __func__, parent_name); + ret = -EINVAL; + } + + clk_put(parent); + clk_put(fclk); + + return ret; +} + +struct omap_device_pm_latency omap2_dmtimer_latency[] = { + { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +/** + * omap_timer_init - build and register timer device with an + * associated timer hwmod + * @oh: timer hwmod pointer to be used to build timer device + * @user: parameter that can be passed from calling hwmod API + * + * Called by omap_hwmod_for_each_by_class to register each of the timer + * devices present in the system. The number of timer devices is known + * by parsing through the hwmod database for a given class name. At the + * end of function call memory is allocated for timer device and it is + * registered to the framework ready to be proved by the driver. + */ +static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) +{ + int id; + int ret = 0; + char *name = "omap_timer"; + struct dmtimer_platform_data *pdata; + struct platform_device *pdev; + struct omap_timer_capability_dev_attr *timer_dev_attr; + struct powerdomain *pwrdm; + + pr_debug("%s: %s\n", __func__, oh->name); + + /* on secure device, do not register secure timer */ + timer_dev_attr = oh->dev_attr; + if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr) + if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE) + return ret; + + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); + if (!pdata) { + pr_err("%s: No memory for [%s]\n", __func__, oh->name); + return -ENOMEM; + } + + /* + * Extract the IDs from name field in hwmod database + * and use the same for constructing ids' for the + * timer devices. In a way, we are avoiding usage of + * static variable witin the function to do the same. + * CAUTION: We have to be careful and make sure the + * name in hwmod database does not change in which case + * we might either make corresponding change here or + * switch back static variable mechanism. + */ + sscanf(oh->name, "timer%2d", &id); + + pdata->set_timer_src = omap2_dm_timer_set_src; + pdata->timer_ip_version = oh->class->rev; + + /* Mark clocksource and clockevent timers as reserved */ + if ((sys_timer_reserved >> (id - 1)) & 0x1) + pdata->reserved = 1; + + pwrdm = omap_hwmod_get_pwrdm(oh); + pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm); +#ifdef CONFIG_PM + pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; +#endif + pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), + omap2_dmtimer_latency, + ARRAY_SIZE(omap2_dmtimer_latency), + 0); + + if (IS_ERR(pdev)) { + pr_err("%s: Can't build omap_device for %s: %s.\n", + __func__, name, oh->name); + ret = -EINVAL; + } + + kfree(pdata); + + return ret; +} + +/** + * omap2_dm_timer_init - top level regular device initialization + * + * Uses dedicated hwmod api to parse through hwmod database for + * given class name and then build and register the timer device. + */ +static int __init omap2_dm_timer_init(void) +{ + int ret; + + ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL); + if (unlikely(ret)) { + pr_err("%s: device registration failed.\n", __func__); + return -EINVAL; + } + + return 0; +} +arch_initcall(omap2_dm_timer_init); diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index a65145b02a55..d86af3cda8c7 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -115,7 +115,6 @@ static struct omap_musb_board_data musb_default_board_data = { void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) { struct omap_hwmod *oh; - struct omap_device *od; struct platform_device *pdev; struct device *dev; int bus_id = -1; @@ -137,9 +136,6 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) musb_plat.mode = board_data->mode; musb_plat.extvbus = board_data->extvbus; - if (cpu_is_omap44xx()) - omap4430_phy_init(dev); - if (cpu_is_omap3517() || cpu_is_omap3505()) { oh_name = "am35x_otg_hs"; name = "musb-am35x"; @@ -148,22 +144,20 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) name = "musb-omap2430"; } - oh = omap_hwmod_lookup(oh_name); - if (!oh) { - pr_err("Could not look up %s\n", oh_name); - return; - } + oh = omap_hwmod_lookup(oh_name); + if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", + __func__, oh_name)) + return; - od = omap_device_build(name, bus_id, oh, &musb_plat, + pdev = omap_device_build(name, bus_id, oh, &musb_plat, sizeof(musb_plat), omap_musb_latency, ARRAY_SIZE(omap_musb_latency), false); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { pr_err("Could not build omap_device for %s %s\n", name, oh_name); return; } - pdev = &od->pdev; dev = &pdev->dev; get_device(dev); dev->dma_mask = &musb_dmamask; |