diff options
Diffstat (limited to 'arch/arm/mach-orion5x')
-rw-r--r-- | arch/arm/mach-orion5x/common.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/include/mach/io.h | 22 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/include/mach/orion5x.h | 20 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/pci.c | 56 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/ts78xx-setup.c | 12 |
5 files changed, 42 insertions, 88 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 9148b229d0de..2fdd4e4f559a 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -47,16 +47,6 @@ static struct map_desc orion5x_io_desc[] __initdata = { .length = ORION5X_REGS_SIZE, .type = MT_DEVICE, }, { - .virtual = ORION5X_PCIE_IO_VIRT_BASE, - .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE), - .length = ORION5X_PCIE_IO_SIZE, - .type = MT_DEVICE, - }, { - .virtual = ORION5X_PCI_IO_VIRT_BASE, - .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE), - .length = ORION5X_PCI_IO_SIZE, - .type = MT_DEVICE, - }, { .virtual = ORION5X_PCIE_WA_VIRT_BASE, .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE), .length = ORION5X_PCIE_WA_SIZE, @@ -109,7 +99,8 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) { orion_ge00_init(eth_data, ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM, - IRQ_ORION5X_ETH_ERR); + IRQ_ORION5X_ETH_ERR, + MV643XX_TX_CSUM_DEFAULT_LIMIT); } @@ -203,6 +194,13 @@ void __init orion5x_wdt_init(void) void __init orion5x_init_early(void) { orion_time_set_base(TIMER_VIRT_BASE); + + /* + * Some Orion5x devices allocate their coherent buffers from atomic + * context. Increase size of atomic coherent pool to make sure such + * the allocations won't fail. + */ + init_dma_coherent_pool_size(SZ_1M); } int orion5x_tclk; diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h deleted file mode 100644 index 1aa5d0a50a0b..000000000000 --- a/arch/arm/mach-orion5x/include/mach/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/io.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include <mach/orion5x.h> -#include <asm/sizes.h> - -#define IO_SPACE_LIMIT SZ_2M -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)(addr + ORION5X_PCIE_IO_VIRT_BASE); -} - -#define __io(a) __io(a) -#endif diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index 683e085ce162..1b60131b7f60 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h @@ -31,31 +31,29 @@ * fc000000 device bus mappings (cs0/cs1) * * virt phys size - * fdd00000 f1000000 1M on-chip peripheral registers - * fde00000 f2000000 1M PCIe I/O space - * fdf00000 f2100000 1M PCI I/O space - * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) + * fe000000 f1000000 1M on-chip peripheral registers + * fee00000 f2000000 64K PCIe I/O space + * fee10000 f2100000 64K PCI I/O space + * fd000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) ****************************************************************************/ #define ORION5X_REGS_PHYS_BASE 0xf1000000 -#define ORION5X_REGS_VIRT_BASE 0xfdd00000 +#define ORION5X_REGS_VIRT_BASE 0xfe000000 #define ORION5X_REGS_SIZE SZ_1M #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 -#define ORION5X_PCIE_IO_VIRT_BASE 0xfde00000 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 -#define ORION5X_PCIE_IO_SIZE SZ_1M +#define ORION5X_PCIE_IO_SIZE SZ_64K #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 -#define ORION5X_PCI_IO_VIRT_BASE 0xfdf00000 -#define ORION5X_PCI_IO_BUS_BASE 0x00100000 -#define ORION5X_PCI_IO_SIZE SZ_1M +#define ORION5X_PCI_IO_BUS_BASE 0x00010000 +#define ORION5X_PCI_IO_SIZE SZ_64K #define ORION5X_SRAM_PHYS_BASE (0xf2200000) #define ORION5X_SRAM_SIZE SZ_8K /* Relevant only for Orion-1/Orion-NAS */ #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 -#define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000 +#define ORION5X_PCIE_WA_VIRT_BASE 0xfd000000 #define ORION5X_PCIE_WA_SIZE SZ_16M #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index cb19e1661bb3..6921d49b988d 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c @@ -162,35 +162,25 @@ static int __init pcie_setup(struct pci_sys_data *sys) pcie_ops.read = pcie_rd_conf_wa; } + pci_ioremap_io(sys->busnr * SZ_64K, ORION5X_PCIE_IO_PHYS_BASE); + /* * Request resources. */ - res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL); + res = kzalloc(sizeof(struct resource), GFP_KERNEL); if (!res) panic("pcie_setup unable to alloc resources"); /* - * IORESOURCE_IO - */ - sys->io_offset = 0; - res[0].name = "PCIe I/O Space"; - res[0].flags = IORESOURCE_IO; - res[0].start = ORION5X_PCIE_IO_BUS_BASE; - res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1; - if (request_resource(&ioport_resource, &res[0])) - panic("Request PCIe IO resource failed\n"); - pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); - - /* * IORESOURCE_MEM */ - res[1].name = "PCIe Memory Space"; - res[1].flags = IORESOURCE_MEM; - res[1].start = ORION5X_PCIE_MEM_PHYS_BASE; - res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1; - if (request_resource(&iomem_resource, &res[1])) + res->name = "PCIe Memory Space"; + res->flags = IORESOURCE_MEM; + res->start = ORION5X_PCIE_MEM_PHYS_BASE; + res->end = res->start + ORION5X_PCIE_MEM_SIZE - 1; + if (request_resource(&iomem_resource, res)) panic("Request PCIe Memory resource failed\n"); - pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); + pci_add_resource_offset(&sys->resources, res, sys->mem_offset); return 1; } @@ -489,35 +479,25 @@ static int __init pci_setup(struct pci_sys_data *sys) */ orion5x_setbits(PCI_CMD, PCI_CMD_HOST_REORDER); + pci_ioremap_io(sys->busnr * SZ_64K, ORION5X_PCI_IO_PHYS_BASE); + /* * Request resources */ - res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL); + res = kzalloc(sizeof(struct resource), GFP_KERNEL); if (!res) panic("pci_setup unable to alloc resources"); /* - * IORESOURCE_IO - */ - sys->io_offset = 0; - res[0].name = "PCI I/O Space"; - res[0].flags = IORESOURCE_IO; - res[0].start = ORION5X_PCI_IO_BUS_BASE; - res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1; - if (request_resource(&ioport_resource, &res[0])) - panic("Request PCI IO resource failed\n"); - pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); - - /* * IORESOURCE_MEM */ - res[1].name = "PCI Memory Space"; - res[1].flags = IORESOURCE_MEM; - res[1].start = ORION5X_PCI_MEM_PHYS_BASE; - res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1; - if (request_resource(&iomem_resource, &res[1])) + res->name = "PCI Memory Space"; + res->flags = IORESOURCE_MEM; + res->start = ORION5X_PCI_MEM_PHYS_BASE; + res->end = res->start + ORION5X_PCI_MEM_SIZE - 1; + if (request_resource(&iomem_resource, res)) panic("Request PCI Memory resource failed\n"); - pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); + pci_add_resource_offset(&sys->resources, res, sys->mem_offset); return 1; } diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index b4203277f3cd..b0727dcd1ef9 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -36,7 +36,7 @@ * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE */ #define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000 -#define TS78XX_FPGA_REGS_VIRT_BASE 0xff900000 +#define TS78XX_FPGA_REGS_VIRT_BASE IOMEM(0xff900000) #define TS78XX_FPGA_REGS_SIZE SZ_1M static struct ts78xx_fpga_data ts78xx_fpga = { @@ -50,7 +50,7 @@ static struct ts78xx_fpga_data ts78xx_fpga = { ****************************************************************************/ static struct map_desc ts78xx_io_desc[] __initdata = { { - .virtual = TS78XX_FPGA_REGS_VIRT_BASE, + .virtual = (unsigned long)TS78XX_FPGA_REGS_VIRT_BASE, .pfn = __phys_to_pfn(TS78XX_FPGA_REGS_PHYS_BASE), .length = TS78XX_FPGA_REGS_SIZE, .type = MT_DEVICE, @@ -80,8 +80,8 @@ static struct mv_sata_platform_data ts78xx_sata_data = { /***************************************************************************** * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c ****************************************************************************/ -#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x808) -#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c) +#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x808) +#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE + 0x80c) static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr) { @@ -162,8 +162,8 @@ static void ts78xx_ts_rtc_unload(void) /***************************************************************************** * NAND Flash ****************************************************************************/ -#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x800) /* VIRT */ -#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE | 0x804) /* PHYS */ +#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x800) /* VIRT */ +#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE + 0x804) /* PHYS */ /* * hardware specific access to control-lines |