diff options
Diffstat (limited to 'arch/arm/mach-pxa/lpd270.c')
| -rw-r--r-- | arch/arm/mach-pxa/lpd270.c | 99 |
1 files changed, 54 insertions, 45 deletions
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index b7038948d1d4..de3f67daaacf 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -40,7 +40,7 @@ #include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa27x.h> #include <mach/lpd270.h> #include <mach/audio.h> #include <mach/pxafb.h> @@ -51,6 +51,43 @@ #include "generic.h" #include "devices.h" +static unsigned long lpd270_pin_config[] __initdata = { + /* Chip Selects */ + GPIO15_nCS_1, /* Mainboard Flash */ + GPIO78_nCS_2, /* CPLD + Ethernet */ + + /* LCD - 16bpp Active TFT */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + GPIO77_LCD_BIAS, + GPIO16_PWM0_OUT, /* Backlight */ + + /* USB Host */ + GPIO88_USBH1_PWR, + GPIO89_USBH1_PEN, + + /* AC97 */ + GPIO45_AC97_SYSCLK, + + GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, +}; static unsigned int lpd270_irq_enabled; @@ -88,8 +125,7 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ if (likely(pending)) { irq = LPD270_IRQ(0) + __ffs(pending); - desc = irq_desc + irq; - desc_handle_irq(irq, desc); + generic_handle_irq(irq); pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; @@ -265,8 +301,8 @@ static struct pxafb_mode_info sharp_lq057q3dc02_mode = { static struct pxafb_mach_info sharp_lq057q3dc02 = { .modes = &sharp_lq057q3dc02_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 12.1" TFT SVGA (LoLo display number 2) */ @@ -287,8 +323,8 @@ static struct pxafb_mode_info sharp_lq121s1dg31_mode = { static struct pxafb_mach_info sharp_lq121s1dg31 = { .modes = &sharp_lq121s1dg31_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 3.6" TFT QVGA (LoLo display number 3) */ @@ -309,8 +345,8 @@ static struct pxafb_mode_info sharp_lq036q1da01_mode = { static struct pxafb_mach_info sharp_lq036q1da01 = { .modes = &sharp_lq036q1da01_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 6.4" TFT VGA (LoLo display number 5) */ @@ -331,8 +367,8 @@ static struct pxafb_mode_info sharp_lq64d343_mode = { static struct pxafb_mach_info sharp_lq64d343 = { .modes = &sharp_lq64d343_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 10.4" TFT VGA (LoLo display number 7) */ @@ -353,8 +389,8 @@ static struct pxafb_mode_info sharp_lq10d368_mode = { static struct pxafb_mach_info sharp_lq10d368 = { .modes = &sharp_lq10d368_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 3.5" TFT QVGA (LoLo display number 8) */ @@ -375,8 +411,8 @@ static struct pxafb_mode_info sharp_lq035q7db02_20_mode = { static struct pxafb_mach_info sharp_lq035q7db02_20 = { .modes = &sharp_lq035q7db02_20_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; static struct pxafb_mach_info *lpd270_lcd_to_use; @@ -411,27 +447,15 @@ static struct platform_device *platform_devices[] __initdata = { &lpd270_flash_device[1], }; -static int lpd270_ohci_init(struct device *dev) -{ - /* setup Port1 GPIO pin. */ - pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */ - pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */ - - /* Set the Power Control Polarity Low and Power Sense - Polarity Low to active low. */ - UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & - ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); - - return 0; -} - static struct pxaohci_platform_data lpd270_ohci_platform_data = { .port_mode = PMM_PERPORT_MODE, - .init = lpd270_ohci_init, + .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, }; static void __init lpd270_init(void) { + pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config)); + lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; lpd270_flash_data[1].width = 4; @@ -442,12 +466,6 @@ static void __init lpd270_init(void) */ ARB_CNTRL = ARB_CORE_PARK | 0x234; - /* - * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45. - */ - pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); - pxa_gpio_mode(GPIO16_PWM0_MD); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); pxa_set_ac97_info(NULL); @@ -473,15 +491,6 @@ static void __init lpd270_map_io(void) pxa_map_io(); iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); - /* initialize sleep mode regs (wake-up sources, etc) */ - PGSR0 = 0x00008800; - PGSR1 = 0x00000002; - PGSR2 = 0x0001FC00; - PGSR3 = 0x00001F81; - PWER = 0xC0000002; - PRER = 0x00000002; - PFER = 0x00000002; - /* for use I SRAM as framebuffer. */ PSLR |= 0x00000F04; PCFR = 0x00000066; |