1 files changed, 96 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_interrupt_generic.c b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_interrupt_generic.c
new file mode 100644
index 000000000000..98c96ef08390
--- /dev/null
+++ b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_interrupt_generic.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2007-2009 NVIDIA Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of the NVIDIA Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "nvos.h"
+#include "ap15rm_private.h"
+#include "nvrm_interrupt.h"
+#include "nvrm_chiplib.h"
+#include "nvintr.h"
+
+void NvRmPrivChiplibInterruptHandler( void );
+
+NvError NvRmInterruptRegister(
+    NvRmDeviceHandle hRmDevice,
+    NvU32 IrqListSize,
+    const NvU32 *pIrqList,
+    const NvOsInterruptHandler *pIrqHandlerList,
+    void *context,
+    NvOsInterruptHandle *handle,
+    NvBool InterruptEnable)
+{
+    NvError err;
+
+    err = NvOsInterruptRegister(IrqListSize,
+            pIrqList,
+            pIrqHandlerList,
+            context,
+            handle,
+            InterruptEnable);
+
+    return err;
+}
+
+void NvRmInterruptUnregister(
+    NvRmDeviceHandle hRmDevice,
+    NvOsInterruptHandle handle)
+{
+    NvOsInterruptUnregister( handle );
+}
+
+NvError NvRmInterruptEnable(
+    NvRmDeviceHandle hRmDevice,
+    NvOsInterruptHandle handle)
+{
+    return NvOsInterruptEnable(handle);
+}
+
+void NvRmInterruptDone( NvOsInterruptHandle handle )
+{
+    NvOsInterruptDone( handle );
+}
+
+/* There is no chiplib interrupt handler for wince */
+void NvRmPrivChiplibInterruptHandler( void )
+{
+    return;
+}
+
+void NvRmPrivInterruptStart(NvRmDeviceHandle hRmDevice)
+{
+    return;
+}
+
+void NvRmPrivInterruptShutdown(NvRmDeviceHandle handle)
+{
+    return;
+}
+