diff options
Diffstat (limited to 'arch/arm/mm/proc-v6.S')
| -rw-r--r-- | arch/arm/mm/proc-v6.S | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 7959567970c7..69381989644d 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -29,11 +29,15 @@ #define TTB_RGN_WT (2 << 3) #define TTB_RGN_WB (3 << 3) +#ifdef CONFIG_ARCH_TEGRA_1x_SOC +#define TTB_FLAGS TTB_RGN_NC +#else #ifndef CONFIG_SMP #define TTB_FLAGS TTB_RGN_WBWA #else #define TTB_FLAGS TTB_RGN_WBWA|TTB_S #endif +#endif ENTRY(cpu_v6_proc_init) mov pc, lr @@ -77,12 +81,16 @@ ENTRY(cpu_v6_do_idle) mov pc, lr ENTRY(cpu_v6_dcache_clean_area) +#ifdef CONFIG_ARCH_TEGRA_1x_SOC + bl cpu_ap15_dcache_clean_area +#else #ifndef TLB_CAN_READ_FROM_L1_CACHE 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry add r0, r0, #D_CACHE_LINE_SIZE subs r1, r1, #D_CACHE_LINE_SIZE bhi 1b #endif +#endif mov pc, lr /* @@ -119,12 +127,13 @@ ENTRY(cpu_v6_switch_mm) */ armv6_mt_table cpu_v6 +#if !(defined(CONFIG_ARCH_TEGRA_1x_SOC) && defined(CONFIG_CACHE_TEGRA_CMC)) ENTRY(cpu_v6_set_pte_ext) #ifdef CONFIG_MMU armv6_set_pte_ext cpu_v6 #endif mov pc, lr - +#endif @@ -201,7 +210,11 @@ __v6_setup: */ .type v6_crval, #object v6_crval: +#ifdef CONFIG_ARCH_TEGRA_1x_SOC + crval clear=0x01ffffff, mmuset=0x00c0787f, ucset=0x00c0187c +#else crval clear=0x01e0fb7f, mmuset=0x00c0387d, ucset=0x00c0187c +#endif .type v6_processor_functions, #object ENTRY(v6_processor_functions) @@ -234,6 +247,14 @@ cpu_elf_name: */ .type __v6_proc_info, #object __v6_proc_info: +#ifdef ARCH_TEGRA_1x_SOC + .long 0x410fb020 + .long 0xfffffff0 + .long PMD_TYPE_SECT | \ + PMD_SECT_WBWA | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ +#else .long 0x0007b000 .long 0x0007f000 .long PMD_TYPE_SECT | \ @@ -241,6 +262,7 @@ __v6_proc_info: PMD_SECT_CACHEABLE | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ +#endif .long PMD_TYPE_SECT | \ PMD_SECT_XN | \ PMD_SECT_AP_WRITE | \ |