diff options
Diffstat (limited to 'arch/arm/plat-mxc/include/mach')
| -rwxr-xr-x | arch/arm/plat-mxc/include/mach/devices-common.h | 12 | ||||
| -rwxr-xr-x | arch/arm/plat-mxc/include/mach/iomux-mx6sl.h | 9 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx6.h | 17 | ||||
| -rwxr-xr-x | arch/arm/plat-mxc/include/mach/mxc.h | 4 |
4 files changed, 34 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 99ef8abee1e3..1ff68bd8b6dd 100755 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -25,10 +25,10 @@ static inline struct platform_device *imx_add_platform_device( name, id, res, num_resources, data, size_data, 0); } -struct imx_dma_data { +struct imx_dma_res_data { resource_size_t iobase; }; -struct platform_device *__init imx_add_dma(const struct imx_dma_data *data); +struct platform_device *__init imx_add_dma(const struct imx_dma_res_data *data); #include <linux/fec.h> struct imx_fec_data { @@ -690,3 +690,11 @@ struct platform_device *__init imx_add_pcie( const struct imx_pcie_platform_data *pdata); void __init imx_add_imx_armpmu(void); + +struct imx_fsl_csi_data { + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq; +}; +struct platform_device *__init imx_add_fsl_csi( + const struct imx_fsl_csi_data *data); diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx6sl.h b/arch/arm/plat-mxc/include/mach/iomux-mx6sl.h index 296df42d3ef7..90de1dd8f4fb 100755 --- a/arch/arm/plat-mxc/include/mach/iomux-mx6sl.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx6sl.h @@ -77,6 +77,9 @@ #define MX6SL_ADU_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_DSE_40ohm | PAD_CTL_PUS_100K_DOWN | \ PAD_CTL_HYS | PAD_CTL_SPEED_MED) +#define MX6SL_CHG_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP) + #define MX6SL_PAD_AUD_MCLK 0x02A4 #define MX6SL_PAD_AUD_RXD 0x02AC @@ -510,7 +513,7 @@ IOMUX_PAD(0x0364, 0x0074, 7, 0x0000, 0, NO_PAD_CTRL) #define MX6SL_PAD_ECSPI2_MISO__GPIO_4_14 \ - IOMUX_PAD(0x0368, 0x0078, 5, 0x0000, 0, NO_PAD_CTRL) + IOMUX_PAD(0x0368, 0x0078, 5, 0x0000, 0, MX6SL_CHG_PAD_CTRL) #define MX6SL_PAD_ECSPI2_MISO__USB_USBOTG1_OC \ IOMUX_PAD(0x0368, 0x0078, 6, 0x0824, 0, NO_PAD_CTRL) #define MX6SL_PAD_ECSPI2_MISO__TPSMP_HDATA_23 \ @@ -541,7 +544,7 @@ #define MX6SL_PAD_ECSPI2_MOSI__USDHC1_VSELECT \ IOMUX_PAD(0x036C, 0x007C, 4, 0x0000, 0, MX6SL_USDHC_PAD_CTRL) #define MX6SL_PAD_ECSPI2_MOSI__GPIO_4_13 \ - IOMUX_PAD(0x036C, 0x007C, 5, 0x0000, 0, NO_PAD_CTRL) + IOMUX_PAD(0x036C, 0x007C, 5, 0x0000, 0, MX6SL_CHG_PAD_CTRL) #define MX6SL_PAD_ECSPI2_MOSI__ANATOP_ANATOP_TESTO_1 \ IOMUX_PAD(0x036C, 0x007C, 6, 0x0000, 0, NO_PAD_CTRL) #define MX6SL_PAD_ECSPI2_MOSI__TPSMP_HDATA_22 \ @@ -579,7 +582,7 @@ #define MX6SL_PAD_ECSPI2_SS0__USDHC1_CD \ IOMUX_PAD(0x0374, 0x0084, 4, 0x0828, 0, MX6SL_USDHC_PAD_CTRL) #define MX6SL_PAD_ECSPI2_SS0__GPIO_4_15 \ - IOMUX_PAD(0x0374, 0x0084, 5, 0x0000, 0, NO_PAD_CTRL) + IOMUX_PAD(0x0374, 0x0084, 5, 0x0000, 0, MX6SL_CHG_PAD_CTRL) #define MX6SL_PAD_ECSPI2_SS0__USB_USBOTG1_PWR \ IOMUX_PAD(0x0374, 0x0084, 6, 0x0000, 0, NO_PAD_CTRL) #define MX6SL_PAD_ECSPI2_SS0__PL301_SIM_MX6SL_PER1_HADDR_24 \ diff --git a/arch/arm/plat-mxc/include/mach/mx6.h b/arch/arm/plat-mxc/include/mach/mx6.h index aaf8b998ca63..dfb3f6489cc1 100644 --- a/arch/arm/plat-mxc/include/mach/mx6.h +++ b/arch/arm/plat-mxc/include/mach/mx6.h @@ -77,7 +77,7 @@ #define MX6Q_IRAM_BASE_ADDR IRAM_BASE_ADDR /* The last 4K is for cpu hotplug to workaround wdog issue*/ #define MX6Q_IRAM_SIZE (SZ_256K - SZ_4K) -#define MX6DL_IRAM_SIZE (SZ_128K - SZ_4K) +#define MX6DL_MX6SL_IRAM_SIZE (SZ_128K - SZ_4K) /* Blocks connected via pl301periph */ #define ROMCP_ARB_BASE_ADDR 0x00000000 @@ -145,6 +145,7 @@ #define MX6SL_UART5_BASE_ADDR (ATZ1_BASE_ADDR + 0x18000) /* MX6SL */ #define UART1_BASE_ADDR (ATZ1_BASE_ADDR + 0x20000) /* slot 8 */ #define ESAI1_BASE_ADDR (ATZ1_BASE_ADDR + 0x24000) /* slot 9 */ +#define MX6SL_UART1_BASE_ADDR (ATZ1_BASE_ADDR + 0x20000) /* MX6SL */ #define MX6SL_UART2_BASE_ADDR (ATZ1_BASE_ADDR + 0x24000) /* MX6SL */ #define MX6Q_SSI1_BASE_ADDR (ATZ1_BASE_ADDR + 0x28000) /* slot 10 */ #define MX6Q_SSI2_BASE_ADDR (ATZ1_BASE_ADDR + 0x2C000) /* slot 11 */ @@ -215,6 +216,14 @@ /* ARM Cortex A9 MPCore Platform */ #define MX6Q_A9_PLATFRM_BASE (ARM_BASE_ADDR + 0x20000) +/* ARM Cortex A9 PTM */ +#define MX6Q_PTM0_BASE_ADDR 0x0215C000 +#define MX6Q_PTM1_BASE_ADDR 0x0215D000 +#define MX6Q_PTM2_BASE_ADDR 0x0215E000 +#define MX6Q_PTM3_BASE_ADDR 0x0215F000 +#define MX6Q_FUNNEL_BASE_ADDR 0x02144000 +#define MX6Q_ETB_BASE_ADDR 0x02141000 + #define MX6Q_PL301_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x0000) #define MX6Q_USB_OTG_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4000) #define MX6Q_USB_HS1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4200) @@ -327,6 +336,7 @@ #define MX6SL_INT_SPDC 38 #define MX6Q_INT_IPU2_ERR 39 #define MX6DL_INT_CSI 39 +#define MX6SL_INT_CSI 39 #define MX6Q_INT_IPU2_SYN 40 #define MXC_INT_GPU3D_IRQ 41 #define MXC_INT_GPU2D_IRQ 42 @@ -474,6 +484,11 @@ #define MX6Q_INT_UART2 MXC_INT_UART2_ANDED #define MX6Q_INT_UART3 MXC_INT_UART3_ANDED #define MX6Q_INT_UART4 MXC_INT_UART4_ANDED +#define MX6SL_INT_UART1 MXC_INT_UART1_ANDED +#define MX6SL_INT_UART2 MXC_INT_UART2_ANDED +#define MX6SL_INT_UART3 MXC_INT_UART3_ANDED +#define MX6SL_INT_UART4 MXC_INT_UART4_ANDED +#define MX6SL_INT_UART5 MXC_INT_UART5_ANDED #define MX6Q_INT_FEC MXC_INT_ENET1 #define MX6Q_INT_DSI MXC_INT_DSI diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 23159090ace8..4260d4a25c2c 100755 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -266,8 +266,8 @@ enum mxc_cpu_pwr_mode { WAIT_CLOCKED, /* wfi only */ WAIT_UNCLOCKED, /* WAIT */ WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ - STOP_POWER_ON, /* just STOP */ - STOP_POWER_OFF, /* STOP + SRPG */ + STOP_XTAL_ON, /* STOP + SRPG + XTAL_ON*/ + STOP_POWER_OFF, /* STOP + XTAL_OFF */ ARM_POWER_OFF, /* STOP + SRPG + ARM power off */ }; |