diff options
Diffstat (limited to 'arch/arm/plat-mxc')
| -rwxr-xr-x | arch/arm/plat-mxc/devices/Kconfig | 8 | ||||
| -rwxr-xr-x | arch/arm/plat-mxc/devices/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c | 12 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/devices/platform-fsl-usb2-wakeup.c | 29 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/devices/platform-imx-asrc.c | 18 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/devices/platform-imx-pm.c | 7 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/devices/platform-mvf-adc.c | 50 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/devices/platform-mvf-caam.c | 107 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/devices/platform-mxc-ehci.c | 15 | ||||
| -rwxr-xr-x | arch/arm/plat-mxc/include/mach/arc_otg.h | 2 | ||||
| -rwxr-xr-x | arch/arm/plat-mxc/include/mach/devices-common.h | 26 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mvf.h | 18 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mvf.h | 54 | ||||
| -rwxr-xr-x | arch/arm/plat-mxc/include/mach/mxc.h | 14 | ||||
| -rwxr-xr-x | arch/arm/plat-mxc/usb_common.c | 3 | ||||
| -rwxr-xr-x | arch/arm/plat-mxc/usb_wakeup.c | 25 |
16 files changed, 349 insertions, 41 deletions
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index de80caba49c3..42a52220383e 100755 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -28,6 +28,10 @@ config IMX_HAVE_PLATFORM_IMX21_HCD config IMX_HAVE_PLATFORM_IMX2_WDT bool +config IMX_HAVE_PLATFORM_MVF_ADC + bool + default y if ARCH_MVF + config IMX_HAVE_PLATFORM_IMXDI_RTC bool @@ -37,6 +41,10 @@ config IMX_HAVE_PLATFORM_IMX_SRTC config IMX_HAVE_PLATFORM_IMX_SNVS_RTC bool +config IMX_HAVE_PLATFORM_MVF_CAAM + bool + default y if SOC_MVFA5 + config IMX_HAVE_PLATFORM_IMX_FB bool select HAVE_FB_IMX diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 63be99251f08..807de8385db0 100755 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -62,5 +62,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC) += platform-imx-asrc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_DSI) += platform-imx-mipi_dsi.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2) += platform-imx-mipi_csi2.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_SPI) += platform-mvf-spi.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_ADC) += platform-mvf-adc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_DCU) += platform-mvf-dcu.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_SAI) += platform-mvf-sai.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_CAAM) += platform-mvf-caam.o diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c index d50c5b0be550..5d7605421294 100644 --- a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c +++ b/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c @@ -18,6 +18,12 @@ .irq = soc ## _INT_USB_OTG, \ } +#define mvf_fsl_usb2_udc_data_entry_single(arch, _id) \ + { \ + .iobase = arch ## _USBC ## _id ## _BASE_ADDR, \ + .irq = arch ## _INT_USB ## _id, \ + } + #ifdef CONFIG_SOC_IMX25 const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst = imx_fsl_usb2_udc_data_entry_single(MX25); @@ -44,9 +50,15 @@ const struct imx_fsl_usb2_udc_data imx6q_fsl_usb2_udc_data __initconst = #endif /* ifdef CONFIG_SOC_IMX6Q */ #ifdef CONFIG_ARCH_MVF +#ifdef CONFIG_MACH_PCM052 +const struct imx_fsl_usb2_udc_data mvf_fsl_usb2_udc_data[] __initconst = { + mvf_fsl_usb2_udc_data_entry_single(MVF, 0), + mvf_fsl_usb2_udc_data_entry_single(MVF, 1), +#else const struct imx_fsl_usb2_udc_data mvf_fsl_usb2_udc_data __initconst = { .iobase = MVF_USBC0_BASE_ADDR, .irq = MVF_INT_USBOTG0, +#endif }; #endif diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-wakeup.c b/arch/arm/plat-mxc/devices/platform-fsl-usb2-wakeup.c index 523c5d4599e1..80c44f48393d 100644 --- a/arch/arm/plat-mxc/devices/platform-fsl-usb2-wakeup.c +++ b/arch/arm/plat-mxc/devices/platform-fsl-usb2-wakeup.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. * * Copyright (C) 2010 Pengutronix * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> @@ -17,6 +17,13 @@ .irq_core = soc ## _INT_USB_ ## hs, \ } +#define mvf_fsl_usb2_wakeup_data_entry_single(arch, _id) \ + { \ + .id = _id, \ + .irq_phy = arch ## _INT_USB ## _id, \ + .irq_core = arch ## _INT_USB ## _id, \ + } + #ifdef CONFIG_SOC_IMX6Q const struct imx_fsl_usb2_wakeup_data imx6q_fsl_otg_wakeup_data __initconst = imx_fsl_usb2_wakeup_data_entry_single(MX6Q, 0, OTG); @@ -26,6 +33,26 @@ const struct imx_fsl_usb2_wakeup_data imx6q_fsl_hs_wakeup_data[] __initconst = { imx_fsl_usb2_wakeup_data_entry_single(MX6Q, 3, HS3), }; #endif /* ifdef CONFIG_SOC_IMX6Q */ +#ifdef CONFIG_SOC_MVFA5 +const struct imx_fsl_usb2_wakeup_data mvf_fsl_otg_wakeup_data[] __initconst = { +#ifdef CONFIG_MACH_PCM052 + mvf_fsl_usb2_wakeup_data_entry_single(MVF, 0), + mvf_fsl_usb2_wakeup_data_entry_single(MVF, 1), +#else + { + .id = 0, + .irq_phy = MVF_INT_USBOTG0, + .irq_core = MVF_INT_USBOTG0, + }, + { + .id = 1, + .irq_phy = MVF_INT_USB2, + .irq_core = MVF_INT_USB2, + } +#endif +}; + +#endif struct platform_device *__init imx_add_fsl_usb2_wakeup( const struct imx_fsl_usb2_wakeup_data *data, diff --git a/arch/arm/plat-mxc/devices/platform-imx-asrc.c b/arch/arm/plat-mxc/devices/platform-imx-asrc.c index c112a9ba8671..a35617d71a0e 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-asrc.c +++ b/arch/arm/plat-mxc/devices/platform-imx-asrc.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify it under * the terms of the GNU General Public License version 2 as published by the @@ -38,6 +38,22 @@ const struct imx_imx_asrc_data imx6q_imx_asrc_data[] __initconst = { }; #endif /* ifdef CONFIG_SOC_IMX6Q */ +#ifdef CONFIG_SOC_MVFA5 +const struct imx_imx_asrc_data mvf_imx_asrc_data[] __initconst = { + [0] = { + .id = 0, + .iobase = MVF_ASRC_BASE_ADDR, + .iosize = SZ_4K, + .irq = MVF_INT_ASRC, + .dmatx1 = DMA_MUX12_ASRC0_TX + 64, + .dmarx1 = DMA_MUX12_ASRC0_RX + 64, + .dmatx2 = DMA_MUX12_ASRC1_TX + 64, + .dmarx2 = DMA_MUX12_ASRC1_RX + 64, + .dmatx3 = DMA_MUX12_ASRC2_TX + 64, + .dmarx3 = DMA_MUX12_ASRC2_RX + 64, + }, +}; +#endif struct platform_device *__init imx_add_imx_asrc( const struct imx_imx_asrc_data *data, const struct imx_asrc_platform_data *pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-pm.c b/arch/arm/plat-mxc/devices/platform-imx-pm.c index f901e18368c2..2b55d0344830 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-pm.c +++ b/arch/arm/plat-mxc/devices/platform-imx-pm.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -30,6 +30,11 @@ const struct imx_pm_imx_data imx6q_pm_imx_data[] __initconst = imx_pm_imx_data_entry_single(MX6Q); #endif +#ifdef CONFIG_SOC_MVFA5 +const struct imx_pm_imx_data mvf_pm_imx_data[] __initconst = + imx_pm_imx_data_entry_single(MVF); +#endif + struct platform_device *__init imx_add_pm_imx( const struct imx_pm_imx_data *data, const struct pm_platform_data *pdata) diff --git a/arch/arm/plat-mxc/devices/platform-mvf-adc.c b/arch/arm/plat-mxc/devices/platform-mvf-adc.c new file mode 100644 index 000000000000..38add8b5fd4f --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mvf-adc.c @@ -0,0 +1,50 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> +#include <linux/clk.h> +#include <linux/gpio.h> + +#define mvf_adc_data_entry_single(soc, _id, _size) \ + { \ + .id = _id, \ + .iobase = soc ## _ADC ## _id ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_ADC ## _id, \ + } +#define mvf_adc_data_entry(soc, _id, _size) \ + [_id] = mvf_adc_data_entry_single(soc, _id, _size) + +#ifdef CONFIG_SOC_MVFA5 +const struct mvf_adc_data mvfa5_adc_data[] __initconst = { + mvf_adc_data_entry(MVF, 0, SZ_4K), +}; +#endif + +struct platform_device *__init mvf_add_adcdev( + const struct mvf_adc_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mvf-adc", data->id, res, + ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-mvf-caam.c b/arch/arm/plat-mxc/devices/platform-mvf-caam.c new file mode 100644 index 000000000000..0f716911698f --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mvf-caam.c @@ -0,0 +1,107 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <mach/devices-common.h> + +/* + * security violation interrupt is used as CAAM base _INT_SNVS_SEC + * SNVS consolidated = _INT_SNVS + * JR0 = MXC_INT_CAAM_INT0_NUM + * JR1 = MXC_INT_CAAM_INT1_NUM + */ + +const struct mvf_caam_data mvf_caam_data __initconst = { + .iobase_caam = MVF_CAAM_BASE_ADDR, + .iobase_caam_sm = MVF_CAAM_SECMEM_BASE_ADDR, + .iobase_snvs = MVF_SNVS_BASE_ADDR, + .irq_sec_vio = MVF_INT_SNVS_SEC, + .irq_snvs = MVF_INT_SNVS, + .jr[0].offset_jr = 0x1000, + .jr[0].irq_jr = MVF_INT_CAAM, + .jr[1].offset_jr = 0x2000, + .jr[1].irq_jr = MVF_INT_CAAM, +}; + +struct platform_device *__init mvf_add_caam( + const struct mvf_caam_data *data) +{ + u32 res_count = 0; + struct resource res[] = { + { + /* Define base range for entire CAAM register map */ + .name = "iobase_caam", + .start = data->iobase_caam, + .end = data->iobase_caam + ((SZ_32K + SZ_4K) - 1), + .flags = IORESOURCE_MEM, + }, { + /* Define range for secure memory */ + .name = "iobase_caam_sm", + .start = data->iobase_caam_sm, + .end = data->iobase_caam_sm + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { + /* Define range for SNVS */ + .name = "iobase_snvs", + .start = data->iobase_snvs, + .end = data->iobase_snvs + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + /* Define interrupt for security violations */ + .name = "irq_sec_vio", + .start = data->irq_sec_vio, + .end = data->irq_sec_vio, + .flags = IORESOURCE_IRQ, + }, { + /* Define general SNVS interrupt */ + .name = "irq_snvs", + .start = data->irq_snvs, + .end = data->irq_snvs, + .flags = IORESOURCE_IRQ, + }, { + .name = "offset_jr0", + .start = data->jr[0].offset_jr, + .end = data->jr[0].offset_jr, + .flags = IORESOURCE_MEM, + }, { + .name = "irq_jr0", + .start = data->jr[0].irq_jr, + .end = data->jr[0].irq_jr, + .flags = IORESOURCE_IRQ, + }, { + .name = "offset_jr1", + .start = data->jr[1].offset_jr, + .end = data->jr[1].offset_jr, + .flags = IORESOURCE_MEM, + }, { + .name = "irq_jr1", + .start = data->jr[1].irq_jr, + .end = data->jr[1].irq_jr, + .flags = IORESOURCE_IRQ, + }, + }; + + res_count = ARRAY_SIZE(res); + BUG_ON(!res_count); + + return imx_add_platform_device("caam", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/arch/arm/plat-mxc/devices/platform-mxc-ehci.c index f700d656c3b7..928f3b792e0f 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c +++ b/arch/arm/plat-mxc/devices/platform-mxc-ehci.c @@ -16,6 +16,13 @@ .irq = soc ## _INT_USB_ ## hs, \ } +#define mvf_mxc_ehci_data_entry_single(arch, _id) \ + { \ + .id = _id, \ + .iobase = arch ## _USBC ## _id ## _BASE_ADDR, \ + .irq = arch ## _INT_USB ## _id, \ + } + #ifdef CONFIG_SOC_IMX25 const struct imx_mxc_ehci_data imx25_mxc_ehci_otg_data __initconst = imx_mxc_ehci_data_entry_single(MX25, 0, OTG); @@ -59,12 +66,18 @@ const struct imx_mxc_ehci_data imx6q_mxc_ehci_hs_data[] __initconst = { #endif /* ifdef CONFIG_SOC_IMX6Q */ #ifdef CONFIG_ARCH_MVF +#ifdef CONFIG_MACH_PCM052 +const struct imx_mxc_ehci_data mvf_mxc_ehci_otg_data[] __initconst = { + mvf_mxc_ehci_data_entry_single(MVF, 0), + mvf_mxc_ehci_data_entry_single(MVF, 1), +#else const struct imx_mxc_ehci_data mvf_mxc_ehci_otg_data __initconst = { .id = 0, .iobase = MVF_USBC1_BASE_ADDR, .irq = MVF_INT_USB2, -}; #endif +}; +#endif /* ifdef CONFIG_ARCH_MVF */ struct platform_device *__init imx_add_mxc_ehci( const struct imx_mxc_ehci_data *data, diff --git a/arch/arm/plat-mxc/include/mach/arc_otg.h b/arch/arm/plat-mxc/include/mach/arc_otg.h index 51945e0fa957..af06f51759e5 100755 --- a/arch/arm/plat-mxc/include/mach/arc_otg.h +++ b/arch/arm/plat-mxc/include/mach/arc_otg.h @@ -31,7 +31,7 @@ extern void __iomem *imx_otg_base; #define USB_OTGREGS_BASE MVF_IO_ADDRESS(0x40034000) #define USB_OTG2REGS_BASE MVF_IO_ADDRESS(0x400B4000) -#define USB_H1REGS_BASE MVF_IO_ADDRESS(0x400B4000) +#define USB_H1REGS_BASE MVF_IO_ADDRESS(0x40034000) /* dummy h2regs for MVF */ #define USB_H2REGS_BASE MVF_IO_ADDRESS(0x400B4000) #define USBC0_OTHERREGS_BASE MVF_IO_ADDRESS(0x40034800) diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index a8a8034c1010..0e2a2a1d13e9 100755 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -89,6 +89,15 @@ struct imx_imx2_wdt_data { struct platform_device *__init imx_add_imx2_wdt( const struct imx_imx2_wdt_data *data); +struct mvf_adc_data { + int id; + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq; +}; +struct platform_device *__init mvf_add_adcdev( + const struct mvf_adc_data *data); + struct imx_imxdi_rtc_data { resource_size_t iobase; resource_size_t irq; @@ -672,3 +681,20 @@ struct imx_rngb_data { struct platform_device *__init imx_add_rngb( const struct imx_rngb_data *data); + +struct mvf_caam_jr_data { + resource_size_t offset_jr; + resource_size_t irq_jr; +}; + +struct mvf_caam_data { + resource_size_t iobase_caam; /* entirety of CAAM register map */ + resource_size_t iobase_caam_sm; /* base of secure memory */ + resource_size_t iobase_snvs; /* base of SNVS */ + resource_size_t irq_sec_vio; /* SNVS security violation */ + resource_size_t irq_snvs; /* SNVS consolidated (incl. RTC) */ + struct mvf_caam_jr_data jr[4]; /* offset+IRQ for each possible ring */ +}; + +struct platform_device *__init mvf_add_caam( + const struct mvf_caam_data *data); diff --git a/arch/arm/plat-mxc/include/mach/iomux-mvf.h b/arch/arm/plat-mxc/include/mach/iomux-mvf.h index a838e0bbead9..eb093e2c0f7f 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mvf.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mvf.h @@ -40,9 +40,8 @@ typedef enum iomux_config { #define NON_MUX_I 0x3FF #define NON_PAD_I 0x7FF -#define MVF600_SDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_20ohm | PAD_CTL_OBE_IBE_ENABLE) +#define MVF600_SDHC_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE) #define MVF600_ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ PAD_CTL_DSE_50ohm) @@ -196,16 +195,19 @@ typedef enum iomux_config { MVF600_ENET_PAD_CTRL | PAD_CTL_OBE_ENABLE) /*USB0/1 VBUS, using the GPIO*/ -#define MVF600_PAD134_PTA7__USB0_VBUS_EN \ +#define MVF600_PAD134_PTA7__USB_VBUS_EN \ IOMUX_PAD(0x0218, 0x0218, 0, 0x0000, 0, \ - MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE) + PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_25ohm | \ + PAD_CTL_SPEED_LOW | PAD_CTL_OBE_ENABLE) #define MVF600_PAD6_PTA16__USB0_VBUS_EN \ IOMUX_PAD(0x0018, 0x0018, 0, 0x0000, 0, \ - MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE) - + PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_25ohm | \ + PAD_CTL_SPEED_LOW | PAD_CTL_OBE_ENABLE) #define MVF600_PAD7_PTA17__USB_OC_N \ IOMUX_PAD(0x001C, 0x001C, 2, 0x0000, 0, \ - PAD_CTL_DSE_20ohm | PAD_CTL_IBE_ENABLE) + PAD_CTL_HYS | PAD_CTL_IBE_ENABLE) /*ESAI0(share with FEC1)*/ #define MVF600_PAD54_PTC9__ESAI_SCKT \ diff --git a/arch/arm/plat-mxc/include/mach/mvf.h b/arch/arm/plat-mxc/include/mach/mvf.h index 9ef4de35d4c0..4a47636fa741 100644 --- a/arch/arm/plat-mxc/include/mach/mvf.h +++ b/arch/arm/plat-mxc/include/mach/mvf.h @@ -53,8 +53,7 @@ * IRAM */ #define MVF_IRAM_BASE_ADDR 0x3F000000 /* internal ram */ -#define MVF_IRAM_PARTITIONS 2 -#define MVF_IRAM_SIZE (MVF_IRAM_PARTITIONS * SZ_256K) /* 512KB */ +#define MVF_IRAM_SIZE (SZ_256K) /* 256KB */ #ifdef CONFIG_MXC_VPU_IRAM @@ -146,7 +145,7 @@ #define MVF_PIT_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x00037000) #define MVF_FTM0_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x00038000) #define MVF_FTM1_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x00039000) -#define MVF_ADC_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0003B000) +#define MVF_ADC0_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0003B000) #define MVF_TCON0_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0003D000) #define MVF_WDOG1_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0003E000) #define MVF_LPTMR_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x00040000) @@ -169,24 +168,29 @@ #define MVF_EWM_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x00065000) #define MVF_I2C0_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x00066000) #define MVF_I2C1_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x00067000) -#define MVF_WKUP_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0006A000) +#define MVF_WKPU_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0006A000) #define MVF_CCM_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0006B000) -#define MVF_GPC_BASE_ADDR (MVF_AIPS1_BASE_ADDR + 0x0006C000) -#define MVF_VREG_BASE_ADDR (MVF_AIPS1_BASE_ADDR + 0x0006D000) -#define MVF_SRC_BASE_ADDR (MVF_AIPS1_BASE_ADDR + 0x0006E000) +#define MVF_GPC_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0006C000) +#define MVF_VREG_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0006D000) +#define MVF_SRC_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0006E000) #define MVF_CMU_BASE_ADDR (MVF_AIPS1_BASE_ADDR + 0x0006F000) +#define MVF_CAAM_SECMEM_BASE_ADDR \ + (MVF_AIPS0_BASE_ADDR + 0x0007C000) +#define MVF_CAAM_SECMEM_END_ADDR \ + (MVF_AIPS0_BASE_ADDR + 0x0007FFFF) + #define L2_BASE_ADDR MVF_L2C_BASE_ADDR -#define MVF_USBC0_CTRL_BASE_ADDR 0x40034800 -#define MVF_USBC1_CTRL_BASE_ADDR 0x400B4800 -#define MVF_USBC0_PHY_BASE_ADDR 0x40034818 -#define MVF_USBC1_PHY_BASE_ADDR 0x400B4818 +#define MVF_USBC0_CTRL_BASE_ADDR 0x40035800 +#define MVF_USBC1_CTRL_BASE_ADDR 0x400B5800 +#define MVF_USBC0_PHY_BASE_ADDR 0x40035818 +#define MVF_USBC1_PHY_BASE_ADDR 0x400B5818 #define MVF_USBC0_BASE_ADDR 0x40034000 #define MVF_USBC1_BASE_ADDR 0x400B4000 #define MVF_USBPHY0_BASE_ADDR 0x40050800 -#define MVF_USBPHY1_BASE_ADDR 0x40050B00 +#define MVF_USBPHY1_BASE_ADDR 0x40050C00 #define MVF_MSCM_INT_ROUTER_BASE (MVF_MSCM_BASE_ADDR + 0x800) @@ -283,6 +287,12 @@ #define MVF_PGC_GPU_PGCR (MVF_PGC_GPU_BASE + 0x0) #define MVF_PGC_GPU_PGSR (MVF_PGC_GPU_BASE + 0xC) +/* Voltage Regulators */ +#define MVF_VREG_BASE (MVF_IO_ADDRESS(MVF_VREG_BASE_ADDR)) + +/* WKPU */ +#define MVF_WKPU_BASE (MVF_IO_ADDRESS(MVF_WKPU_BASE_ADDR)) + /* * defines for SPBA modules */ @@ -543,8 +553,13 @@ #define MVF_INT_I2C1 104 #define MVF_INT_I2C2 105 #define MVF_INT_I2C3 106 -#define MVF_INT_USBOTG0 107 -#define MVF_INT_USB2 108 + +#ifdef CONFIG_MACH_PCM052 +#define MVF_INT_USB0 107 +#define MVF_INT_USB1 108 +#else +#endif + #define MVF_INT_ENET_MAC0 110 #define MVF_INT_ENET_MAC1 111 #define MVF_INT_1588_TIMER0 112 @@ -558,15 +573,16 @@ #define MVF_INT_ESAI_BIFIFO 120 #define MVF_INT_SPDIF 121 #define MVF_INT_ASRC 122 -#define MVF_INT_CMU 123 +#define MVF_INT_CMU 123 #define MVF_INT_WKPU0 124 #define MVF_INT_WKPU1 125 -#define MVF_INT_CCM 126 +#define MVF_INT_CCM 126 -#define MVF_INT_SRC 128 -#define MVF_INT_PDB 129 -#define MVF_INT_EWM 130 +#define MVF_INT_SRC 128 +#define MVF_INT_PDB 129 +#define MVF_INT_EWM 130 #define MVF_INT_SNVS 132 +#define MVF_INT_SNVS_SEC 133 #define MVF_INT_CAAM 134 diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index afcf1255150b..b291d9015025 100755 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -257,6 +257,15 @@ struct cpu_op { u32 cpu_podf; }; +#ifdef CONFIG_SOC_MVFA5 +enum mvf_cpu_pwr_mode { + RUN_MODE, + LOW_POWER_RUN, + WAIT_MODE, + STOP_MODE, + LOW_POWER_STOP, +}; +#else enum mxc_cpu_pwr_mode { WAIT_CLOCKED, /* wfi only */ WAIT_UNCLOCKED, /* WAIT */ @@ -265,10 +274,15 @@ enum mxc_cpu_pwr_mode { STOP_POWER_OFF, /* STOP + SRPG */ ARM_POWER_OFF, /* STOP + SRPG + ARM power off */ }; +#endif int tzic_enable_wake(int is_idle); +#ifdef CONFIG_SOC_MVFA5 +extern void mvf_cpu_lp_set(enum mvf_cpu_pwr_mode mode); +#else extern void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode); +#endif extern int tzic_enable_wake(int is_idle); #endif diff --git a/arch/arm/plat-mxc/usb_common.c b/arch/arm/plat-mxc/usb_common.c index 0aa3d590d1d2..96cede81d319 100755 --- a/arch/arm/plat-mxc/usb_common.c +++ b/arch/arm/plat-mxc/usb_common.c @@ -1049,6 +1049,9 @@ EXPORT_SYMBOL(usb_debounce_id_vbus); int usb_event_is_otg_wakeup(struct fsl_usb2_platform_data *pdata) { +#ifdef CONFIG_ARCH_MVF + return false; +#endif return (USBCTRL & UCTRL_OWIR) ? true : false; } EXPORT_SYMBOL(usb_event_is_otg_wakeup); diff --git a/arch/arm/plat-mxc/usb_wakeup.c b/arch/arm/plat-mxc/usb_wakeup.c index 4704eae91a51..7187eff67426 100755 --- a/arch/arm/plat-mxc/usb_wakeup.c +++ b/arch/arm/plat-mxc/usb_wakeup.c @@ -36,7 +36,8 @@ struct wakeup_ctrl { struct task_struct *thread; struct completion event; }; -static struct wakeup_ctrl *g_ctrl; +static struct wakeup_ctrl *g_ctrl[2]; +static unsigned int g_ctrls; extern int usb_event_is_otg_wakeup(struct fsl_usb2_platform_data *pdata); extern void usb_debounce_id_vbus(void); @@ -166,7 +167,7 @@ static int wakeup_dev_probe(struct platform_device *pdev) int status; unsigned long interrupt_flag; - printk(KERN_INFO "IMX usb wakeup probe\n"); + printk(KERN_INFO "IMX usb wakeup probe. id=%d\n", pdev->id); if (!pdev || !pdev->dev.platform_data) return -ENODEV; @@ -192,11 +193,12 @@ static int wakeup_dev_probe(struct platform_device *pdev) if (status) goto error1; - ctrl->thread = kthread_run(wakeup_event_thread, (void *)ctrl, "usb_wakeup thread"); + ctrl->thread = kthread_run(wakeup_event_thread, (void *)ctrl, + "usb_wakeup:%d", pdev->id); status = IS_ERR(ctrl->thread) ? -1 : 0; if (status) goto error2; - g_ctrl = ctrl; + g_ctrl[g_ctrls++] = ctrl; printk(KERN_DEBUG "the wakeup pdata is 0x%p\n", pdata); return 0; @@ -209,12 +211,17 @@ error1: static int wakeup_dev_exit(struct platform_device *pdev) { - if (g_ctrl->thread) { - complete(&g_ctrl->event); - kthread_stop(g_ctrl->thread); + int i; + for (i = 0; i < g_ctrls; i++) { + if (g_ctrl[i]->thread) { + complete(&g_ctrl[i]->event); + kthread_stop(g_ctrl[i]->thread); + } + free_irq(g_ctrl[i]->wakeup_irq, (void *)g_ctrl[i]); + kfree(g_ctrl[i]); + g_ctrl[i] = NULL; + g_ctrls = 0; } - free_irq(g_ctrl->wakeup_irq, (void *)g_ctrl); - kfree(g_ctrl); return 0; } static struct platform_driver wakeup_d = { |