diff options
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r-- | arch/arm/plat-mxc/clock.c | 45 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/clock.h | 2 |
2 files changed, 0 insertions, 47 deletions
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c index 5079787273d2..0ed09549468d 100644 --- a/arch/arm/plat-mxc/clock.c +++ b/arch/arm/plat-mxc/clock.c @@ -210,48 +210,3 @@ EXPORT_SYMBOL(clk_get_parent); DEFINE_SPINLOCK(imx_ccm_lock); #endif /* CONFIG_COMMON_CLK */ - -/* - * Get the resulting clock rate from a PLL register value and the input - * frequency. PLLs with this register layout can at least be found on - * MX1, MX21, MX27 and MX31 - * - * mfi + mfn / (mfd + 1) - * f = 2 * f_ref * -------------------- - * pd + 1 - */ -unsigned long mxc_decode_pll(unsigned int reg_val, u32 freq) -{ - long long ll; - int mfn_abs; - unsigned int mfi, mfn, mfd, pd; - - mfi = (reg_val >> 10) & 0xf; - mfn = reg_val & 0x3ff; - mfd = (reg_val >> 16) & 0x3ff; - pd = (reg_val >> 26) & 0xf; - - mfi = mfi <= 5 ? 5 : mfi; - - mfn_abs = mfn; - - /* On all i.MXs except i.MX1 and i.MX21 mfn is a 10bit - * 2's complements number - */ - if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) - mfn_abs = 0x400 - mfn; - - freq *= 2; - freq /= pd + 1; - - ll = (unsigned long long)freq * mfn_abs; - - do_div(ll, mfd + 1); - - if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) - ll = -ll; - - ll = (freq * mfi) + ll; - - return ll; -} diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h index bd940c795cbb..0c4ad776f726 100644 --- a/arch/arm/plat-mxc/include/mach/clock.h +++ b/arch/arm/plat-mxc/include/mach/clock.h @@ -64,7 +64,5 @@ void clk_unregister(struct clk *clk); extern spinlock_t imx_ccm_lock; -unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref); - #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARCH_MXC_CLOCK_H__ */ |