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-rw-r--r--arch/arm/plat-samsung/include/plat/regs-watchdog.h41
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h21
-rw-r--r--arch/arm/plat-samsung/include/plat/watchdog-reset.h38
3 files changed, 20 insertions, 80 deletions
diff --git a/arch/arm/plat-samsung/include/plat/regs-watchdog.h b/arch/arm/plat-samsung/include/plat/regs-watchdog.h
deleted file mode 100644
index 4938492470f7..000000000000
--- a/arch/arm/plat-samsung/include/plat/regs-watchdog.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-watchdog.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- * http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 Watchdog timer control
-*/
-
-
-#ifndef __ASM_ARCH_REGS_WATCHDOG_H
-#define __ASM_ARCH_REGS_WATCHDOG_H
-
-#define S3C_WDOGREG(x) ((x) + S3C_VA_WATCHDOG)
-
-#define S3C2410_WTCON S3C_WDOGREG(0x00)
-#define S3C2410_WTDAT S3C_WDOGREG(0x04)
-#define S3C2410_WTCNT S3C_WDOGREG(0x08)
-
-/* the watchdog can either generate a reset pulse, or an
- * interrupt.
- */
-
-#define S3C2410_WTCON_RSTEN (0x01)
-#define S3C2410_WTCON_INTEN (1<<2)
-#define S3C2410_WTCON_ENABLE (1<<5)
-
-#define S3C2410_WTCON_DIV16 (0<<3)
-#define S3C2410_WTCON_DIV32 (1<<3)
-#define S3C2410_WTCON_DIV64 (2<<3)
-#define S3C2410_WTCON_DIV128 (3<<3)
-
-#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
-#define S3C2410_WTCON_PRESCALE_MASK (0xff00)
-
-#endif /* __ASM_ARCH_REGS_WATCHDOG_H */
-
-
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index 02b66d723d1a..4afc32f90b6d 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -21,6 +21,8 @@ typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
unsigned int fifo_mask;
unsigned int fifo_max;
+volatile u8 *uart_base;
+
/* forward declerations */
static void arch_detect_cpu(void);
@@ -28,19 +30,24 @@ static void arch_detect_cpu(void);
/* defines for UART registers */
#include <plat/regs-serial.h>
-#include <plat/regs-watchdog.h>
/* working in physical space... */
-#undef S3C2410_WDOGREG
-#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
+#define S3C_WDOGREG(x) ((S3C_PA_WDT + (x)))
+
+#define S3C2410_WTCON S3C_WDOGREG(0x00)
+#define S3C2410_WTDAT S3C_WDOGREG(0x04)
+#define S3C2410_WTCNT S3C_WDOGREG(0x08)
+
+#define S3C2410_WTCON_RSTEN (1 << 0)
+#define S3C2410_WTCON_ENABLE (1 << 5)
+
+#define S3C2410_WTCON_DIV128 (3 << 3)
+
+#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
/* how many bytes we allow into the FIFO at a time in FIFO mode */
#define FIFO_MAX (14)
-#ifdef S3C_PA_UART
-#define uart_base S3C_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT)
-#endif
-
static __inline__ void
uart_wr(unsigned int reg, unsigned int val)
{
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index bc4db9b04e36..0386b8f76623 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -10,37 +10,11 @@
* published by the Free Software Foundation.
*/
-#include <plat/clock.h>
-#include <plat/regs-watchdog.h>
-#include <mach/map.h>
+#ifndef __PLAT_SAMSUNG_WATCHDOG_RESET_H
+#define __PLAT_SAMSUNG_WATCHDOG_RESET_H
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/delay.h>
+extern void samsung_wdt_reset(void);
+extern void samsung_wdt_reset_of_init(void);
+extern void samsung_wdt_reset_init(void __iomem *base);
-static inline void arch_wdt_reset(void)
-{
- printk("arch_reset: attempting watchdog reset\n");
-
- __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
-
- if (!IS_ERR(s3c2410_wdtclk))
- clk_enable(s3c2410_wdtclk);
-
- /* put initial values into count and data */
- __raw_writel(0x80, S3C2410_WTCNT);
- __raw_writel(0x80, S3C2410_WTDAT);
-
- /* set the watchdog to go and reset... */
- __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
- S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
-
- /* wait for reset to assert... */
- mdelay(500);
-
- printk(KERN_ERR "Watchdog reset failed to assert reset\n");
-
- /* delay to allow the serial port to show the message */
- mdelay(50);
-}
+#endif /* __PLAT_SAMSUNG_WATCHDOG_RESET_H */