diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 62 |
1 files changed, 61 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts index 0b3a93c4155d..666e754b2901 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts @@ -2,7 +2,7 @@ /* * Device Tree file for NXP LS1028A QDS Board. * - * Copyright 2018 NXP + * Copyright 2018-2019 NXP * * Harninder Rai <harninder.rai@nxp.com> * @@ -104,9 +104,41 @@ reg = <5>; }; }; + + mdio_slot1: mdio@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + + mdio_slot2: mdio@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + + mdio_slot3: mdio@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + + mdio_slot4: mdio@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; }; }; +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + &duart0 { status = "okay"; }; @@ -213,11 +245,34 @@ }; }; +&i2c1 { + status = "okay"; + rtc@51 { + compatible = "nxp,pcf2129"; + reg = <0x51>; + }; +}; + &enetc_port1 { phy-handle = <&qds_phy1>; phy-connection-type = "rgmii-id"; }; +&fspi { + status = "okay"; + mt35xu02g: flash@0 { + compatible = "spansion,m25p80"; + #address-cells = <1>; + #size-cells = <1>; + m25p,fast-read; + spi-max-frequency = <20000000>; + reg = <0>; + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ + spi-rx-bus-width = <8>; /* 8 SPI Rx lines */ + spi-tx-bus-width = <1>; /* 1 SPI Tx line */ + }; +}; + &sai1 { status = "okay"; }; @@ -225,3 +280,8 @@ &sata { status = "okay"; }; + +&hdptx0 { + lane-mapping = <0x4e>; + status = "okay"; +}; |