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Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi
index 2716ca4a7c08..d2803725f7f3 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi
@@ -31,6 +31,17 @@ dc1_subsys: bus@57000000 {
clock-output-names = "dc1_axi_ext_clk";
};
+ dc1_disp_lpcg: clock-controller@57010000 {
+ compatible = "fsl,imx8qxp-lpcg";
+ reg = <0x57010000 0x4>;
+ #clock-cells = <1>;
+ clocks = <&clk IMX_SC_R_DC_1 IMX_SC_PM_CLK_MISC0>,
+ <&clk IMX_SC_R_DC_1 IMX_SC_PM_CLK_MISC1>;
+ bit-offset = <0 4>;
+ clock-output-names = "dc1_disp0_lpcg_clk", "dc1_disp1_lpcg_clk";
+ power-domains = <&pd IMX_SC_R_DC_1>;
+ };
+
dc1_dpr0_lpcg: clock-controller@57010018 {
compatible = "fsl,imx8qxp-lpcg";
reg = <0x57010018 0x4>;