diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi')
-rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 71 |
1 files changed, 40 insertions, 31 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi index 305ffca1c10a..27c4e9d06e9f 100755 --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ OR MIT /* - * Copyright 2020 Toradex + * Copyright 2020-2021 Toradex */ #include "dt-bindings/pwm/pwm.h" @@ -21,8 +21,8 @@ compatible = "pwm-backlight"; brightness-levels = <0 45 63 88 119 158 203 255>; default-brightness-level = <4>; - /* Verdin MEZ_DSI_1_BKL_EN (SODIMM 21) */ - enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; + /* Verdin MEZ_DSI_1_BKL_EN (SODIMM 46) */ + enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mez_dsi_1_bkl_en>; power-supply = <®_3p3v>; @@ -477,10 +477,9 @@ lvds_ti_sn65dsi83: bridge@2c { compatible = "ti,sn65dsi83"; - /* Verdin MEZ_GPIO_1 (SODIMM 206) */ - enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mez_gpio1>; + pinctrl-0 = <&pinctrl_mez_dsi_1_gpio10>, <&pinctrl_mez_dsi_1_int_n>; reg = <0x2c>; status = "disabled"; }; @@ -496,27 +495,24 @@ hdmi_lontium_lt8912: hdmi@48 { compatible = "lontium,lt8912"; ddc-i2c-bus = <&i2c2>; - /* Verdin MEZ_DSI_1_INT HPD (SODIMM 17) shared with MEZ_GPIO_1 (SODIMM 206) */ - hpd-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; + /* Verdin MEZ_DSI_1_HPD */ + hpd-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mez_dsi_1_int_hpd>, <&pinctrl_mez_gpio1>, - <&pinctrl_mez_gpio2>; + pinctrl-0 = <&pinctrl_mez_dsi_1_hpd>, <&pinctrl_mez_dsi_1_gpio10>; reg = <0x48>; - /* Verdin MEZ_GPIO_2 (SODIMM 208) */ - reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; status = "disabled"; }; atmel_mxt_ts: touch@4a { compatible = "atmel,maxtouch"; - /* Verdin MEZ_DSI_1_INT# (SODIMM 17) */ + /* Verdin MEZ_DSI_1_INT# (SODIMM 17) shared. Pinctrl by &lvds_ti_sn65dsi83 */ interrupt-parent = <&gpio4>; interrupts = <25 IRQ_TYPE_EDGE_FALLING>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mez_dsi_1_int_n>, <&pinctrl_mez_gpio2>; + pinctrl-0 = <&pinctrl_mez_touchreset>; reg = <0x4a>; - /* Verdin MEZ_GPIO_2 (SODIMM 208) */ - reset-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; status = "disabled"; }; @@ -734,9 +730,10 @@ &iomuxc { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio7>, - <&pinctrl_gpio8>, <&pinctrl_gpio_hog1>, - <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>, + pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, + <&pinctrl_gpio7>, <&pinctrl_gpio8>, + <&pinctrl_gpio_hog1>, <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>, <&pinctrl_hdmi_hog>, <&pinctrl_pmic_tpm_ena>; pinctrl_ctrl_sleep_moci: ctrlsleepmocigrp { @@ -843,6 +840,18 @@ >; }; + pinctrl_gpio1: gpio1grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x184 /* SODIMM 206 */ + >; + }; + + pinctrl_gpio2: gpio2grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x1c4 /* SODIMM 208 */ + >; + }; + pinctrl_gpio3: gpio3grp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x184 /* SODIMM 210 */ @@ -979,34 +988,34 @@ /* Verdin MEZ_DSI_1_BKL_EN */ pinctrl_mez_dsi_1_bkl_en: mezdsi1bklengrp { fsl,pins = < - MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x1c4 /* SODIMM 21 */ + MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x184 /* SODIMM 46 */ >; }; - /* Verdin MEZ_DSI_1_INT HPD (pulled-down as active-high) */ - pinctrl_mez_dsi_1_int_hpd: mezdsi1inthpdgrp { + /* Verdin MEZ_DSI_1_GPIO_10 */ + pinctrl_mez_dsi_1_gpio10: mezdsi1gpio10grp { fsl,pins = < - MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x184 /* SODIMM 17 */ + MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x1c4 /* SODIMM 21 */ >; }; - /* Verdin MEZ_DSI_1_INT# (pulled-up as active-low) */ - pinctrl_mez_dsi_1_int_n: mezdsi1intngrp { + /* Verdin MEZ_DSI_1_HPD, conflicts with Verdin PWM 3 */ + pinctrl_mez_dsi_1_hpd: mezdsi1hpdgrp { fsl,pins = < - MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x1c4 /* SODIMM 17 */ + MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x184 /* SODIMM 19 */ >; }; - /* MEZ_GPIO_1 shared with MEZ_DSI_1_INT on Verdin DSI to HDMI Display Adapter */ - pinctrl_mez_gpio1: mezgpio1grp { + /* Verdin MEZ_DSI_1_INT# (pulled-up as active-low) */ + pinctrl_mez_dsi_1_int_n: mezdsi1intngrp { fsl,pins = < - MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x184 /* SODIMM 206 */ + MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x1c4 /* SODIMM 17 */ >; }; - pinctrl_mez_gpio2: mezgpio2grp { + pinctrl_mez_touchreset: meztouchresetgrp { fsl,pins = < - MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x1c4 /* SODIMM 208 */ + MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x184 /* SODIMM 42 */ >; }; |