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Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-evk.dts')
-rwxr-xr-xarch/arm64/boot/dts/freescale/imx8mq-evk.dts9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 29bbcffdbb15..cd84f5679eee 100755
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -662,6 +662,9 @@
<&clk IMX8MQ_CLK_PCIE1_PHY>,
<&pcie0_refclk>;
clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ assigned-clocks = <&clk IMX8MQ_CLK_PCIE1_AUX>;
+ assigned-clock-rates = <10000000>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_50M>;
hard-wired = <1>;
status = "okay";
};
@@ -676,6 +679,9 @@
<&clk IMX8MQ_CLK_PCIE2_PHY>,
<&pcie1_refclk>;
clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_AUX>;
+ assigned-clock-rates = <10000000>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_50M>;
status = "okay";
};
@@ -687,6 +693,9 @@
<&clk IMX8MQ_CLK_PCIE2_PHY>,
<&pcie1_refclk>;
clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_AUX>;
+ assigned-clock-rates = <10000000>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_50M>;
status = "disabled";
};