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Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8ulp-evk.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8ulp-evk.dts674
1 files changed, 674 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
new file mode 100644
index 000000000000..e86be8019645
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -0,0 +1,674 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2021 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8ulp.dtsi"
+#include "imx8ulp-rpmsg.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "NXP i.MX8ULP EVK";
+ compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp";
+
+ chosen {
+ stdout-path = &lpuart5;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_keys>;
+
+ power-on {
+ label = "PowerOn";
+ gpios = <&gpiof 31 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0 0x80000000>;
+ };
+
+ rpmsg_keys: rpmsg-keys {
+ compatible = "fsl,rpmsg-keys";
+
+ volume-up {
+ label = "VolumeUp";
+ linux,code = <KEY_VOLUMEUP>;
+ rpmsg-key,wakeup;
+ };
+
+ volume-down {
+ label = "VolumeDown";
+ linux,code = <KEY_VOLUMEDOWN>;
+ rpmsg-key,wakeup;
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0 0x28000000>;
+ linux,cma-default;
+ };
+
+ rsc_table: rsc_table@1fff8000{
+ reg = <0 0x1fff8000 0 0x1000>;
+ no-map;
+ };
+
+ dsp_reserved: dsp_reserved@8e000000 {
+ reg = <0 0x8e000000 0 0x1000000>;
+ no-map;
+ };
+ dsp_reserved_heap: dsp_reserved_heap {
+ reg = <0 0x8f000000 0 0xef0000>;
+ no-map;
+ };
+ dsp_vdev0vring0: vdev0vring0@8fef0000 {
+ reg = <0 0x8fef0000 0 0x8000>;
+ no-map;
+ };
+ dsp_vdev0vring1: vdev0vring1@8fef8000 {
+ reg = <0 0x8fef8000 0 0x8000>;
+ no-map;
+ };
+ dsp_vdev0buffer: vdev0buffer@8ff00000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x8ff00000 0 0x100000>;
+ no-map;
+ };
+
+ vdev0vring0: vdev0vring0@aff00000 {
+ reg = <0 0xaff00000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0vring1: vdev0vring1@aff08000 {
+ reg = <0 0xaff08000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring0: vdev1vring0@aff10000 {
+ reg = <0 0xaff10000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring1: vdev1vring1@aff18000 {
+ reg = <0 0xaff18000 0 0x8000>;
+ no-map;
+ };
+
+ vdevbuffer: vdevbuffer@a8400000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0xa8400000 0 0x100000>;
+ no-map;
+ };
+
+ audio_reserved: audio@0xa8500000 {
+ compatible = "shared-dma-pool";
+ no-map;
+ reg = <0 0xa8500000 0 0x100000>;
+ };
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ usdhc2_pwrseq: usdhc2_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&pcal6408 2 GPIO_ACTIVE_LOW>;
+ };
+
+ bt_sco_codec: bt_sco_codec {
+ #sound-dai-cells = <1>;
+ compatible = "linux,bt-sco";
+ };
+
+ sound-bt-sco {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "bt-sco-audio";
+ simple-audio-card,format = "dsp_a";
+ simple-audio-card,bitclock-inversion;
+ simple-audio-card,frame-master = <&btcpu>;
+ simple-audio-card,bitclock-master = <&btcpu>;
+
+ btcpu: simple-audio-card,cpu {
+ sound-dai = <&sai5>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <16>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&bt_sco_codec 1>;
+ };
+ };
+
+ sound-spdif {
+ compatible = "fsl,imx-audio-spdif";
+ model = "imx-spdif";
+ spdif-controller = <&spdif>;
+ spdif-out;
+ fsl,constraint-rate = <16000>, <32000>, <48000>,
+ <64000>, <96000>, <192000>;
+ };
+
+ rpmsg_audio: rpmsg-audio {
+ compatible = "fsl,imx8ulp-rpmsg-audio";
+ model = "wm8960-audio";
+ fsl,rpmsg-out;
+ fsl,rpmsg-in;
+ audio-codec = <&wm8960>;
+ memory-region = <&audio_reserved>;
+ audio-routing =
+ "LINPUT1", "MICB",
+ "LINPUT3", "MICB";
+ status = "okay";
+ };
+};
+
+&clock_ext_ts {
+ /* External ts clock is 50MHZ from PHY on EVK board. */
+ clock-frequency = <50000000>;
+};
+
+&dcnano {
+ status = "okay";
+};
+
+&dphy {
+ status = "okay";
+};
+
+&dsi {
+ status = "okay";
+ ports {
+ port@1 {
+ reg = <1>;
+ mipi_dsi_out: endpoint {
+ remote-endpoint = <&it6161_from_dsim>;
+ };
+ };
+ };
+};
+
+&dsp {
+ assigned-clocks = <&cgc2 IMX8ULP_CLK_HIFI_SEL>;
+ assigned-clock-parents = <&cgc2 IMX8ULP_CLK_PLL4>;
+ memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
+ <&dsp_vdev0vring1>, <&dsp_reserved>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_enet>;
+ pinctrl-1 = <&pinctrl_enet>;
+ assigned-clocks = <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>;
+ assigned-clock-parents = <&clock_ext_ts>;
+ phy-mode = "rmii";
+ phy-handle = <&ethphy>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy: ethernet-phy {
+ reg = <1>;
+ micrel,led-mode = <1>;
+ };
+ };
+};
+
+&flexspi2 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_flexspi2_ptd>;
+ pinctrl-1 = <&pinctrl_flexspi2_ptd>;
+ status = "okay";
+
+ mx25uw51345gxdi00: flash@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <200000000>;
+ spi-tx-bus-width = <8>;
+ spi-rx-bus-width = <8>;
+ };
+};
+
+&i2c_rpbus_0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ pca6416_1: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ mpl3115@60 {
+ compatible = "fsl,mpl3115";
+ reg = <0x60>;
+ };
+
+ lsm6dsm@6a {
+ compatible = "st,lsm6dso";
+ reg = <0x6a>;
+ };
+
+ wm8960: wm8960@1a {
+ compatible = "wlf,wm8960,lpa";
+ reg = <0x1a>;
+ wlf,shared-lrclk;
+ clocks = <&wm8960_mclk>;
+ clock-names = "mclk";
+ };
+
+ ov5640_mipi: ov5640_mipi@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&cgc2 IMX8ULP_CLK_DSI_PHY_REF>;
+ clock-names = "xclk";
+ powerdown-gpios = <&pca6416_1 8 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&pca6416_1 7 GPIO_ACTIVE_LOW>;
+ status = "okay";
+ port {
+ ov5640_mipi_ep: endpoint {
+ remote-endpoint = <&mipi_csi0_ep>;
+ data-lanes = <1 2>;
+ clocks-lanes = <0>;
+ };
+ };
+ };
+
+ ite_bridge: it6161@6c {
+ compatible = "ite,it6161";
+ reg = <0x6c>;
+ it6161-addr-hdmi-tx = <0x4c>;
+ enable-gpios = <&pca6416_1 9 GPIO_ACTIVE_LOW>;
+ interrupt-parent = <&rpmsg_gpioa>;
+ interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+ status = "okay";
+
+ port {
+ it6161_from_dsim: endpoint {
+ remote-endpoint = <&mipi_dsi_out>;
+ };
+ };
+ };
+};
+
+&i2c_rpbus_1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+};
+
+&imx8ulp_cm33 {
+ ipc-only;
+ rsc-da=<0x1fff8000>;
+ mbox-names = "tx", "rx", "rxdb";
+ mboxes = <&mu 0 1
+ &mu 1 1
+ &mu 3 1>;
+ memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
+ status = "okay";
+};
+
+&lpspi5 {
+ fsl,spi-num-chipselects = <1>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpspi5>;
+ pinctrl-1 = <&pinctrl_lpspi5>;
+ cs-gpios = <&gpiof 19 GPIO_ACTIVE_LOW>;
+ pinctrl-assert-gpios = <&pca6416_1 10 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ spidev0: spi@0 {
+ reg = <0>;
+ compatible = "lwn,bk4";
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&lpuart5 {
+ /* console */
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpuart5>;
+ pinctrl-1 = <&pinctrl_lpuart5>;
+ status = "okay";
+};
+
+&lpuart6 {
+ /* BT */
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpuart6>;
+ pinctrl-1 = <&pinctrl_lpuart6>;
+ status = "okay";
+};
+
+&lpuart7 {
+ /* FT4232 PortD: need to connect J25/J26 2-3 */
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpuart7>;
+ pinctrl-1 = <&pinctrl_lpuart7>;
+ status = "okay";
+};
+
+&lpi2c7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpi2c7>;
+ pinctrl-1 = <&pinctrl_lpi2c7>;
+ status = "okay";
+
+ pcal6408: gpio@21 {
+ compatible = "nxp,pcal9554b";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
+&mu {
+ status = "okay";
+};
+
+&mu3 {
+ status = "okay";
+};
+
+&sai5 {
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_sai5>;
+ pinctrl-1 = <&pinctrl_sai5>;
+ assigned-clocks = <&cgc1 IMX8ULP_CLK_SAI5_SEL>;
+ assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1>;
+ fsl,dataline = <0 0x08 0x01>;
+ status = "okay";
+};
+
+&spdif {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_spdif>;
+ pinctrl-1 = <&pinctrl_spdif>;
+ assigned-clocks = <&cgc2 IMX8ULP_CLK_SPDIF_SEL>;
+ assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1>;
+ status = "okay";
+};
+
+&tpm_rpchip_0 {
+ status = "okay";
+};
+
+&usbotg1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_otgid1>;
+ pinctrl-1 = <&pinctrl_otgid1>;
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ over-current-active-low;
+ status = "okay";
+};
+
+&usbphy1 {
+ status = "okay";
+};
+
+&usbmisc1 {
+ status = "okay";
+};
+
+&usbotg2 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_otgid2>;
+ pinctrl-1 = <&pinctrl_otgid2>;
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ over-current-active-low;
+ status = "okay";
+};
+
+&usbphy2 {
+ status = "okay";
+};
+
+&usbmisc2 {
+ status = "okay";
+};
+
+&usdhc0 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+ pinctrl-0 = <&pinctrl_usdhc0>;
+ pinctrl-1 = <&pinctrl_usdhc0>;
+ pinctrl-2 = <&pinctrl_usdhc0>;
+ pinctrl-3 = <&pinctrl_usdhc0>;
+ non-removable;
+ bus-width = <8>;
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+ pinctrl-0 = <&pinctrl_usdhc2_pte>;
+ pinctrl-1 = <&pinctrl_usdhc2_pte>;
+ pinctrl-2 = <&pinctrl_usdhc2_pte>;
+ pinctrl-3 = <&pinctrl_usdhc2_pte>;
+ mmc-pwrseq = <&usdhc2_pwrseq>;
+ max-frequency = <100000000>;
+ bus-width = <4>;
+ keep-power-in-suspend;
+ non-removable;
+ wakeup-source;
+ fsl,sdio-async-interrupt-enabled;
+ status = "okay";
+
+ wifi_wake_host {
+ compatible = "nxp,wifi-wake-host";
+ interrupt-parent = <&gpioe>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&iomuxc1 {
+ pinctrl_dsi: dsigrp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF8__PTF8 0x3
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX8ULP_PAD_PTE15__ENET0_MDC 0x43
+ MX8ULP_PAD_PTE14__ENET0_MDIO 0x43
+ MX8ULP_PAD_PTE17__ENET0_RXER 0x43
+ MX8ULP_PAD_PTE18__ENET0_CRS_DV 0x43
+ MX8ULP_PAD_PTF1__ENET0_RXD0 0x43
+ MX8ULP_PAD_PTE20__ENET0_RXD1 0x43
+ MX8ULP_PAD_PTE16__ENET0_TXEN 0x43
+ MX8ULP_PAD_PTE23__ENET0_TXD0 0x43
+ MX8ULP_PAD_PTE22__ENET0_TXD1 0x43
+ MX8ULP_PAD_PTE19__ENET0_REFCLK 0x43
+ MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43
+ >;
+ };
+
+ pinctrl_flexspi2_ptd: flexspi2ptdgrp {
+ fsl,pins = <
+
+ MX8ULP_PAD_PTD12__FLEXSPI2_A_SS0_B 0x42
+ MX8ULP_PAD_PTD13__FLEXSPI2_A_SCLK 0x42
+ MX8ULP_PAD_PTD14__FLEXSPI2_A_DATA3 0x42
+ MX8ULP_PAD_PTD15__FLEXSPI2_A_DATA2 0x42
+ MX8ULP_PAD_PTD16__FLEXSPI2_A_DATA1 0x42
+ MX8ULP_PAD_PTD17__FLEXSPI2_A_DATA0 0x42
+ MX8ULP_PAD_PTD18__FLEXSPI2_A_DQS 0x42
+ MX8ULP_PAD_PTD19__FLEXSPI2_A_DATA7 0x42
+ MX8ULP_PAD_PTD20__FLEXSPI2_A_DATA6 0x42
+ MX8ULP_PAD_PTD21__FLEXSPI2_A_DATA5 0x42
+ MX8ULP_PAD_PTD22__FLEXSPI2_A_DATA4 0x42
+ >;
+ };
+
+ pinctrl_gpio_keys: gpiokeys {
+ fsl,pins = <
+ MX8ULP_PAD_PTF31__PTF31 0x3
+ >;
+ };
+
+ pinctrl_lpspi5: lpspi5grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF16__LPSPI5_SIN 0x3
+ MX8ULP_PAD_PTF17__LPSPI5_SOUT 0x3
+ MX8ULP_PAD_PTF18__LPSPI5_SCK 0x3
+ MX8ULP_PAD_PTF19__PTF19 0x3
+ >;
+ };
+
+ pinctrl_lpuart5: lpuart5grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF14__LPUART5_TX 0x3
+ MX8ULP_PAD_PTF15__LPUART5_RX 0x3
+ >;
+ };
+
+ pinctrl_lpuart6: lpuart6grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTE10__LPUART6_TX 0x3
+ MX8ULP_PAD_PTE11__LPUART6_RX 0x3
+ MX8ULP_PAD_PTE9__LPUART6_RTS_B 0x3
+ MX8ULP_PAD_PTE8__LPUART6_CTS_B 0x3
+ >;
+ };
+
+ pinctrl_lpuart7: lpuart7grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF22__LPUART7_TX 0x3
+ MX8ULP_PAD_PTF23__LPUART7_RX 0x3
+ >;
+ };
+
+ pinctrl_lpi2c7: lpi2c7grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTE12__LPI2C7_SCL 0x20
+ MX8ULP_PAD_PTE13__LPI2C7_SDA 0x20
+ >;
+ };
+
+ pinctrl_otgid1: usb1grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF2__USB0_ID 0x10003
+ MX8ULP_PAD_PTF4__USB0_OC 0x10003
+ >;
+ };
+
+ pinctrl_otgid2: usb2grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTD23__USB1_ID 0x10003
+ MX8ULP_PAD_PTF6__USB1_OC 0x10003
+ >;
+ };
+
+ pinctrl_sai5: sai5grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF26__I2S5_TX_BCLK 0x43
+ MX8ULP_PAD_PTF27__I2S5_TX_FS 0x43
+ MX8ULP_PAD_PTF28__I2S5_TXD0 0x43
+ MX8ULP_PAD_PTF24__I2S5_RXD3 0x43
+ >;
+ };
+
+ pinctrl_spdif: spdifgrp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF25__SPDIF_OUT1 0x43
+ >;
+ };
+
+ pinctrl_usdhc0: usdhc0grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTD1__SDHC0_CMD 0x3
+ MX8ULP_PAD_PTD2__SDHC0_CLK 0x10002
+ MX8ULP_PAD_PTD10__SDHC0_D0 0x3
+ MX8ULP_PAD_PTD9__SDHC0_D1 0x3
+ MX8ULP_PAD_PTD8__SDHC0_D2 0x3
+ MX8ULP_PAD_PTD7__SDHC0_D3 0x3
+ MX8ULP_PAD_PTD6__SDHC0_D4 0x3
+ MX8ULP_PAD_PTD5__SDHC0_D5 0x3
+ MX8ULP_PAD_PTD4__SDHC0_D6 0x3
+ MX8ULP_PAD_PTD3__SDHC0_D7 0x3
+ MX8ULP_PAD_PTD11__SDHC0_DQS 0x10002
+ >;
+ };
+
+ pinctrl_usdhc2_pte: usdhc2ptegrp {
+ fsl,pins = <
+ MX8ULP_PAD_PTE1__SDHC2_D0 0x3
+ MX8ULP_PAD_PTE0__SDHC2_D1 0x3
+ MX8ULP_PAD_PTE5__SDHC2_D2 0x3
+ MX8ULP_PAD_PTE4__SDHC2_D3 0x3
+ MX8ULP_PAD_PTE2__SDHC2_CLK 0x10002
+ MX8ULP_PAD_PTE3__SDHC2_CMD 0x3
+ MX8ULP_PAD_PTE7__PTE7 0x10003
+ >;
+ };
+
+};
+
+&cameradev {
+ status = "okay";
+};
+
+&isi_0 {
+ status = "okay";
+
+ cap_device {
+ status = "okay";
+ };
+};
+
+&mipi_csi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "okay";
+ port@0 {
+ reg = <0>;
+ mipi_csi0_ep: endpoint {
+ remote-endpoint = <&ov5640_mipi_ep>;
+ data-lanes = <1 2>;
+ bus-type = <4>;
+ };
+ };
+};
+
+&epxp {
+ status = "okay";
+};
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-28 12:11:10 +0000