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Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hi3670.dtsi')
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi3670.dtsi37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
index bc8363bc3b9c..30177543cc8f 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
@@ -654,5 +654,42 @@
clocks = <&sctrl HI3670_PCLK_AO_GPIO6>;
clock-names = "apb_pclk";
};
+
+ /* SD */
+ dwmmc1: dwmmc1@ff37f000 {
+ compatible = "hisilicon,hi3670-dw-mshc",
+ "hisilicon,hi3660-dw-mshc";
+ reg = <0x0 0xff37f000 0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&crg_ctrl HI3670_CLK_GATE_SD>,
+ <&crg_ctrl HI3670_HCLK_GATE_SD>;
+ clock-names = "ciu", "biu";
+ clock-frequency = <3200000>;
+ resets = <&crg_rst 0x94 18>;
+ reset-names = "reset";
+ hisilicon,peripheral-syscon = <&sctrl>;
+ card-detect-delay = <200>;
+ status = "disabled";
+ };
+
+ /* SDIO */
+ dwmmc2: dwmmc2@fc183000 {
+ compatible = "hisilicon,hi3670-dw-mshc",
+ "hisilicon,hi3660-dw-mshc";
+ reg = <0x0 0xfc183000 0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&crg_ctrl HI3670_CLK_GATE_SDIO>,
+ <&crg_ctrl HI3670_HCLK_GATE_SDIO>;
+ clock-names = "ciu", "biu";
+ clock-frequency = <3200000>;
+ resets = <&crg_rst 0x94 20>;
+ reset-names = "reset";
+ card-detect-delay = <200>;
+ status = "disabled";
+ };
};
};