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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7280.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sc7280.dtsi16
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index fb6473a0aa4b..929fc0667e98 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -485,6 +485,7 @@
bus-width = <8>;
supports-cqe;
+ dma-coherent;
qcom,dll-config = <0x0007642c>;
qcom,ddr-config = <0x80040868>;
@@ -1174,6 +1175,7 @@
operating-points-v2 = <&sdhc2_opp_table>;
bus-width = <4>;
+ dma-coherent;
qcom,dll-config = <0x0007642c>;
@@ -1290,8 +1292,8 @@
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
- <&pdc 13 IRQ_TYPE_EDGE_RISING>,
- <&pdc 12 IRQ_TYPE_EDGE_RISING>;
+ <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
+ <&pdc 13 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "hs_phy_irq",
"dm_hs_phy_irq", "dp_hs_phy_irq";
@@ -1711,7 +1713,7 @@
compatible = "qcom,apss-wdt-sc7280", "qcom,kpss-wdt";
reg = <0 0x17c10000 0 0x1000>;
clocks = <&sleep_clk>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
};
timer@17c20000 {
@@ -1851,6 +1853,14 @@
reg = <0 0x18591000 0 0x1000>,
<0 0x18592000 0 0x1000>,
<0 0x18593000 0 0x1000>;
+
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dcvsh-irq-0",
+ "dcvsh-irq-1",
+ "dcvsh-irq-2";
+
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
clock-names = "xo", "alternate";
#freq-domain-cells = <1>;