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-rw-r--r--arch/arm/mach-mx27/dpm.c16
-rw-r--r--arch/arm/mach-mx3/dpm.c20
-rw-r--r--arch/arm/mach-mx3/dvfs.c27
-rw-r--r--arch/arm/mach-mx3/mx31ads_gpio.c6
4 files changed, 40 insertions, 29 deletions
diff --git a/arch/arm/mach-mx27/dpm.c b/arch/arm/mach-mx27/dpm.c
index 1662923413b5..90a32193437c 100644
--- a/arch/arm/mach-mx27/dpm.c
+++ b/arch/arm/mach-mx27/dpm.c
@@ -56,6 +56,10 @@ static unsigned saved_cpu_freq;
static unsigned long saved_loops_per_jiffy;
static unsigned int curr_mode = DPM_MODE_RUN;
+static struct clk *cpu_clk;
+static struct clk *ahb_clk;
+static struct clk *ipg_clk;
+
extern void (*pm_idle) (void);
static int mxc_dpm_set_opt(struct dpm_opt *cur, struct dpm_opt *new)
@@ -222,9 +226,9 @@ static int mxc_dpm_get_opt(struct dpm_opt *opt)
md_opt = &opt->md_opt;
- md_opt->cpu = mxc_get_clocks(CPU_CLK);
- md_opt->ahb = mxc_get_clocks(AHB_CLK);
- md_opt->ip = mxc_get_clocks(IPG_CLK);
+ md_opt->cpu = clk_get_rate(cpu_clk);
+ md_opt->ahb = clk_get_rate(ahb_clk);
+ md_opt->ip = clk_get_rate(ipg_clk);
md_opt->mode = curr_mode;
return 0;
@@ -378,7 +382,7 @@ static void mxc_dpm_startup(void)
{
if (!saved_loops_per_jiffy) {
saved_loops_per_jiffy = loops_per_jiffy;
- saved_cpu_freq = mxc_get_clocks(CPU_CLK) / 1000;
+ saved_cpu_freq = clk_get_rate(cpu_clk) / 1000;
}
orig_idle = pm_idle;
pm_idle = dpm_idle;
@@ -393,6 +397,10 @@ static int __init mxc_dpm_init(void)
{
printk(KERN_INFO "Freescale i.MX27 Dynamic Power Management.\n");
+ cpu_clk = clk_get(NULL, "cpu_clk");
+ ahb_clk = clk_get(NULL, "ahb_clk");
+ ipg_clk = clk_get(NULL, "ipg_clk");
+
dpm_md.init_opt = mxc_dpm_init_opt;
dpm_md.set_opt = mxc_dpm_set_opt;
dpm_md.get_opt = mxc_dpm_get_opt;
diff --git a/arch/arm/mach-mx3/dpm.c b/arch/arm/mach-mx3/dpm.c
index e05a6816c669..470708f6dd66 100644
--- a/arch/arm/mach-mx3/dpm.c
+++ b/arch/arm/mach-mx3/dpm.c
@@ -56,6 +56,10 @@ static unsigned saved_cpu_freq;
static unsigned long saved_loops_per_jiffy;
static unsigned int curr_mode = DPM_MODE_RUN;
+static struct clk *cpu_clk;
+static struct clk *ahb_clk;
+static struct clk *ipg_clk;
+
extern void (*pm_idle) (void);
static int mxc_dpm_set_opt(struct dpm_opt *cur, struct dpm_opt *new)
@@ -221,10 +225,9 @@ static int mxc_dpm_get_opt(struct dpm_opt *opt)
struct dpm_md_opt *md_opt;
md_opt = &opt->md_opt;
-
- md_opt->cpu = mxc_get_clocks(CPU_CLK);
- md_opt->ahb = mxc_get_clocks(AHB_CLK);
- md_opt->ip = mxc_get_clocks(IPG_CLK);
+ md_opt->cpu = clk_get_rate(cpu_clk);
+ md_opt->ahb = clk_get_rate(ahb_clk);
+ md_opt->ip = clk_get_rate(ipg_clk);
md_opt->mode = curr_mode;
return 0;
@@ -376,12 +379,9 @@ static void mxc_dpm_idle(void)
static void mxc_dpm_startup(void)
{
- struct clk *clk;
-
if (!saved_loops_per_jiffy) {
saved_loops_per_jiffy = loops_per_jiffy;
- clk = clk_get(NULL, "cpu_clk");
- saved_cpu_freq = clk_get_rate(clk) / 1000;
+ saved_cpu_freq = clk_get_rate(cpu_clk) / 1000;
}
orig_idle = pm_idle;
pm_idle = dpm_idle;
@@ -396,6 +396,10 @@ static int __init mxc_dpm_init(void)
{
printk(KERN_INFO "Freescale i.MX31 Dynamic Power Management.\n");
+ cpu_clk = clk_get(NULL, "cpu_clk");
+ ahb_clk = clk_get(NULL, "ahb_clk");
+ ipg_clk = clk_get(NULL, "ipg_clk");
+
dpm_md.init_opt = mxc_dpm_init_opt;
dpm_md.set_opt = mxc_dpm_set_opt;
dpm_md.get_opt = mxc_dpm_get_opt;
diff --git a/arch/arm/mach-mx3/dvfs.c b/arch/arm/mach-mx3/dvfs.c
index 3d1026d717f9..0c0baab64f97 100644
--- a/arch/arm/mach-mx3/dvfs.c
+++ b/arch/arm/mach-mx3/dvfs.c
@@ -116,6 +116,11 @@ pmcr0 = ((pmcr0 & ~MXC_CCM_PMCR0_VSCNT_MASK) | x << MXC_CCM_PMCR0_VSCNT_OFFSET)
dvfs_states_table *dvfs_states_tbl;
+static struct clk *pll_clk;
+static struct clk *cpu_clk;
+static struct clk *ckih_clk;
+static struct clk *ckil_clk;
+
/*!
* The dvfs_dptc_params structure holds all the internal DPTC driver parameters
* (current working point, current frequency, translation table and DPTC
@@ -441,16 +446,10 @@ unsigned long dvfs_get_clock(unsigned long reg, unsigned long pdr0)
unsigned long pll, ret_val = 0;
signed long mcu_pdf;
signed long pdf, mfd, mfi, mfn, ref_clk;
- struct clk *pll_clk;
- struct clk *parent_clk;
-
- pll_clk = clk_get(NULL, "mcu_pll");
- parent_clk = clk_get(NULL, "ckih");
- if (parent_clk == clk_get_parent(pll_clk)) {
- ref_clk = clk_get_rate(parent_clk);
+ if (ckih_clk == clk_get_parent(pll_clk)) {
+ ref_clk = clk_get_rate(ckih_clk);
} else { /* parent is ckil/fpm */
- parent_clk = clk_get(NULL, "ckil");
- ref_clk = clk_get_rate(parent_clk) * 1024;
+ ref_clk = clk_get_rate(ckil_clk) * 1024;
}
pdf = (signed long)
@@ -491,6 +490,11 @@ int __init init_dvfs_controller(dvfs_dptc_params_s * params)
int i;
int res = 0;
+ pll_clk = clk_get(NULL, "mcu_pll");
+ cpu_clk = clk_get(NULL, "cpu_pll");
+ ckih_clk = clk_get(NULL, "ckih");
+ ckil_clk = clk_get(NULL, "ckil");
+
/* Configure 2 MC13783 DVFS pins */
mxc_request_iomux(MX31_PIN_DVFS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
mxc_request_iomux(MX31_PIN_DVFS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
@@ -797,8 +801,9 @@ void set_freq(dvfs_dptc_params_s * params, int fsvai)
}
pr_debug(KERN_INFO "ARM frequency: %dMHz CKIH frequency: %dMHz(%d)\n",
- (int)mxc_get_clocks(CPU_CLK) / 1000000,
- (int)mxc_get_clocks(CKIH_CLK) / 1000000, (int)jiffies);
+ (int)clk_get_rate(cpu_clk) / 1000000,
+ (int)clk_get_rate(ckih_clk) / 1000000,
+ (int)jiffies);
}
/*!
diff --git a/arch/arm/mach-mx3/mx31ads_gpio.c b/arch/arm/mach-mx3/mx31ads_gpio.c
index d73ca5a70718..2c6ec01f9a9d 100644
--- a/arch/arm/mach-mx3/mx31ads_gpio.c
+++ b/arch/arm/mach-mx3/mx31ads_gpio.c
@@ -1001,9 +1001,6 @@ void gpio_ata_active(void)
*/
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, PAD_CTL_PKE_NONE); // ATA_DMARQ
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, PAD_CTL_PKE_NONE); // ATA_INTRQ
-
- printk(KERN_DEBUG "gpio_ata_active: Enable clocks\n");
- mxc_clks_enable(ATA_CLK);
}
EXPORT_SYMBOL(gpio_ata_active);
@@ -1014,9 +1011,6 @@ EXPORT_SYMBOL(gpio_ata_active);
*/
void gpio_ata_inactive(void)
{
- printk(KERN_DEBUG "gpio_ata_inactive: Disable clocks\n");
- mxc_clks_disable(ATA_CLK);
-
/*
* Turn off ATA group B signals
*/
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-05 07:43:43 +0000