diff options
Diffstat (limited to 'arch/mips/au1000/pb1200/board_setup.c')
| -rw-r--r-- | arch/mips/au1000/pb1200/board_setup.c | 139 |
1 files changed, 66 insertions, 73 deletions
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c index 4493a792cc4c..6cb2115059ad 100644 --- a/arch/mips/au1000/pb1200/board_setup.c +++ b/arch/mips/au1000/pb1200/board_setup.c @@ -27,16 +27,8 @@ #include <linux/init.h> #include <linux/sched.h> -#include <au1000.h> #include <prom.h> - -#ifdef CONFIG_MIPS_PB1200 -#include <asm/mach-pb1x00/pb1200.h> -#endif - -#ifdef CONFIG_MIPS_DB1200 -#include <asm/mach-db1x00/db1200.h> -#endif +#include <au1xxx.h> extern void _board_init_irq(void); extern void (*board_init_irq)(void); @@ -53,56 +45,57 @@ void __init board_setup(void) #if 0 { - u32 pin_func; - - /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, - * but it is board specific code, so put it here. - */ - pin_func = au_readl(SYS_PINFUNC); - au_sync(); - pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; - au_writel(pin_func, SYS_PINFUNC); - - au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */ - au_sync(); + u32 pin_func; + + /* + * Enable PSC1 SYNC for AC97. Normaly done in audio driver, + * but it is board specific code, so put it here. + */ + pin_func = au_readl(SYS_PINFUNC); + au_sync(); + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; + au_writel(pin_func, SYS_PINFUNC); + + au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */ + au_sync(); } #endif #if defined(CONFIG_I2C_AU1550) { - u32 freq0, clksrc; - u32 pin_func; - - /* Select SMBUS in CPLD */ - bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); - - pin_func = au_readl(SYS_PINFUNC); - au_sync(); - pin_func &= ~(3<<17 | 1<<4); - /* Set GPIOs correctly */ - pin_func |= 2<<17; - au_writel(pin_func, SYS_PINFUNC); - au_sync(); - - /* The i2c driver depends on 50Mhz clock */ - freq0 = au_readl(SYS_FREQCTRL0); - au_sync(); - freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); - freq0 |= (3<<SYS_FC_FRDIV1_BIT); - /* 396Mhz / (3+1)*2 == 49.5Mhz */ - au_writel(freq0, SYS_FREQCTRL0); - au_sync(); - freq0 |= SYS_FC_FE1; - au_writel(freq0, SYS_FREQCTRL0); - au_sync(); - - clksrc = au_readl(SYS_CLKSRC); - au_sync(); - clksrc &= ~0x01f00000; - /* bit 22 is EXTCLK0 for PSC0 */ - clksrc |= (0x3 << 22); - au_writel(clksrc, SYS_CLKSRC); - au_sync(); + u32 freq0, clksrc; + u32 pin_func; + + /* Select SMBus in CPLD */ + bcsr->resets &= ~BCSR_RESETS_PCS0MUX; + + pin_func = au_readl(SYS_PINFUNC); + au_sync(); + pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B); + /* Set GPIOs correctly */ + pin_func |= 2 << 17; + au_writel(pin_func, SYS_PINFUNC); + au_sync(); + + /* The I2C driver depends on 50 MHz clock */ + freq0 = au_readl(SYS_FREQCTRL0); + au_sync(); + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); + freq0 |= 3 << SYS_FC_FRDIV1_BIT; + /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */ + au_writel(freq0, SYS_FREQCTRL0); + au_sync(); + freq0 |= SYS_FC_FE1; + au_writel(freq0, SYS_FREQCTRL0); + au_sync(); + + clksrc = au_readl(SYS_CLKSRC); + au_sync(); + clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK); + /* Bit 22 is EXTCLK0 for PSC0 */ + clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT; + au_writel(clksrc, SYS_CLKSRC); + au_sync(); } #endif @@ -116,27 +109,27 @@ void __init board_setup(void) #endif #endif - /* The Pb1200 development board uses external MUX for PSC0 to - support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI - */ + /* + * The Pb1200 development board uses external MUX for PSC0 to + * support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI + */ #ifdef CONFIG_I2C_AU1550 - bcsr->resets &= (~BCSR_RESETS_PCS0MUX); + bcsr->resets &= ~BCSR_RESETS_PCS0MUX; #endif au_sync(); #ifdef CONFIG_MIPS_PB1200 - printk("AMD Alchemy Pb1200 Board\n"); + printk(KERN_INFO "AMD Alchemy Pb1200 Board\n"); #endif #ifdef CONFIG_MIPS_DB1200 - printk("AMD Alchemy Db1200 Board\n"); + printk(KERN_INFO "AMD Alchemy Db1200 Board\n"); #endif /* Setup Pb1200 External Interrupt Controller */ board_init_irq = _board_init_irq; } -int -board_au1200fb_panel(void) +int board_au1200fb_panel(void) { BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; int p; @@ -147,23 +140,23 @@ board_au1200fb_panel(void) return p; } -int -board_au1200fb_panel_init(void) +int board_au1200fb_panel_init(void) { /* Apply power */ - BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; - bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); - /*printk("board_au1200fb_panel_init()\n"); */ + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; + + bcsr->board |= BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL; + /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */ return 0; } -int -board_au1200fb_panel_shutdown(void) +int board_au1200fb_panel_shutdown(void) { /* Remove power */ - BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; - bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); - /*printk("board_au1200fb_panel_shutdown()\n"); */ + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; + + bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | + BCSR_BOARD_LCDBL); + /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */ return 0; } - |