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-rw-r--r--arch/mips/sibyte/sb1250/Makefile3
-rw-r--r--arch/mips/sibyte/sb1250/bcm1250_tbprof.c406
-rw-r--r--arch/mips/sibyte/sb1250/irq.c2
-rw-r--r--arch/mips/sibyte/sb1250/setup.c38
4 files changed, 27 insertions, 422 deletions
diff --git a/arch/mips/sibyte/sb1250/Makefile b/arch/mips/sibyte/sb1250/Makefile
index a2fdbd62f8ac..df662c61473a 100644
--- a/arch/mips/sibyte/sb1250/Makefile
+++ b/arch/mips/sibyte/sb1250/Makefile
@@ -1,8 +1,5 @@
obj-y := setup.o irq.o time.o
obj-$(CONFIG_SMP) += smp.o
-obj-$(CONFIG_SIBYTE_TBPROF) += bcm1250_tbprof.o
obj-$(CONFIG_SIBYTE_STANDALONE) += prom.o
obj-$(CONFIG_SIBYTE_BUS_WATCHER) += bus_watcher.o
-
-EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c b/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
deleted file mode 100644
index 212547c57310..000000000000
--- a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
+++ /dev/null
@@ -1,406 +0,0 @@
-/*
- * Copyright (C) 2001, 2002, 2003 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#define SBPROF_TB_DEBUG 0
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/fs.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/smp_lock.h>
-#include <linux/wait.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-#include <asm/sibyte/sb1250.h>
-#include <asm/sibyte/sb1250_regs.h>
-#include <asm/sibyte/sb1250_scd.h>
-#include <asm/sibyte/sb1250_int.h>
-#include <asm/sibyte/trace_prof.h>
-
-#define DEVNAME "bcm1250_tbprof"
-
-static struct sbprof_tb sbp;
-
-#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES)
-
-/************************************************************************
- * Support for ZBbus sampling using the trace buffer
- *
- * We use the SCD performance counter interrupt, caused by a Zclk counter
- * overflow, to trigger the start of tracing.
- *
- * We set the trace buffer to sample everything and freeze on
- * overflow.
- *
- * We map the interrupt for trace_buffer_freeze to handle it on CPU 0.
- *
- ************************************************************************/
-
-static u_int64_t tb_period;
-
-static void arm_tb(void)
-{
- u_int64_t scdperfcnt;
- u_int64_t next = (1ULL << 40) - tb_period;
- u_int64_t tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
- /* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
- trigger start of trace. XXX vary sampling period */
- __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1));
- scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
- /* Unfortunately, in Pass 2 we must clear all counters to knock down
- a previous interrupt request. This means that bus profiling
- requires ALL of the SCD perf counters. */
- __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
- // keep counters 0,2,3 as is
- M_SPC_CFG_ENABLE | // enable counting
- M_SPC_CFG_CLEAR | // clear all counters
- V_SPC_CFG_SRC1(1), // counter 1 counts cycles
- IOADDR(A_SCD_PERF_CNT_CFG));
- __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1));
- /* Reset the trace buffer */
- __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
-#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
- /* XXXKW may want to expose control to the data-collector */
- tb_options |= M_SCD_TRACE_CFG_FORCECNT;
-#endif
- __raw_writeq(tb_options, IOADDR(A_SCD_TRACE_CFG));
- sbp.tb_armed = 1;
-}
-
-static irqreturn_t sbprof_tb_intr(int irq, void *dev_id)
-{
- int i;
- DBG(printk(DEVNAME ": tb_intr\n"));
- if (sbp.next_tb_sample < MAX_TB_SAMPLES) {
- /* XXX should use XKPHYS to make writes bypass L2 */
- u_int64_t *p = sbp.sbprof_tbbuf[sbp.next_tb_sample++];
- /* Read out trace */
- __raw_writeq(M_SCD_TRACE_CFG_START_READ,
- IOADDR(A_SCD_TRACE_CFG));
- __asm__ __volatile__ ("sync" : : : "memory");
- /* Loop runs backwards because bundles are read out in reverse order */
- for (i = 256 * 6; i > 0; i -= 6) {
- // Subscripts decrease to put bundle in the order
- // t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi
- p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
- // read t2 hi
- p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
- // read t2 lo
- p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
- // read t1 hi
- p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
- // read t1 lo
- p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
- // read t0 hi
- p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
- // read t0 lo
- }
- if (!sbp.tb_enable) {
- DBG(printk(DEVNAME ": tb_intr shutdown\n"));
- __raw_writeq(M_SCD_TRACE_CFG_RESET,
- IOADDR(A_SCD_TRACE_CFG));
- sbp.tb_armed = 0;
- wake_up(&sbp.tb_sync);
- } else {
- arm_tb(); // knock down current interrupt and get another one later
- }
- } else {
- /* No more trace buffer samples */
- DBG(printk(DEVNAME ": tb_intr full\n"));
- __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
- sbp.tb_armed = 0;
- if (!sbp.tb_enable) {
- wake_up(&sbp.tb_sync);
- }
- wake_up(&sbp.tb_read);
- }
- return IRQ_HANDLED;
-}
-
-static irqreturn_t sbprof_pc_intr(int irq, void *dev_id)
-{
- printk(DEVNAME ": unexpected pc_intr");
- return IRQ_NONE;
-}
-
-int sbprof_zbprof_start(struct file *filp)
-{
- u_int64_t scdperfcnt;
-
- if (sbp.tb_enable)
- return -EBUSY;
-
- DBG(printk(DEVNAME ": starting\n"));
-
- sbp.tb_enable = 1;
- sbp.next_tb_sample = 0;
- filp->f_pos = 0;
-
- if (request_irq
- (K_INT_TRACE_FREEZE, sbprof_tb_intr, 0, DEVNAME " trace freeze", &sbp)) {
- return -EBUSY;
- }
- /* Make sure there isn't a perf-cnt interrupt waiting */
- scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
- /* Disable and clear counters, override SRC_1 */
- __raw_writeq((scdperfcnt & ~(M_SPC_CFG_SRC1 | M_SPC_CFG_ENABLE)) |
- M_SPC_CFG_ENABLE | M_SPC_CFG_CLEAR | V_SPC_CFG_SRC1(1),
- IOADDR(A_SCD_PERF_CNT_CFG));
-
- /* We grab this interrupt to prevent others from trying to use
- it, even though we don't want to service the interrupts
- (they only feed into the trace-on-interrupt mechanism) */
- if (request_irq
- (K_INT_PERF_CNT, sbprof_pc_intr, 0, DEVNAME " scd perfcnt", &sbp)) {
- free_irq(K_INT_TRACE_FREEZE, &sbp);
- return -EBUSY;
- }
-
- /* I need the core to mask these, but the interrupt mapper to
- pass them through. I am exploiting my knowledge that
- cp0_status masks out IP[5]. krw */
- __raw_writeq(K_INT_MAP_I3,
- IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
- (K_INT_PERF_CNT << 3)));
-
- /* Initialize address traps */
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0));
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_1));
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_2));
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_3));
-
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_0));
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_1));
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_2));
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_3));
-
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_0));
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_1));
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_2));
- __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
-
- /* Initialize Trace Event 0-7 */
- // when interrupt
- __raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_3));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_4));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_5));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_6));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_7));
-
- /* Initialize Trace Sequence 0-7 */
- // Start on event 0 (interrupt)
- __raw_writeq(V_SCD_TRSEQ_FUNC_START | 0x0fff,
- IOADDR(A_SCD_TRACE_SEQUENCE_0));
- // dsamp when d used | asamp when a used
- __raw_writeq(M_SCD_TRSEQ_ASAMPLE | M_SCD_TRSEQ_DSAMPLE |
- K_SCD_TRSEQ_TRIGGER_ALL,
- IOADDR(A_SCD_TRACE_SEQUENCE_1));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_2));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_3));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_4));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_5));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_6));
- __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
-
- /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
- __raw_writeq(1ULL << K_INT_PERF_CNT,
- IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE)));
-
- arm_tb();
-
- DBG(printk(DEVNAME ": done starting\n"));
-
- return 0;
-}
-
-int sbprof_zbprof_stop(void)
-{
- DEFINE_WAIT(wait);
- DBG(printk(DEVNAME ": stopping\n"));
-
- if (sbp.tb_enable) {
- sbp.tb_enable = 0;
- /* XXXKW there is a window here where the intr handler
- may run, see the disable, and do the wake_up before
- this sleep happens. */
- if (sbp.tb_armed) {
- DBG(printk(DEVNAME ": wait for disarm\n"));
- prepare_to_wait(&sbp.tb_sync, &wait, TASK_INTERRUPTIBLE);
- schedule();
- finish_wait(&sbp.tb_sync, &wait);
- DBG(printk(DEVNAME ": disarm complete\n"));
- }
- free_irq(K_INT_TRACE_FREEZE, &sbp);
- free_irq(K_INT_PERF_CNT, &sbp);
- }
-
- DBG(printk(DEVNAME ": done stopping\n"));
-
- return 0;
-}
-
-static int sbprof_tb_open(struct inode *inode, struct file *filp)
-{
- int minor;
-
- minor = iminor(inode);
- if (minor != 0) {
- return -ENODEV;
- }
- if (sbp.open) {
- return -EBUSY;
- }
-
- memset(&sbp, 0, sizeof(struct sbprof_tb));
- sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
- if (!sbp.sbprof_tbbuf) {
- return -ENOMEM;
- }
- memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
- init_waitqueue_head(&sbp.tb_sync);
- init_waitqueue_head(&sbp.tb_read);
- sbp.open = 1;
-
- return 0;
-}
-
-static int sbprof_tb_release(struct inode *inode, struct file *filp)
-{
- int minor;
-
- minor = iminor(inode);
- if (minor != 0 || !sbp.open) {
- return -ENODEV;
- }
-
- if (sbp.tb_armed || sbp.tb_enable) {
- sbprof_zbprof_stop();
- }
-
- vfree(sbp.sbprof_tbbuf);
- sbp.open = 0;
-
- return 0;
-}
-
-static ssize_t sbprof_tb_read(struct file *filp, char *buf,
- size_t size, loff_t *offp)
-{
- int cur_sample, sample_off, cur_count, sample_left;
- char *src;
- int count = 0;
- char *dest = buf;
- long cur_off = *offp;
-
- count = 0;
- cur_sample = cur_off / TB_SAMPLE_SIZE;
- sample_off = cur_off % TB_SAMPLE_SIZE;
- sample_left = TB_SAMPLE_SIZE - sample_off;
- while (size && (cur_sample < sbp.next_tb_sample)) {
- cur_count = size < sample_left ? size : sample_left;
- src = (char *)(((long)sbp.sbprof_tbbuf[cur_sample])+sample_off);
- copy_to_user(dest, src, cur_count);
- DBG(printk(DEVNAME ": read from sample %d, %d bytes\n",
- cur_sample, cur_count));
- size -= cur_count;
- sample_left -= cur_count;
- if (!sample_left) {
- cur_sample++;
- sample_off = 0;
- sample_left = TB_SAMPLE_SIZE;
- } else {
- sample_off += cur_count;
- }
- cur_off += cur_count;
- dest += cur_count;
- count += cur_count;
- }
- *offp = cur_off;
-
- return count;
-}
-
-static long sbprof_tb_ioctl(struct file *filp,
- unsigned int command,
- unsigned long arg)
-{
- int error = 0;
-
- lock_kernel();
- switch (command) {
- case SBPROF_ZBSTART:
- error = sbprof_zbprof_start(filp);
- break;
- case SBPROF_ZBSTOP:
- error = sbprof_zbprof_stop();
- break;
- case SBPROF_ZBWAITFULL:
- DEFINE_WAIT(wait);
- prepare_to_wait(&sbp.tb_read, &wait, TASK_INTERRUPTIBLE);
- schedule();
- finish_wait(&sbp.tb_read, &wait);
- /* XXXKW check if interrupted? */
- return put_user(TB_FULL, (int *) arg);
- default:
- error = -EINVAL;
- break;
- }
- unlock_kernel();
-
- return error;
-}
-
-static const struct file_operations sbprof_tb_fops = {
- .owner = THIS_MODULE,
- .open = sbprof_tb_open,
- .release = sbprof_tb_release,
- .read = sbprof_tb_read,
- .unlocked_ioctl = sbprof_tb_ioctl,
- .compat_ioctl = sbprof_tb_ioctl,
- .mmap = NULL,
-};
-
-static int __init sbprof_tb_init(void)
-{
- if (register_chrdev(SBPROF_TB_MAJOR, DEVNAME, &sbprof_tb_fops)) {
- printk(KERN_WARNING DEVNAME ": initialization failed (dev %d)\n",
- SBPROF_TB_MAJOR);
- return -EIO;
- }
- sbp.open = 0;
- tb_period = zbbus_mhz * 10000LL;
- printk(KERN_INFO DEVNAME ": initialized - tb_period = %lld\n", tb_period);
- return 0;
-}
-
-static void __exit sbprof_tb_cleanup(void)
-{
- unregister_chrdev(SBPROF_TB_MAJOR, DEVNAME);
-}
-
-module_init(sbprof_tb_init);
-module_exit(sbprof_tb_cleanup);
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 148239446e6e..0e6a13c0bd0e 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -421,7 +421,7 @@ asmlinkage void plat_irq_dispatch(void)
* blasting the high 32 bits.
*/
- pending = read_c0_cause() & read_c0_status();
+ pending = read_c0_cause() & read_c0_status() & ST0_IM;
#ifdef CONFIG_SIBYTE_SB1250_PROF
if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */
diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
index d0ee1d5b8223..f4a6169aa0a4 100644
--- a/arch/mips/sibyte/sb1250/setup.c
+++ b/arch/mips/sibyte/sb1250/setup.c
@@ -16,6 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include <linux/init.h>
+#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/string.h>
@@ -32,6 +33,7 @@ unsigned int soc_pass;
unsigned int soc_type;
unsigned int periph_rev;
unsigned int zbbus_mhz;
+EXPORT_SYMBOL(zbbus_mhz);
static char *soc_str;
static char *pass_str;
@@ -67,7 +69,7 @@ static int __init sys_rev_decode(void)
ret = setup_bcm112x();
break;
default:
- prom_printf("Unknown SOC type %x\n", soc_type);
+ printk("Unknown SOC type %x\n", soc_type);
ret = 1;
break;
}
@@ -112,7 +114,7 @@ static int __init setup_bcm1250(void)
pass_str = "A0-A6";
war_pass = K_SYS_REVISION_BCM1250_PASS2;
} else {
- prom_printf("Unknown BCM1250 rev %x\n", soc_pass);
+ printk("Unknown BCM1250 rev %x\n", soc_pass);
ret = 1;
}
break;
@@ -139,8 +141,20 @@ static int __init setup_bcm112x(void)
periph_rev = 3;
pass_str = "A2";
break;
+ case K_SYS_REVISION_BCM112x_A3:
+ periph_rev = 3;
+ pass_str = "A3";
+ break;
+ case K_SYS_REVISION_BCM112x_A4:
+ periph_rev = 3;
+ pass_str = "A4";
+ break;
+ case K_SYS_REVISION_BCM112x_B0:
+ periph_rev = 3;
+ pass_str = "B0";
+ break;
default:
- prom_printf("Unknown %s rev %x\n", soc_str, soc_pass);
+ printk("Unknown %s rev %x\n", soc_str, soc_pass);
ret = 1;
}
return ret;
@@ -158,21 +172,21 @@ void __init sb1250_setup(void)
soc_pass = G_SYS_REVISION(sys_rev);
if (sys_rev_decode()) {
- prom_printf("Restart after failure to identify SiByte chip\n");
+ printk("Restart after failure to identify SiByte chip\n");
machine_restart(NULL);
}
plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
- prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
+ printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
- prom_printf("Board type: %s\n", get_system_type());
+ printk("Board type: %s\n", get_system_type());
switch (war_pass) {
case K_SYS_REVISION_BCM1250_PASS1:
#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
- prom_printf("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
+ printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
"and the kernel doesn't have the proper "
"workarounds compiled in. @@@@\n");
bad_config = 1;
@@ -182,27 +196,27 @@ void __init sb1250_setup(void)
/* Pass 2 - easiest as default for now - so many numbers */
#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \
!defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
- prom_printf("@@@@ This is a BCM1250 A3-A10 board, and the "
+ printk("@@@@ This is a BCM1250 A3-A10 board, and the "
"kernel doesn't have the proper workarounds "
"compiled in. @@@@\n");
bad_config = 1;
#endif
#ifdef CONFIG_CPU_HAS_PREFETCH
- prom_printf("@@@@ Prefetches may be enabled in this kernel, "
+ printk("@@@@ Prefetches may be enabled in this kernel, "
"but are buggy on this board. @@@@\n");
bad_config = 1;
#endif
break;
case K_SYS_REVISION_BCM1250_PASS2_2:
#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
- prom_printf("@@@@ This is a BCM1250 B1/B2. board, and the "
+ printk("@@@@ This is a BCM1250 B1/B2. board, and the "
"kernel doesn't have the proper workarounds "
"compiled in. @@@@\n");
bad_config = 1;
#endif
#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \
!defined(CONFIG_CPU_HAS_PREFETCH)
- prom_printf("@@@@ This is a BCM1250 B1/B2, but the kernel is "
+ printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
"conservatively configured for an 'A' stepping. "
"@@@@\n");
#endif
@@ -211,7 +225,7 @@ void __init sb1250_setup(void)
break;
}
if (bad_config) {
- prom_printf("Invalid configuration for this chip.\n");
+ printk("Invalid configuration for this chip.\n");
machine_restart(NULL);
}
}
generated by cgit v1.2.3 (git 2.0.4) at 2024-11-09 06:26:38 +0000