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Diffstat (limited to 'arch/mips/sibyte/swarm/rtc_m41t81.c')
-rw-r--r--arch/mips/sibyte/swarm/rtc_m41t81.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c
index 0e633ee8d83c..a686bb716ec6 100644
--- a/arch/mips/sibyte/swarm/rtc_m41t81.c
+++ b/arch/mips/sibyte/swarm/rtc_m41t81.c
@@ -128,7 +128,7 @@ static int m41t81_write(uint8_t addr, int b)
/* Clear error bit by writing a 1 */
bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
return -1;
- }
+ }
/* read the same byte again to make sure it is written */
bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
@@ -136,7 +136,7 @@ static int m41t81_write(uint8_t addr, int b)
while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
-
+
return 0;
}
@@ -148,13 +148,13 @@ int m41t81_set_time(unsigned long t)
/*
* Note the write order matters as it ensures the correctness.
- * When we write sec, 10th sec is clear. It is reasonable to
+ * When we write sec, 10th sec is clear. It is reasonable to
* believe we should finish writing min within a second.
*/
tm.tm_sec = BIN2BCD(tm.tm_sec);
m41t81_write(M41T81REG_SC, tm.tm_sec);
-
+
tm.tm_min = BIN2BCD(tm.tm_min);
m41t81_write(M41T81REG_MN, tm.tm_min);
@@ -187,7 +187,7 @@ unsigned long m41t81_get_time(void)
{
unsigned int year, mon, day, hour, min, sec;
- /*
+ /*
* min is valid if two reads of sec are the same.
*/
for (;;) {